Search Engine


Add Question

19 Threads found on 74ls74
Hi, I just start to learn HDL and choose to study verilog. I try to write D-FF (74ls74), but it shows some errors. I've seen some D-FF example but those did not include preset and clear. What wrong with my program? Please help me. Thanks alot. Following is my program by using Xilinx module dffpc(d, q, preset, clear, clk);
Hi, You can check the function of those pins in 74ls74 datasheet. 74ls74 Datasheet pdf - Dual Positive-Edge-Triggered D Flip-Flops with Preset/ Clear and Complementary Outputs - Fairchild Semiconductor As a suggestions, since you have to use 2 those ICs to divide frequency
hi i am using 74ls74 for motor driver but its not working i am not geting change in output according change in input i am giving 1 s clk pulse and change in d is 1sec also can any one help me
Hello, Is there any 74ls74 quad or octal flip flop equivalent? In need Q as well as Qbar outputs.
Well, u can check this page, it has a nice explanation and the difference between a latch and a flip flop: Also, to use it as sample and hold, i kind of doubt it, remember flip flops are difital circuitery, has two levels at least this kind, high or low, it wouldn't be good fo
Actually, the schematic appears to be wrong. In the circuit, Preset-not and Clear-not of the 74ls74 are wired low. According to the 74ls74 data sheet, that is an unstable configuration that will forever output logic high on both Q and Qnot, regardless of clock activity. Wire preset and clear to logic high if you want it to operate as a multivibrato
For synchronous case, the changes in output is depend on the clock. Even you give reset (preset) to low, output Q can't go to 0 (1) immediately, and have to wait until clock pos edge. For asynchronous case, whenever clear(preset) is low, the output Q will be 0([c
Hello All, I am new to this forum as well as Orcad. I having some problems simulating a Flip-Flop ( 74ls74 from the psice lib) When running the simulation I can see the alternating digital output from dstm into the clk of the flip-flop but when monitoring the D Q and QBar of the flip-flop all I see is three red flat lines ie no digital out
If the output should be 1 an undefined amount of time, not just a constant period, before reset, you need a latch or bistable. Use 74ls74, or 4013, connecting the D and CLK inputs to ground. Use S to set and R to reset. You can build the same circuit with 2 transistors and some resistors.
Guys, Is it advisable to interface LS family digital logic parts with a uC like AT89C52 or PIC, or should I use HC parts instead ? For example, would it be a good idea to connect a 74ls74 to the above mentioned uC pins or would it be better to connect a 74HC74 ? An anecdotes and ideas/suggestions ?
hi, we are trying to do a project and we have to use a d-flip fliop in schematic editor. what is the most basic part to use? thanks It depends upon which logic family you want to use, ie. TTL or CMOS In the TTL family, there is the 7474, 74ls74, etc. In the 4000 series CMOS there is 4013, 40174, 40175 In the 74H
Hi ckdur, 1. I understand that I can't use TTL gates/flip-flops. What's the remplacement in CMOS? I use the following TTL's: 74LS32 (or another multiple input OR gate), 74ls74 (flip-flop) The ooold metallic-gate CMOS series 4000 and 4500 allow that logic levels (from 0-5 V to 0-15 V). 2. I need t
The LS154 outputs are inverted because it is designed as an address decoder and the devices it would select normally have active low enable pins. I don't think there is a direct equivalent with active high outputs. You can always invert the polarity with a second IC or discrete devices. Each of the multiplexer outpu
In this case you need to use a Common Anode 7 segment LEDs display. Seven Segment Display Common anode to be connected to the Vcc pin. Look here for an example how to connect the 74ls74 with the 7 segment LED display.
The only problem is that x is an asynchronous signal. There needs to be a setup and hold constraint with respect to 'reset' and 'x'. (I actually once had a very difficult problem with this exact scenario except that I was using a discrete 74ls74 flipflop. The FF went metastable,but it was an event that only happened a few times a day.)
hai friends, i need to get a pulse detection circuit using 4013 d-flipflop ic or can u suggest 15 v input equivalent of 74ls74 . rakesh
I have a circuit (+5V) where a 74HC164 input pin-2 is driven by the output of a 74ACT74/74ls74. Pin-1 of 'HC164 is high. Pin-9 (clear) is high. Initially all outputs are zero and also clock pin-8 zero. When I give a clock (from a monoshot) low-high, all the outputs of 'HC 164 are changing to high if the input pin-2 is high, or changing to low if
Why 74LS173? If you don't need gated D-inputs and gated outputs then you can use any D-register IC with (only) D-registers, eg. 74ls74
Sorry for such a late reply. I was stuck up with a different project. I have setup the entire circuit on a vero/strip board. My new circuit is attached. Now I have a relay at the output of the D flip flop. I also have a small delay circuit in between the relay and the D-FF output. It is just a requirement of my application. At the output of the r