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Amba Apb Vhdl Verilog

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3 Threads found on edaboard.com: Amba Apb Vhdl Verilog
what is the major difference between verilog HDL and vhdl???? Which is best in designing the amba AHB, ASB,apb,AXI????? The biggest difference is vhdl's a strongly typed language and is significantly more verbose than verilog. Either language will work well at implementing any if those bus (...)
May be this can help you: I2C master connected and tested with LEON Processor... This design uses the open core's I2C master. The core's CPU interface is modified from WISHBONE to amba/apb. The latter is done in order to test the core and its new apb interface with LEON processor. LEON is written in vhdl therefor the (...)
See Altera EXCALIBUR ARM. amba example's and simulation models.