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49 Threads found on edaboard.com: **Arithmetic Operations**

They are general purpose registers . All **arithmetic** and logic **operations** operate on those registers;
you can use them as source or destination of instructions without saving to and loading from RAM
different from accumulator , because in accumulator based architecture the output of ALU always saved on a single register

Microcontrollers :: 11-09-2016 06:13 :: hamidmoallemi :: Replies: **5** :: Views: **566**

Hi,
I need help regarding fixed point **arithmetic** **operations**,
There are two numbers one is of 24 bits in this 1 bit for sign and 13 bits for integer and 10 bits for fractional part.The second number is 16 bits in which 1 bit for sign and 15 bits for fractional part.
when i multiply both numbers i will get 39 bits (N1 + N2-1) then i have to add

PLD, SPLD, GAL, CPLD, FPGA Design :: 04-27-2016 05:07 :: kommu4946 :: Replies: **2** :: Views: **1696**

Logic is same as assembly language or is there any other formula that i will use and my work is easy?
It's much easier that writing assembler, **arithmetic** **operations** and I/O format conversions can be performed by C-compiler libraries. For the latter, you should read the compiler documentation.

Microcontrollers :: 12-12-2015 09:44 :: FvM :: Replies: **106** :: Views: **6778**

How to design a Calculator in VHDL for **arithmetic** **operations** to be displayed on LCD ? **arithmetic** **operations** include Add,compare,AND,OR . Also,input of calculator is from linear feedback shift register? How many components will be needed in design?

ASIC Design Methodologies and Tools (Digital) :: 11-18-2015 06:52 :: angel15 :: Replies: **1** :: Views: **550**

reg0 <= (0001*x,0011*x,0101*x,0111*x,1001*x,1011*x,1101*x,1111*x);
All signals involved in the **arithmetic** **operations** should have unsigned type, otherwise type casts are necessary. The array type of reg0 should be defined respectively.
0001 etc. aren't valid unsigned literals.

PLD, SPLD, GAL, CPLD, FPGA Design :: 06-21-2015 08:02 :: FvM :: Replies: **5** :: Views: **360**

std_logic_vector isn't a numeric data type. No **arithmetic** **operations** defined for it. You can use unsigned type instead Or use the non-IEEE library std_**arithmetic**_unsigned. Or apply type casts like
y<= std_logic_vector(unsigned(not(a)) + unsigned("00000001"));

Analog Circuit Design :: 06-13-2015 10:12 :: FvM :: Replies: **1** :: Views: **441**

Hello,
1.When multiplying 2 unsigned vectors in VHDL, must they be at the same it legal to multiply an unsigned vector with an integer? Or both operands must be of the same type?

PLD, SPLD, GAL, CPLD, FPGA Design :: 11-13-2014 22:09 :: shaiko :: Replies: **14** :: Views: **1013**

Hi,
I am using Synopsys DC for synthesizing Verilog code to gate level netlist . I have designed a customized adder and I want it to be used where there is addition in my functional Verilog code, e.g.,
wire a,b,c;
assign a = b + c;
Right now, it seems DC uses DW library by default. How to make synthesis library out of my

ASIC Design Methodologies and Tools (Digital) :: 10-31-2014 20:37 :: Ebrahim Songhori :: Replies: **3** :: Views: **831**

Hi Friends,
how to swap two variables without using third variable without **arithmetic** **operations** and without bitwise operator. thanks for helping me.

PC Programming and Interfacing :: 07-28-2014 12:36 :: nthulasiram :: Replies: **3** :: Views: **911**

I have written a verilog file that implements some **arithmetic** **operations**, I defined my signals as wire signed or reg signed. when I simulate that on isim simulator it does the operation as specified, with signed **arithmetic**. but when I simulate the same file in modelsim it behaves as if the signals are unsigned!
I have t

ASIC Design Methodologies and Tools (Digital) :: 05-23-2014 21:04 :: 3wais :: Replies: **1** :: Views: **673**

interrupt service functions would in addition to the Program Counter and status register (results of **arithmetic** **operations** such as overflow, negative result, etc) would also save any other registers which may be used in the function. This may be automatic, e.g. in C, or under the programmers control, e.g. in assembly language.
These would then be

Microcontrollers :: 05-03-2014 11:18 :: horace1 :: Replies: **4** :: Views: **648**

Explain what you are trying to do. It looks like you are trying to extend the contents of the array by filling it in with the contents of another array, that isn't adding which implies **arithmetic** **operations**, it's concatenaton.
You might be able to overlay the second array after the first by creating a union the size of the resulting array and enc

Microcontrollers :: 12-09-2013 09:48 :: betwixt :: Replies: **6** :: Views: **462**

I'm still relatively new to VHDL and I'm having trouble working out how to implement trigonometric functions.
I need to implement the following function in VHDL to determine the angle from an inclinometer, and any advice on how to do this would be much appreciated.
alpha = arcsin( (Vout-Offset)/0.035 )
[/

PLD, SPLD, GAL, CPLD, FPGA Design :: 03-08-2013 10:26 :: kureigu :: Replies: **19** :: Views: **2194**

Dear All I have made a simple calculator using pic16F877A in Mikroc. Now I want to improve it. I want to do **operations** on string instead of single single digit. Like 220*450, 556+778 etc.
earlier its is just for single digit like 4+8, 9-4 etc.
pls help me in this regard and Also I want to make functions of **arithmetic** **operations**. Do help (...)

Microcontrollers :: 02-11-2013 07:11 :: tak_iiec@yahoo.com :: Replies: **2** :: Views: **3390**

The 8 bit processors only operate on bytes. Unless you have a processor that can operate on pairs of bytes (some can do 16 bit **arithmetic**) you must manipulate larger numbers yourself.
Keith

Microcontrollers :: 11-24-2012 03:24 :: keith1200rs :: Replies: **2** :: Views: **506**

Hello Dear
I want to use some **arithmetic** **operations** such as (+,_,*) in my design. The design is fix point. Could you please tell me, If I use (+,_,*) symbols in my vhdl code, is it synthesize correctly or not? Or I need to design the units ( n_bit full adder, for instance) then write the code structurally. ( consider it that, I don't start to cod

PLD, SPLD, GAL, CPLD, FPGA Design :: 09-08-2012 20:12 :: sheikh :: Replies: **6** :: Views: **761**

The following are some tutorials covering Fixed Point **arithmetic**:
Fixed-point math in C
Fixed-Point **arithmetic**: An

Digital Signal Processing :: 07-18-2012 22:12 :: bigdogguru :: Replies: **3** :: Views: **1687**

I need to perform
Vout= 0.5 V1 + 0.6 V2 + 0.9V3 - 0.8 V4 -0.9 V5
I know that I have to use superposition.I can easily solve those negative terms simply by assuming Rf and then finding out R1,.. to be connected to the negative terminal of op-amp. But for finding out the positive terms I have many equations and I think I have to solve three

Analog Circuit Design :: 04-27-2012 13:16 :: iVenky :: Replies: **9** :: Views: **1627**

I have made a program for PI controller and the excerpts are as follows-
v1<= v_prev + (k1*iq_error)+(k2*f_prev1)+(k3*f_prev2);
All the variables are std logic vector ( 7 downto 0)
but there is an error in execution of this code-
* can not have such operands in this context.
I have also included IEEE.NUMERIC_STD.ALL; but still error persis

PLD, SPLD, GAL, CPLD, FPGA Design :: 04-20-2012 18:50 :: mohit1108 :: Replies: **2** :: Views: **942**

I want to design a processor that one part of which should be like this
W(k)=Pre_W(k)-3*W(k-1)
pre_W(k)=∑x1(i)^3 i=0 to 7
and my **arithmetic** **operations** are all floating point so i should port map them which i cant use process , to perform this I write the code below s74:multiplier port map (a =>z1(i),

PLD, SPLD, GAL, CPLD, FPGA Design :: 04-06-2012 11:21 :: masoud.malekzadeh :: Replies: **2** :: Views: **497**

Hi All,
Would anyone recommend a GOOD Tutorial/Guide on the implementation of the Fixed Point **arithmetic**?
Interview questions related to the subject are welcomed as well!
Thank you!

ASIC Design Methodologies and Tools (Digital) :: 02-17-2012 16:13 :: ivlsi :: Replies: **5** :: Views: **1278**

In VHDl, Is it possible to do **arithmetic** **operations** between a subtype and it's father type ?
For example:
If signals A and C are definded as integers and signal B is defined as a natural.
Is it legal to write:
C <= A + B;

PLD, SPLD, GAL, CPLD, FPGA Design :: 01-13-2012 22:19 :: shaiko :: Replies: **1** :: Views: **697**

Hi, all,
How to know the power consumed by each of the + - * / and sqrt **operations** in matlab?
Thanks!

Heuristic methods, Machine Learning, AI, and Soft Computing :: 07-05-2011 21:21 :: grit_fire :: Replies: **3** :: Views: **1318**

The difference is in the operation mode. FPU aritmethic is performed sequentially under processor control, one operation at a time. **arithmetic** core functions are placed in the data path and operating in parallel. Parallelization involves both higher speed and higher resource utilization.

PLD, SPLD, GAL, CPLD, FPGA Design :: 06-24-2011 14:56 :: FvM :: Replies: **2** :: Views: **721**

You are using two numeric libraries, that should be used mutually exclusive: the official IEEE.numeric_std and legacy IEEE.STD_LOGIC_ARITH, originally introduced by Synopsis before numeric_std came out. IEEE.STD_LOGIC_UNSIGNED is another Synopsys library, that allows **arithmetic** **operations** on std_logic_vector without defining unsigned objects explic

PLD, SPLD, GAL, CPLD, FPGA Design :: 05-11-2011 20:02 :: FvM :: Replies: **7** :: Views: **2558**

Hi.....
I need help to Design a calculator that will perform basic **arithmetic** **operations** +,-,*, /, on integers.using 8086 microprocessor and 7 segment display for the result.
Refere " The 8086 Book " it has what you are looking for. 17 years ago I did a similar thing using 8085.
If I remember correctly I have us

PC Programming and Interfacing :: 01-21-2011 12:36 :: bluehole :: Replies: **1** :: Views: **2093**

Firstly, MIPS is only a comparative figure. What's even more important is the instructions and how the controller gets a particular thing done. Say for example, you need to have 2 fractional numbers added. Let's take the 5MIPS controller has a better way of managing **arithmetic** and Logic **operations**, and so gets this addition done within 5 instructio

Microcontrollers :: 11-15-2010 16:08 :: Tahmid :: Replies: **12** :: Views: **3194**

PLD, SPLD, GAL, CPLD, FPGA Design :: 10-18-2010 17:46 :: FvM :: Replies: **6** :: Views: **1145**

This is explained better with an example:
Logical shift: Shift Right number 1010 several times:
1) 0101
2) 0010
3) 0001
4) 0000
MSB is always filled with zero.
**arithmetic** Shift: Shift Right number 1010 several times:
1) 1101
2) 1110
3) 1111
4) 1111
MSB is always filled with the previous MSB value.
Another example of ari

Microcontrollers :: 05-04-2010 12:32 :: fcfusion :: Replies: **1** :: Views: **1246**

Hay i want Assembly language code for following programmes
Reading and displaying string, and numerical data
Basic string **operations**
Basic **arithmetic** **operations**
Simple table processing (array of strings, matrices)
Simple file **operations**
Macros
Mixed language (...)

PC Programming and Interfacing :: 04-21-2010 05:50 :: kiran1213 :: Replies: **1** :: Views: **994**

Hi...I am a student.I have got a final project is :
"Design and simulation of an **arithmetic** circuit that computes inverse of an integer".
Computing the inverse of an integer is one of the basic **arithmetic** **operations** supported in general purpose computer systems.The efficient design of this functional unit helps to perform fast divi

PLD, SPLD, GAL, CPLD, FPGA Design :: 04-18-2010 18:12 :: gokhan33 :: Replies: **0** :: Views: **1153**

could anyone correct my codes? Thanks!
Here is a task for reusing **operations**. In this task you must reuse **arithmetic** **operations** as defined below. First you must create a data-flow graph and schedule **operations** for all the required solution.# Each of your designs performs an algorithm - "o<=c1*i1+i2+i3+c4*i4;".
# (...)

PLD, SPLD, GAL, CPLD, FPGA Design :: 01-05-2010 16:32 :: james09 :: Replies: **0** :: Views: **654**

hi, i try to use forth processor and connect it to a memory,then i want to write a program which do **arithmetic** **operations**,write and read from memory but it's difficult to do.can anyone give me a source code and tell me how to transform it to .bin, because i searched but i don't find what i need.thanks

PLD, SPLD, GAL, CPLD, FPGA Design :: 10-06-2009 14:47 :: ramzitligue :: Replies: **0** :: Views: **782**

The manufacturer tells us in their full color brochures ;-)
Seriously: it's the width of the data bus; most **arithmetic** **operations**, data moves etc. work on this number of bits.
JW

Microcontrollers :: 06-29-2009 12:43 :: wek :: Replies: **2** :: Views: **1277**

Can we apply **arithmetic** operation directly over std_ulogc_vectors
I was facing problem(while applying **arithmetic** **operations** over std_ulogic_vector) I resolve it by using
To_StdLogicVector
To_UStdLogicVector
Is there any other solution?
Thanks

ASIC Design Methodologies and Tools (Digital) :: 02-02-2009 08:21 :: C4Cheema :: Replies: **0** :: Views: **855**

Which is the most effective way to implement the following **arithmetic** **operations** in HDL?
evaluate the expressions
|x-y| < z
and
f(x,z) = -x ; z <-x
x ; z > x
x ; otherwise

ASIC Design Methodologies and Tools (Digital) :: 09-19-2008 08:41 :: savour :: Replies: **4** :: Views: **780**

Hi,
I would like to know the power consumption of **arithmetic** **operations** such as addition, subtraction, multiplication and division.
I've code each **arithmetic** opertion in Verilog and estimated the power using XPOWER from Xilinx tools, but it shows 0. Only leakge power consumption are estimated. I'm thinking that the design is simple (...)

PLD, SPLD, GAL, CPLD, FPGA Design :: 07-26-2008 18:20 :: soloktanjung :: Replies: **1** :: Views: **985**

There faster G. Johnson and Matteo Frigo, "A modified split-radix FFT with fewer **arithmetic** **operations**", IEEE Trans. Signal Processing 55 (1), 111?119 (2007).

Digital Signal Processing :: 05-17-2008 12:23 :: vadkudr :: Replies: **4** :: Views: **2025**

Nothing much except that the DSPs are microprocessors (or microcontroller) with special hardware support to do complex **arithmetic** **operations**. This helps them to crunch lot of data in very short time compared to normal micros.

Digital Signal Processing :: 04-18-2008 11:43 :: dipal_z :: Replies: **3** :: Views: **10044**

Ercegovac M.D., Lang T.(2004) Digital **arithmetic**(709s).zip
Koren I.(2002) Computer **arithmetic** Algorithms(2nd Ed)(281s).djvu
Muller J.-M.(1997) Elementary functions algorithms and implementation(218s).djvu
Can you give me any link for these books?
Thanks

Digital Signal Processing :: 04-03-2008 07:34 :: soheyl :: Replies: **2** :: Views: **809**

Hi,
I suggest you search for the following ebooks on Internet (emule) :
*- **arithmetic** and Logic in Computer Systems (Wiley Series) by Mi Lu
*- Digital Computer **arithmetic** Datapath Design Using Verilog HDL: CD-ROM included (International Series in **operations** Researchand Management Science) by James E. Stine
*- Synthesis of (...)

PLD, SPLD, GAL, CPLD, FPGA Design :: 03-30-2008 14:18 :: robinh :: Replies: **4** :: Views: **2130**

hi all,
i need good reference material or C code that performs **arithmetic** **operations** like addition, subtraction, multiplication and division on signed Q10 or Q15 data format considering issues like overflow, underflow, trunctation and roudn-off that may arise during **operations** ....
seeking ur help ...
Added after 2 mi

Digital Signal Processing :: 09-18-2007 12:52 :: rmreddy :: Replies: **1** :: Views: **1378**

Hi everybody,
I need to know if there is any article/paper/algorithm that discusses about how I can compute Hamming Distance without having to take into account the two codewords in bit-level. In other words, Is there any algorithm to compute hamming distance between two positive integer number by using **arithmetic** **operations** without any bit-leve

Mathematics and Physics :: 06-14-2007 07:42 :: khorram :: Replies: **1** :: Views: **1307**

Here is a link to an HDL design of a Floating Point Unit :
Description
This is a 32-bit floating point unit (FPU), which does **arithmetic** **operations** on floating point numbers. The FPU complies fully with the IEEE 754 Standard.
Features
FPU supports

PLD, SPLD, GAL, CPLD, FPGA Design :: 01-29-2007 08:13 :: omara007 :: Replies: **3** :: Views: **8580**

I need some information on fixed point **arithmetic** operation
like if we multiply two Q23.19 format numers what will be the resultant format and how do you reprsent it in 32bit etc
give some document on this topic...
thanks in advance..

Digital Signal Processing :: 10-06-2006 06:22 :: kkashinatha :: Replies: **2** :: Views: **1026**

Hi
I need VHDL/Verilog library for Floating point and fixed point **arithmetic**
Regards,
Vishwa

PLD, SPLD, GAL, CPLD, FPGA Design :: 04-05-2006 06:25 :: vishwa :: Replies: **2** :: Views: **4726**

I need help to apply these programming terms to external components please
What would i use Sorting for "controlling" external components?
How can i use **arithmetic** **operations** to "control" external components?
Subrountines are inside loops or after loops mostly?
How can i use Boolean expressions to "control" external components?
How can

Microcontrollers :: 02-13-2006 05:28 :: walters :: Replies: **1** :: Views: **920**

What software tools and language are you using?
When compiling VHDL or Verilog with XST, you can simply use the "*" multiply operator and signed operands. Refer to the "**arithmetic** **operations**" section in the XST User Guide. XST will automatically infer the multiplier. This makes your HDL easier to read and more portable than explicitly instantiat

ASIC Design Methodologies and Tools (Digital) :: 09-06-2005 03:53 :: echo47 :: Replies: **3** :: Views: **1868**

"Infer" means to use the * operator in your HDL. It is very convenient and fast, if you pipeline carefully.
If you explicitly place a "MULT18X18", then you are instantiating, not inferring.
The HDL compiler does the inferring. If you use XST then read the XST User Guide -> HDL Coding Techniques -> **arithmetic** **operations** -> Multipliers.
Also

PLD, SPLD, GAL, CPLD, FPGA Design :: 02-11-2005 05:19 :: echo47 :: Replies: **6** :: Views: **2623**

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