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9 Threads found on edaboard.com: Avoid Breakdown
Looks to me like they are trying to protect the PNP from E-B breakdown (always a good thing to avoid) and B-C forward bias (which could perhaps leave the PNP engaged (saturation storage time) when it should quench smartly after "doing its thing", and as a result bother the subsequent turnon pulse. Maybe something of a min-off-time issue (commande
Limiting the current, but also ensuring that it spreads evenly so as to avoid hot-spotting and local power density related physical damage. Pullbacks (with salicide block) are the norm in ESD protection device design. They should be used on all pad-connected drains / sources. PMOS may not be self-survivable (i.e. its own D-S breakdown is low en
During processing metalization layers, on metal paths is collecting electrostatic charge which could breakdown the gate oxide in transistors. To avoid this effect a diodes are connecting to long metal paths.
The diodes at the input make the MOSFET gates straddle the input voltage, driving the load to within 2-3V of the input voltage. I would use MOSFETs to drive the FET gates, but we need the higher accuracy from the BJTs. Getting high accuracy and low distortion is going to be extremely difficult, unless you use close
Hi mathos00 , i also design LED product with non isolate solution.this is nightmare if use with MCPCB because the MCPCB can easily failed Hi-Pot test 3.6kV. you can try Thermal insulator with high breakdown voltage and put between mcpcb and casing body.try avoid using metal screw.also creepage distance must be > 6.4mm. and then you need to test wi
Hi, I'd like to know design considerations of ldo, this time operating in wide range supply voltage (2~6V). Load current is just several hundred uA. Do I still need wide swing opamp for this? How to avoid breakdown? Thank you very much for any ideas. Ella
To avoid gate breakdown, pls try series connected poly resistor to limit current and connect a gate-grounded NMOS to this node to clamp the gate voltage.
In the layout, every node, there are two diodes connected in series to avoid antenna, who can tell me how it works,
Dont mind this. if you with to avoid, add a cap or make the input singal slowly