1000 Threads found on edaboard.com: Binary Divider
i want to design an 8-bit binary divider..its transistor level implementation..and thn i have to optimize it using its criitical delay under worst input pattern.
can anybdy hlp me or guide me in this regard
links , pdf files and e-books will b hlpful...
hope a sooner reply
thnxs in advance
ASIC Design Methodologies and Tools (Digital) :: 10-04-2005 10:27 :: harry_madaan :: Replies: 4 :: Views: 2516
hwz life and work goin on?
i have two questions:
1)actually m a student and being assigned project to make 8-bit binary counter and to optimize it in terms of critical path..cmos implemnetation of it. SO can anybdy guide me how shuld i pursue it..i have jst 2 weeks...not more than tht..
2)can anybdy provide me the solout
ASIC Design Methodologies and Tools (Digital) :: 10-14-2005 02:02 :: harry_madaan :: Replies: 0 :: Views: 1097
Look for fast binary division, booth algorithm.
ASIC Design Methodologies and Tools (Digital) :: 01-27-2014 03:01 :: FvM :: Replies: 3 :: Views: 246
Does x.xx.xxx mean 9 minutes 59 seconds 999 milliseconds? If that's true, then you probably need a 1 kHz clock, and you probably want it to be more accurate and stable than a 555 circuit.
You could buy a crystal oscillator that is a convenient multiple of 1 kHz, and then divide it down to 1 kHz. For example, buy a 2.048 MHz oscillator and an 11-
Hobby Circuits and Small Projects Problems :: 12-11-2006 03:20 :: echo47 :: Replies: 16 :: Views: 3477
Maybe using a PLL to multiply the 32768 Hz signal by 10 and use binary counter to divide the frequency by 32768 (15 stages).
Electronic Elementary Questions :: 11-26-2007 08:54 :: rkodaira :: Replies: 6 :: Views: 2340
What are you trying to divide - voltage, frequency, binary number, ... ?
Analog Circuit Design :: 04-27-2005 08:03 :: echo47 :: Replies: 4 :: Views: 1179
Assuming that you want to divide by the number 1024, you change your value to binary. Then shift them to the right 10 times. That will give you the desired 1024 division. Remainders will be lost.
For example, if you have 10000, and want to divide by 1024,
0010 0111 0001 0000.
shift everything right by 10,
0010 01.11 0001 0000
ASIC Design Methodologies and Tools (Digital) :: 12-20-2005 00:25 :: wwfeda :: Replies: 3 :: Views: 928
Can anyone please post a code for "16-bit binary division"..,????
PLD, SPLD, GAL, CPLD, FPGA Design :: 04-04-2013 05:40 :: ponparithi :: Replies: 5 :: Views: 368
Would anyone tell me or show me a link describing the format of the hspice binary transient output file tr* format?
ASIC Design Methodologies and Tools (Digital) :: 06-12-2002 12:15 :: paulc :: Replies: 1 :: Views: 2898
Can any one help me to find the binary codes produced by SONY or PHILLIPS remote controlles?
Professional Hardware and Electronics Design :: 09-29-2002 18:59 :: Free_Will :: Replies: 2 :: Views: 2203
Can someone give me some vhdl source code about Fraction-N frequency divider.
PLD, SPLD, GAL, CPLD, FPGA Design :: 12-18-2002 04:10 :: bjwlgh :: Replies: 4 :: Views: 4431
Does somone have binary complied ng-spice rework 14 for windows?
1. -> t
Microcontrollers :: 12-19-2002 09:42 :: jimjim2k :: Replies: 7 :: Views: 1784
I want to conver a 0-10Vdc signal to 0-2.5 Vdc .I do it by two resistor (1%)as a passive voltage divider,Both the linearity is not good and in some region of full range the value of nonlinearity is high.If I use a .01% resistors the problem may be solved but the cost is too high.
I need to know is there an active solution with opamp fo
Professional Hardware and Electronics Design :: 12-28-2002 18:06 :: 7rots51 :: Replies: 3 :: Views: 2409
Is there any paper on distributed active power divider available????
RF, Microwave, Antennas and Optics :: 02-02-2003 10:05 :: yingyang :: Replies: 3 :: Views: 959
You can follow these steps, very simple and effective:
1- Convert the binary no. to BCD format, this leads to a groups of 4 bits in each group, each group value is from 0 to 9.
2- For every group, ADD 30 (decimal) to the 4bits value ==> ASCII of the digit. (e.g. A value of '1' will be '31' which is the ASCII of digit '1').
3- Repeat step 2
PC Programming and Interfacing :: 02-07-2003 17:17 :: Bus Master :: Replies: 6 :: Views: 2599
Any info about how to generate a non-integer clock divider.
Like Clk_out = Clk_in x (N/M), N and M are integer.
Professional Hardware and Electronics Design :: 02-14-2003 11:57 :: RTL2GDSII :: Replies: 5 :: Views: 1377
@ltera: One Hot State Machine vs binary/Gray Code State Mac
PLD, SPLD, GAL, CPLD, FPGA Design :: 02-23-2003 08:45 :: uummcc :: Replies: 0 :: Views: 2361
I need to chop a big binary files into smaller block in unix, upload, transfer and reassmbly. Similar as Winrar could in windows
Linux Software :: 04-25-2003 03:11 :: Cathay :: Replies: 5 :: Views: 1966
I will need to implement the Fraction-N frequency divider using ALtera or xilinx FPGA.Can someone give me some vhdl source code and aritiles about Fraction-N frequency divider.I donot understant the principle until now.
PLD, SPLD, GAL, CPLD, FPGA Design :: 05-11-2003 20:34 :: bjwljh :: Replies: 1 :: Views: 2279
i want to feed a microstrip patch array antenna with corporate fed ....please help me about this fed and how i can use power divider in this project .....and intruduce me a good website and homepage about antenna and propagation..
RF, Microwave, Antennas and Optics :: 05-23-2003 12:34 :: kelardasht :: Replies: 1 :: Views: 1691
I have a binary counter and I want to use the output to switch 4 relays. I want one relay to come on at 00, the next at 01, etc. This was originally done with a multiplexer and transistors. Anyone think of a simpler way?
Hobby Circuits and Small Projects Problems :: 07-29-2003 12:19 :: yeha :: Replies: 7 :: Views: 2542
I'm designing a 8-outports divider now. Freq is from 8GHz to 18GHz ,I fell very difficult because the practice is worse than simulation.
i use SERENADE8.71A
Can someone give me a practice ?
Thanks a lot!
Electromagnetic Design and Simulation :: 09-16-2003 05:28 :: jiafeima :: Replies: 4 :: Views: 1266
I need to convert a 16 bit binary to 5 digits ascii. I found some examples in PICLIST but they didn't work (I don't know why). I think that I'll have to burn several neurones to make a good routine.
Does anybody have other examples?
Thanks in advance
Hobby Circuits and Small Projects Problems :: 09-29-2003 23:12 :: PauloMota :: Replies: 7 :: Views: 4319
I am fiddling with some direct conversion receivers. My question is this: I want a try using a Tayloe detector. For this I obviously need a vfo. Most of the designs I have seen use a DDS to achive high resolution tuning, but I was wondering if it wasnt possible to do it with some sort of fractional programmable divider or something, in an
RF, Microwave, Antennas and Optics :: 10-21-2003 09:04 :: twinsen :: Replies: 2 :: Views: 2210
Under DOS use:
first use MODE command to set serial comm parameters, then use:
COPY filename COMx: /B
/B - binary file
/A - ASCII file
PC Programming and Interfacing :: 10-23-2003 01:27 :: marie65 :: Replies: 3 :: Views: 2134
I'm using Codewarrior 6.1.1 for Embedded PowerPC (EPPC). I want to link several large binary files (FPGA bitstreams) into my C project. I can do that easily in GCC using a linker command-line option, but how do I do it in Codewarrior?
If that's not possible, is there some way to convert my binary files into Codewarrior compatible object files? I
PC Programming and Interfacing :: 11-09-2003 15:53 :: echo47 :: Replies: 0 :: Views: 1011
what is the easiest way to convert decimal to binary in C# ?
Is there any library function to do the same ?
PC Programming and Interfacing :: 12-08-2003 22:03 :: coolchip :: Replies: 1 :: Views: 2184
i wants to make a power divider for coax .how to do?(three way)
RF, Microwave, Antennas and Optics :: 12-17-2003 02:13 :: tiger4z :: Replies: 3 :: Views: 1007
Does anyone know a frequency divider IC to convert 2 GHz oscillator to VHF band.
RF, Microwave, Antennas and Optics :: 01-19-2004 22:58 :: fahsa :: Replies: 2 :: Views: 1345
Any idea about a 2ghz oscillator design to feed an binary counter? The output should have at least 500mv peak to peak to drive the input. Thanks,
RF, Microwave, Antennas and Optics :: 01-29-2004 07:33 :: pisoiu :: Replies: 7 :: Views: 2093
i do not find www?
need multiplier,divider 74ls194 or acc ?
Electromagnetic Design and Simulation :: 02-11-2004 02:16 :: zk543g :: Replies: 0 :: Views: 1472
Is there any simple method for calculate the checksum for binary file.
For ex. I want to calculate the checksum for AT89C51 binary file.
Microcontrollers :: 02-12-2004 19:54 :: SphinX :: Replies: 6 :: Views: 5698
Anyone can help me?
I have binary file for starsat stb (digital sattlite reciever),how can i convert
this file to instrections and change it's pictures to personal or
Found the header jpeg in your binary or make some program to show bmp file.
Embedded Systems and Real-Time OS :: 05-27-2004 08:44 :: jhonny_yang :: Replies: 4 :: Views: 2567
Your question is not well specified. Divide ratios are not fractional it is only 3 modulus divider binary related. Please specify your requirements and do you looking for synth, chip or separate divider chip?
RF, Microwave, Antennas and Optics :: 03-10-2004 06:53 :: xtasa :: Replies: 4 :: Views: 1396
I want to implement a divider in VHDL, operands are std_logic_vector(). How can I do it?
PLD, SPLD, GAL, CPLD, FPGA Design :: 03-22-2004 08:49 :: vkchau :: Replies: 5 :: Views: 8234
Thanks in advanced!
I need divider for my thesis job!
Details is Fixed point,
Dividend = 32 bit
Divisor = 16 bit
Quotient <= 30 bit
Reminder = 16bit
Frequency minimum = 70 MHZ
RTL code sample
Xilinx FPGA VII 6000 -4
PLD, SPLD, GAL, CPLD, FPGA Design :: 03-24-2004 21:59 :: ukyo :: Replies: 2 :: Views: 4964
I am new to matlab... i would like to know how can i generate a series of digital binary data in simulink... e.g. if i want to generate 10101100 ... how do i do that ???
PCB Routing Schematic Layout software and Simulation :: 04-03-2004 17:40 :: wireless :: Replies: 1 :: Views: 1486
I want to design a unequal power divider of 8mm.I need the following paper:
J.Joubert and S.R.Rengarajan,"Design of unequal H-plane waveguide power dividers for array applications",Microwave Journal,Euro-Global Edition,Vol.40,no.2,pp24-34,Feb 1997
who can help me?
RF, Microwave, Antennas and Optics :: 04-07-2004 09:26 :: microwaveboy :: Replies: 2 :: Views: 1083
I did it before using Microcontroller, so I'll explain the idea and you can translat it into HDL.
Suppose you have number equal 32 (in binary form and you want to covert to decimal
1- Divide 32 by 10 --> it will produce 3 and the renaider is 2
2- the remaider 2 is the least significat digit in decimal number you can use a table like to generat t
PLD, SPLD, GAL, CPLD, FPGA Design :: 04-27-2004 04:02 :: Al Farouk :: Replies: 4 :: Views: 1485
74184 BCD to binary Converter
74185 binary to BCD Converter
Microcontrollers :: 05-26-2004 16:21 :: SphinX :: Replies: 7 :: Views: 1757
use PLI , can read binary file.
ASIC Design Methodologies and Tools (Digital) :: 07-23-2004 01:44 :: patrickli :: Replies: 13 :: Views: 3631
This file contain a dual modulus divider 22/23
(from T.H. Lee's paper)
But I use matlab simulink to run this schematic
the modulus is alaways 41/42 . Could somebody tell
me what modulus is this ??
RF, Microwave, Antennas and Optics :: 06-08-2004 11:04 :: iemotions :: Replies: 0 :: Views: 1090
Hi, this is my problem (it's the continue of the topic:"frequency divider with NCO"):
I've to describe a clock frequency divider by a fractional value. All digital in VHDL (also behavioral). What can I do ?
Thanks for your advices
Electronic Elementary Questions :: 06-22-2004 03:08 :: Charlie.za :: Replies: 1 :: Views: 1808
The (only) thing that would make any particular byte value a special symbol is how it is interpreted by the applications that send and receive it. So, use something easy to detect, 0 or ff, and you will have to also make sure that this value *is not* sent by your app in any of the multimedia data.
This can be done either by encoding the data so
PC Programming and Interfacing :: 07-06-2004 15:15 :: barny451 :: Replies: 5 :: Views: 956
I would to write a PLL kind of stuff using VHDL using @ltera fpga, and would sincerely appreciate any ideas on doing it. I'm trying to derive a 12MHz clock from a 48Mhz clock. The 12MHz clock will only start generating once a predefined input sequence pattern has been receive. The input is also 12MHz based.
I've try to use din'EVENT to
PLD, SPLD, GAL, CPLD, FPGA Design :: 07-15-2004 10:36 :: aeneas81 :: Replies: 3 :: Views: 3061
i have some problem while programming in assembly language.
can anyone tell how to divide a binary no. to another binary no. .
multiplication is also a problem too.
Microcontrollers :: 07-17-2004 12:37 :: gopalkc :: Replies: 5 :: Views: 1326
I need a power divider in my power amplifier for 200-500MHZ frequcy band.its power is CW 50w,and the max insertion loss less than 0.6dB.more importantly,I hope its size is small enough (length<50mm,width<12mm)to be fixed on the PCB.but I can not find such product in many RF companies.
I want to design it by myself.but bec
RF, Microwave, Antennas and Optics :: 07-25-2004 11:50 :: mucaowan :: Replies: 3 :: Views: 1349
I need to design a trimmable fractional divider. The input frequency varies from 10 to 25MHz and the output frequency should be trimmed on-the-fly by means a GP register to 8MHz +/- 2-3%. The jitter on the output is not a big issue!
Any info is welcome!
ASIC Design Methodologies and Tools (Digital) :: 08-04-2004 11:06 :: kukurigu :: Replies: 0 :: Views: 935
We all know 16bit SRT radix-4 divider will be faster than normal 16bit divider, but for 8bit, is it still true?
And is there anyone can provider SRT radix-4 divider with carry save adder?
ASIC Design Methodologies and Tools (Digital) :: 08-06-2004 04:17 :: wwfhm2002 :: Replies: 1 :: Views: 1029
hi all my friend
suppose we have a binary file and tend to program any devices like FPGA,microcontroller
,... and so on with this file .
how i can do this with piece of code and how i can write this application?
does anybody have a doc's ?
Electronic Elementary Questions :: 08-14-2004 08:14 :: vaf20 :: Replies: 1 :: Views: 1319