1000 Threads found on edaboard.com: Cadence Text Editor
You may set editor environment variable in the shell profile. ( .cshrc for csh). The text editor useb by cadence may also be set int the '.cdsinit' file or .Xdefaults.
Analog IC Design and Layout :: 01-07-2005 08:05 :: Hughes :: Replies: 3 :: Views: 6016
I'm a newbie in vhdl coding and ready to learn. I want to enter vhdl file. How to create VHDL file in cadence using text editor is confusing me. Any help would be appreciated.
Thanks in advance.
Electronic Elementary Questions :: 12-27-2011 18:43 :: William22 :: Replies: 2 :: Views: 587
I hate cadence schemetic editor, Composer, I couldn't find any shortcut keys for schemetic editing, ie, move, rotate, group moving, it looks very stupid, (compared to OrCAD), what is your comments?
ASIC Design Methodologies and Tools (Digital) :: 06-06-2003 20:03 :: dd2001 :: Replies: 2 :: Views: 1601
Personally I dont like much the WYSIWYG system, I like much more the LaTeX Idea, but I have found this TeX-Macs that's a very nice system for writing papers, the really good thing about it, is the built-in capabilities to invoke gnuplot,scilab...and a lot more other programs to contribute your paper
From the site:
Software Links :: 12-18-2003 12:34 :: deepspawn :: Replies: 0 :: Views: 857
Crimson editor v 3.60r (cool text editor)
I found this and I would like to share it
/ Warning #1 - Files deleted. Don't upload files from the internet, just post link instead!
Software Links :: 05-26-2004 20:08 :: havacilik :: Replies: 2 :: Views: 1362
I'm looking for a good text editor for verilog design. gVim & Emacs have too long learning curve.
Do you have to propose some convinient text editor for Linux platform?
Linux Software :: 12-16-2005 10:18 :: ldm :: Replies: 5 :: Views: 1397
The question is:
What's the best text editor for Solaris for Verilog coding?
ASIC Design Methodologies and Tools (Digital) :: 04-20-2006 15:41 :: drabos :: Replies: 13 :: Views: 4107
i want a source code of ASSEMBLY language of project "text editor+FILE HANDLING"
THIS IS JUST LIKE A dOS editor IN WHICH WE HAVE THESE OPTIONS 1)FILE
Microcontrollers :: 11-23-2006 02:26 :: usman_star2 :: Replies: 1 :: Views: 1780
I'm looking for HDL turbo writer. In fact, i did contact SAROS Inc to get the installer. Unfortunately, they no longer product this software for many years ago.
Do anyone here can share me the installer/evaluation installer?
What do you guys think about the best HDL text editor? Which one can provide the best text editing feature? (...)
PLD, SPLD, GAL, CPLD, FPGA Design :: 12-22-2007 02:06 :: choonlle :: Replies: 2 :: Views: 3367
I'm searching for text editor that allows us to copy the code with the line numbers for my project report. Does anyone know any text editor? I've tried searching in Google and found out Notepad++, but the line numbers is not as desired (its line numbers display as 0000001,00000002 and so on which is not (...)
Software Requests :: 05-10-2008 05:04 :: soloktanjung :: Replies: 2 :: Views: 158
Where can you find the component libraries in cadence PCB editor, so you can see the footprints?
PCB Routing Schematic Layout software and Simulation :: 01-20-2009 02:46 :: tyassin :: Replies: 9 :: Views: 12779
I'm trying to determine if there is anything about the altera design flow that benefits from the built in text editor over, say vim or emacs. Thus far I've been very disappointed by altera's documentation.
mainly, I'm looking for the following functions:
1.) vertical split pane view.
2.) insert-mode macros (imap from vim) for things like st
PLD, SPLD, GAL, CPLD, FPGA Design :: 07-29-2010 04:11 :: permute :: Replies: 1 :: Views: 681
is there any way to generate two different model name for one NMOS symble
in cadence schematic editor on the basis of two different case.
such as, when I run simulation, I take mn for NMOS, when I run layout LVS check,
I take mni for model name. (mni for isolated nmos transistor, simulation model woulde be same)
overall, I want some control
Analog IC Design and Layout :: 03-17-2011 23:31 :: kalahara :: Replies: 2 :: Views: 446
I eventually want to run monte carlo. I know this could be done in HSPICE by synopsys, but I was wondering if it can be done in cadence schematic editor? Coz I think it will be easier for me to do it in tool which is already known rather than learning a new one!
ASIC Design Methodologies and Tools (Digital) :: 05-20-2011 23:35 :: dhaval4987 :: Replies: 1 :: Views: 644
I have no idea what happened but the icons over the text editor have disappeared
Everything was fine until last night and today morning at work it was fine from PClinux with firefox 3.5
Then at home I have tried with XP/firefox 3.5 and XP/firefox 5 and PClinux/firefox 5 and none of t
About EDAboard.com :: 07-13-2011 12:32 :: alexan_e :: Replies: 11 :: Views: 1177
I am used to gvim in Linux.
Would like to know which text editor suits me best in Windows 7
Software Links :: 08-20-2012 22:26 :: dftrtl :: Replies: 10 :: Views: 143
Which one is the best text editor for working with the 10GB text files? Working like cut,copy and paste.
Is there any specific option for GVIM?
Let me know if any another text editor working easily with such types of files.
Thanks & Regards,
Linux Software :: 01-17-2013 01:18 :: maulin sheth :: Replies: 5 :: Views: 572
Recently I instal IAR EW for MSP430 v5.51.6. It has a new text editor. I open my project and what I see is that all file tabs in editor window is without extensions. I have global.c and global.h. In new editor tabs look the same. How to make extension to be visible?
Microcontrollers :: 04-22-2013 05:02 :: LVitya :: Replies: 0 :: Views: 172
I wanted to port a text editor on ARM microcontroller (it could be LPC2148 or Stellaris one not decided yet, will decide based on memory requirements). I found leafpad text editor which is a light editor and its source code is available and i am thinking to port that on ARM ( ). Please let me know if
Microcontrollers :: 07-08-2013 04:52 :: ss_shrenik :: Replies: 8 :: Views: 390
I'm looking for a good text editor for VHDL code on Mac. Do you know one ?
PLD, SPLD, GAL, CPLD, FPGA Design :: 08-16-2013 13:10 :: glias :: Replies: 8 :: Views: 905
How to estimate the power consumption and delay of a digital circuit in cadence Schematic editor?
Simulator used is Spectre.
Please kindly help me in this.
Analog IC Design and Layout :: 12-09-2013 12:57 :: the moon is back :: Replies: 2 :: Views: 304
i am useing cadence IC 5.141 on Suse 10
i tried to change the editor by be gedit or kwrite instead of the defult editor vi
but when i try open any cell view (eg.verilogA) i get this error
/usr/local/cdstree/tools/lib/libgcc_s.so.1: version `GCC_3.3' not found (required by /usr/lib/libstdc++.so.6)
i tried it with gedit ,kwrite, kate , (...)
Linux Software :: 03-29-2006 19:36 :: ramy_maia :: Replies: 7 :: Views: 8052
Select move and in the find filter turn off everything and turn on only the mark in "text". Now move Your txt's and ritgh click to be able to turn the txt.
You might wanna look at cadence forums or at sourcelink to find some skill that do task automatically.
PCB Routing Schematic Layout software and Simulation :: 08-25-2009 06:38 :: lhademmor :: Replies: 1 :: Views: 2224
Set the environment variable editor=<editor PATH> in your run cadence script.
Software Problems, Hints and Reviews :: 05-05-2010 16:26 :: kingweck :: Replies: 1 :: Views: 1159
Whenever I did not have Viewall() in the cadence Virtuoso layout editor, I could not see the note text in cadence Composer schematic editor. Every time it happened, I had to open the layout editor, hit the Viewall() command, then, went back to schematic editor to see all (...)
Analog IC Design and Layout :: 11-14-2011 10:00 :: Vanderpollator :: Replies: 3 :: Views: 1044
Design with other layout editor as magic and then export to cadence in GDSII format.
ASIC Design Methodologies and Tools (Digital) :: 01-25-2004 06:12 :: bastos4321 :: Replies: 4 :: Views: 2232
From L-Edit, export your design in GDS2 format, then stream in the GDS data into Virtuoso.
Please make sure that the GDS layers between Tanner and cadence are the same.
Analog IC Design and Layout :: 01-23-2005 08:15 :: mm6349 :: Replies: 4 :: Views: 2855
If you use the vpulse cell from analogLib library shipped with cadence (not modified) and get these errors, maybe it is a bug.
Software Problems, Hints and Reviews :: 03-21-2006 10:18 :: Hughes :: Replies: 14 :: Views: 5011
I am working with cadence tool. I am using schematic editor with the 90n technology, but while simulating I am getting failures. With the .18u and .25u the things are fine. Can anyone help me in this regard.
The log message is as follows:
w *WARNING* - cadence? Analog Design Environment: No directory selected
Software Problems, Hints and Reviews :: 09-11-2006 19:01 :: spartacus2 :: Replies: 0 :: Views: 1652
I am designing DIGITAL PHASE LOCKED LOOP using cadence.
I have written VERILOG-A code for the Digital Phase Locked Loop. But the actual problem is :--
1. I am opening Verilog-A window from CIW and editing the verilog code. It is giving `include "constants.vams" instead of `include "constants.h".
2. If I edit the verilog code by Pressing
Analog Circuit Design :: 11-23-2006 08:20 :: prashanthsree :: Replies: 3 :: Views: 1027
cadence PAS (PDK Automation System) can help create PDK.
Who knows which features needed to run this tool?
Analog IC Design and Layout :: 05-05-2009 04:16 :: tsinghua :: Replies: 5 :: Views: 4482
you need to specify the location of the symbol file. psm file and pad file in user preferences>> design path>>pad path and psm path.
make sure there is no space or any character in the file names that cadence does not support.
after doing this you will be able to place your parts
hope this help.
PCB Routing Schematic Layout software and Simulation :: 10-22-2008 04:47 :: Anonymous_Ricky :: Replies: 3 :: Views: 6017
There are many example model files in cadence installation directory..
Analog IC Design and Layout :: 12-17-2010 15:40 :: BigBoss :: Replies: 14 :: Views: 5477
cadence, like other vendor, has their own proprietary format, so you won't be able to use any other tool (e.g. text editor) to view their file (it's in a binary form by the way). However, cadence, like other vendors, also support the open format VCD, which is in a text file.
For your purpose, it's (...)
ASIC Design Methodologies and Tools (Digital) :: 02-18-2010 04:08 :: skyfaye :: Replies: 2 :: Views: 1525
I have two important answear:
1. Orcad PCB editor or cadence Allegro have a union functionality how Altium Altium Designer you can place and route a part of the circuit and than I can do a union of this section of the circuit and than move it in the board how a single component.
2. There is a tutorial for cadence PCB (...)
PCB Routing Schematic Layout software and Simulation :: 08-25-2011 18:43 :: valeriogiampa :: Replies: 3 :: Views: 1824
For cadence simulation I am not using ADE instead I have to generate spice netlist, generate the test bench according to circuit parameters, convert it to spectre and then run the simulation using unix command. My problem is this method is totally new for me and don't have any idea how to edit test bench, write a syntax and run sim
Analog IC Design and Layout :: 10-04-2011 18:38 :: brjaiswal :: Replies: 7 :: Views: 1726
Hello to everyone,
I am new to the cadence OrCAD Capture CIS and Allegro suite. Now I need to create a pcb with those tools. When I activate the generation of the netlist I get the following errors/warnings:
* Netlisting the design
PCB Routing Schematic Layout software and Simulation :: 08-01-2012 06:59 :: clupus :: Replies: 4 :: Views: 2026
i am new to cadence . i go through various tutorials. i make one footprint in orcade pcb editor and save it as dra file at location
when i open pcb editor and then open this foot print its look perfect as i created . but when i import through schematic made in (...)
PCB Routing Schematic Layout software and Simulation :: 12-06-2013 02:25 :: karan29 :: Replies: 3 :: Views: 486
Can anyone please help me in knowing the difference between cadence virtuoso layout editor and cadence virtuoso XL editor??
Electronic Elementary Questions :: 02-17-2014 06:19 :: vrinda.thingale :: Replies: 0 :: Views: 264
something weird going on - anyone have expertise here? i have run out of options to try...
new project (library), new cellview (called onefet). edit schematic to include 1 nmos, 1 resistor from drain to vcc, 1 vcc of 5v and 1vg of 2v (to gate). all seems fine.
when simulated with spectre, it reports that nmos N0 has no model. this happens
Linux Software :: 06-25-2003 05:45 :: electronrancher :: Replies: 9 :: Views: 1868
annyone who can tell me how can i convert spice3 model to pspice9 model? i use pspice 9.21 in cadence PSD 14.0.
Thanks a lot!!
Software Problems, Hints and Reviews :: 11-16-2003 19:36 :: yaodao :: Replies: 4 :: Views: 1470
who know how to use batch command "si" to cdl out netlist from cadence virtuoso editor tool?
Software Problems, Hints and Reviews :: 04-14-2005 06:54 :: grace :: Replies: 0 :: Views: 1691
edit your profile file in a text editor and write these two lines
PATH=$PATH :/path to executable of cadence in bin folder
Software Problems, Hints and Reviews :: 06-01-2005 11:41 :: m_mosazadeh :: Replies: 4 :: Views: 1223
What is vi editor? is there any vi editor can use in wondows?
Linux Software :: 08-23-2005 22:26 :: lcs81 :: Replies: 9 :: Views: 1227
In cadence, H editor can not let you do post layout simulation for the top cell, first you need new a cell , then put the cell which you extracted the pex in to the new cell, then build a config view for this new cell, to specify which view to be used for the layouted cell.
Analog Circuit Design :: 10-01-2005 23:45 :: pi331133 :: Replies: 2 :: Views: 1629
i have an error when trying to close the verilog text editor to compile using :wq
cannot find ncvlog excutable from your path. Please updateyour path to point to the correct excutable or use vmsNcvLogExcutable variable to specify the excutable to use.
any fast help plzzz.
Software Problems, Hints and Reviews :: 02-05-2006 12:25 :: safwatonline :: Replies: 0 :: Views: 1540
any interactive method to create do files other than text editor?
PCB Routing Schematic Layout software and Simulation :: 03-25-2006 05:15 :: bijug007 :: Replies: 4 :: Views: 2574
Thanks in advance.
Software Problems, Hints and Reviews :: 05-15-2006 04:43 :: asic_ant :: Replies: 6 :: Views: 3756
do somebody have manual or user guide to help import the 2/3D strutures in text format as using IE3D simluation software? thanks a lot
Electromagnetic Design and Simulation :: 05-23-2006 02:29 :: cappuccino80 :: Replies: 5 :: Views: 971
i changed the default vi text editor in cadence to jedit , how can i compile with the new editor as in vi i usually use ":wq"
Linux Software :: 06-16-2006 14:01 :: safwatonline :: Replies: 3 :: Views: 1108