10 Threads found on edaboard.com: Cv Curve
I'm simulating nMOS Cap to get estimate of the capacitance value. I used the old technique ( @ 1time constant, Vc=63.2%of Vin) then I found the capacitance ( C=time/R)
the circuit is attached, I used LTspice.
I want to get the CV curve for this nMOS cap as it is more practical, so can any one help me how to get this curve in the si
Analog Circuit Design :: 11-03-2016 18:48 :: bio_man :: Replies: 2 :: Views: 285
There are a number of solutions;
You can extract a CV curve using ATLAS and sweeping the voltage and defining the steps. You could then consider plotting 1/C^2 vs voltage to extract the threshold voltage.
Alternatively both ATLAS and ATHENA allow you to extract the VT voltage directly, which you could also conduct for comparison.
Finally, I assume
Software Problems, Hints and Reviews :: 07-10-2013 10:32 :: Kenneth_Potter :: Replies: 1 :: Views: 1980
Look at Fig. 4.4. (C-V characteristic of a poly/n-well MOSCAP) in the PDF below. The deep depletion region is the range in the depletion region, where the low frequency CV curve is at (or close to) its minimum, or - in short form - the center part of the depletion region.
At the min. value of the CV curve (in the cente
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 06-18-2010 10:42 :: timof :: Replies: 9 :: Views: 7726
I did In CADENCE. I swept the gate voltage and shorted the Drain, Source and Bulk terminal to GND. I did the DC analysis. Now I want to plot the CV curve. But I don't know how to do it??
Please can anybody tell me the way how to do it in CADENCE???
Is it ok to do it in DC analysis? I think the capacitor's val
Analog Circuit Design :: 05-28-2011 19:30 :: enchanter :: Replies: 5 :: Views: 3415
the tuning range of the VCO depends on the CV curve of the varactor , so to get high tuning range u need the vacattor to have wide tuning volateg
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 04-17-2008 04:15 :: khouly :: Replies: 6 :: Views: 1426
You can't modify the varactor CV curve, but the overall circuit circuit characteristic.
You need to redesign the tuning circuit so the varactor is directly coupled to the LC circuit and recalculate the LC values to cover the domain. You may try to minimize the voltage on the VCO LC tank so the AC voltage on the varactor is much lower than 1V and i
RF, Microwave, Antennas and Optics :: 01-24-2008 07:49 :: Eugen_E :: Replies: 2 :: Views: 1145
can any one tell me hw to plot CV curve of a simple nmos using cadence?
means hw to go abt.?
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 09-20-2007 06:01 :: sachinmaheshwari :: Replies: 0 :: Views: 950
Connect in series 2 DC sources:
One of them has Vdc=Vgate Vac=0
Another Vdc=0 Vac=1m
Use AC analysis and change Vg as sweeping parameter.
Then plot C= Ig/(2*Pi*Freq*Vgs) vs. Vgate. You will get CV curve.
I did that several times in Cadence. It works fine.
There is another method using transient with fixed frequency.
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 09-12-2006 06:46 :: Fom :: Replies: 4 :: Views: 4033
i know maybe it is convinent to simulate by using ads
and i want to know how to do that in hspice,
to simulate varactor is it by using "LX" ?
RF, Microwave, Antennas and Optics :: 05-24-2005 03:20 :: gargoyle :: Replies: 0 :: Views: 1383
u can plot the capacitance , by using s parameter simulation or ac simaltiuon
just sweep the control voltage
and get the input impedance , the imaginary part is equal 1/(2*pi*f*c)
u know f then u can get C
or in hspice manual there is anonther way to polt Cv curve of search there
Analog Circuit Design :: 05-08-2005 14:06 :: khouly :: Replies: 2 :: Views: 844