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Hello, There is a good news that vivado 2016.4 now support version 2 ieee standard encryption. I succesfully encrypted (.v) files by using the command as shown below in tcl console of vivado: encrypt -key -lang verilog <design>.v -ext .vp the above command encrypt entire code but, my
Hello everyone, I also need a research proposal in the field of IC design to apply for a Ph.D. position. Could anybody Help me regarding that? Please let me know if you can send some samples or tips... Thank you in advance, Mahsa
Required to provide an initial design for a GSM cellular network covering the Gaza Strip. In particular, the topology of the network including cells and clusters need to be determined. In addition, an initial frequency plan need to be provided. Your design should take into account the following details: ? Frequency Spectrum: 50 MHz (...)
Dear Sir, I am pleased to contact you for a possible cooperation on my VLSI research and writing project. This project is evolved out of my graph theoretic research plan for VLSI ? Very Large Scale Integration ? design, particularly the latest IC technologies such as Quantum circuits Spin based circuits Nano IC technologies DNA chips Cellu
Dear all I need to instantiate an Altera float-point matrix multiplier megafunction in my design, and plan to implement it with a one-hot state machine. The problem is that the filed generated by the quartus megafunction wizard have errors, such as in the .v (I use verilog) file there is Error (272006): MGL_INTERNAL_ERROR: Port altfp_matrix_mult|
Dear forum readers, I have an old plan to load a lipo pack of 12V2AMP by using a single 0.5V 8Amp solar cell. For this I need a low input voltage boost inverter with MPPT control. I have been looking for a design and haven't found any. Assuming I have a partly loaded LIPO pack and an Arduino an inductor and and a MOSFET. Is there any one who has t
my self sivakumar from chennai, i have completed b tech, now i am plan to do, so i need part time job. i have completed certification course on electronics design automation. Contact number 8438377679.
Hello, I want to use QRC for extraction of a digital design. I saved .def file from soc encounter, and plan to extract rc. But I got such an error that it seems I can only use LEF or libgen. But I think DEF should be fine for extraction. Is there anything wrong ? 127905 Here is my command file. I lunched the qrc
Best way to avoid trial and error is to reconsider the design, e.g. place a ?C near the sensor and use reliable RS485 communication over the distance. Or plan I2C operation at reduced speed of a few 10 kHz maximum.
Hi, I already design a LNA schematic and layout, so far so good. Now, I plan to make it as a differential pair LNA... I had some idea about the schematic and test bench, but it does not work very good specially when it comes to layout. Can anybody introduce me the references I can use for finding the structure os schematic and also the test benc
I have a design with max19507. It seems the default analog input (ADC input) is between 0.4 and 1.4V. (I have connected IN- to ground and IN+ to the input signal.) Is there anyway to change the input analog range to 0 - 2.5v? In page 15 of the datasheet it has been described but I am not sure I understand it or not. If I connect REFIO pin to 2.5
Cheap must be defined in the context of the total quantity you plan to purchase and the cost for your time to design one with non-linear responses. LM75 is a linear sensor that is easy to use. Whereas all hospitals use diodes for disposable sensors for cheapest solution using -? mV/'C Shockley Effect but low voltage and Thermostats use thermist
I've been working on a design for a project of mine that will use a PowerStream LiPo battery ( ). It has no thermistor or anything, so I plan on charging it at a 1/2C rate using a Microchip MCP73812 which allows for charge rates down to 50mA. My question is, what is the proper way to connect both t
Hi to all; My question is that, Can we calculate the RCS of an FSS design in HFSS by using the Floquet port? I have been told by some one that you should use incident plan wave to excite the unit cell of FSS and for that also change the solution setup in HFSS. Is there any way to calculate the RCS using Floquet ports along with the Master &
Hello all, I'm starting an active filter design with in .18u technology. Its a low pass butterworth approximation with 0dB gain and with frequency tuning capability. I'm confused about selecting the topology for the implementation. There are topologies like Sallen?Key topology,Tow-Thomas biquad filter topology and Multiple feedback topology. Fo
Will you change any load suddenly? Because if one load changes suddenly on one supply, the other two supplies will change suddenly. This is something to consider in your design. Perhaps you plan to put regulation on all three supplies? So it looks as though that is four windings you're talking about? I believe you will need to do a lot of winding
Hey guys, I recently wanted to make one of my hobbies a profession. It is basically a custom LED design company. Despite having a job and saving up most of the money I need a small amount more. On the link to my fundraising site ( ) you will see some of the designs I plan on doing. Such as mirrors, tables, and just
I would recommend universities in Belgium: UCL and KUL have one of the best levels for PhD in RF & analog IC design
You need to design a testbench that covers as many cases as possible. They are still referred to as testbenches, even when using UVM. UVM is just a system verilog library of common module behaviour and checkers. So its not a method in itself - a poor testbench using UVM is still a port testbench. You need to think about your test plan? whars the in
I plan on using the qflowl for design exploration, but I need power and/or energy numbers for this task. Does anyone know of a FOSS tool for power analysis?
These rating look good . Does the input capacitance of the device feature in the power supply design e.g. is it part of a SMPS, in which case you must make sure you have enough drive capacity. Frank
Hi, I write a custom library for synopsys design vision which only consists of XOR, NOR, and IV (inverter or NOT). My plan is to synthesize a combinational logic such that the resulting netlist has minimum number of NOR gates. I write the library as flows: library(and_or_xor) { cell(NOR) { area : 1000; pin(A
Hello, I design supercapacitor charger/discharger. Output voltage 0-15V. Output current 0-10A. Capacitors capacitance: few hunderts F. I plan use LT3761 to charge, set current, and voltage I know. Question is how to extend this circuit for discharging? Regards
Mobile Computation Project You are required to provide an initial design for a GSM cellular network covering the Gaza Strip. In particular, the topology of the network including cells and clusters need to be determined. In addition, an initial frequency plan need to be provided. Your design should take into account the following (...)
You say, your 16F887 is presently working with 2.5 V supply and should be used at 5V in the new design. There's no configuration fuse that must be changed in this case, unless you plan other modifications that haven't been reported yet. A confusing point in your post is the said 10 MHz crystal, because 2.5 V operation is specified for 8 MHz
Hi all, I plan to connect those battery in series. I'l design a charger using one of the charger ic (this is the easiest approach) . 1) However, the main question is should I balance those cells ? Is balancer required ? 2) Another question , when charge is in progress the device (weather system) should still operate
hi guys i wrote a big program for an electronic system based on pic microcontroller after testing i didnt find any problem but im going to design a test plan to will sure system hasnt problem how must be design an embedded software test plan. please help:roll::roll: Hi, I have some experience of this. What
hi. im trying to design a linear horn array with slant linear polarization. its bandwidth is 6-18GHz. for one element i should design a quarter waveplate. could any body help me in designing such waveplate or investigate better plan. thanks in forward.
Well, if you really plan to take it all the way to round-n-shiny then you need more than schematic editing, you need things like at minimum a SPICE netlist export (preferably an integrated layout and verification tool - SPICE:SPICE LVS can give you a thumbs up / thumbs down but is not too debug-friendly). The LASI system is kinda cute, has schemat
Hai, we got the TSMC PDK approval through Europractice. they gave some procedure (register) to access the design kit. if i register to access the kit, should i pay any cost for that? i dont have the plan to fabricate the design.
Hi every one .. I plan to design small GPS trucker using GPS reciver and gsm modem (sim900) with pic18f microcontoller , in my prototype board , every thing work fine but my question: what is best alternative way for removing 1000uf in power supply section for the modem ? it so big , almost all parts in the pcb is small expect the 1000uf also
Are you sure you want to use radio waves, not sound waves? What frequency do you plan to use? What range are you hoping to communicate over? Click here for a page with a graph of loss per meter versus frequency in salt water . It suggests that at 400MHz the loss is about 30dB pe
Please I want to design an automatic voltage regulator using triac as my switch, microcontroller to fire the triac. in the project i plan to keep the output voltage of the triac constant at 220v. In d simulation i plan to use proteus. I think also that a zerocross circuit should be in the circuit to detect zero voltage. pls can someone (...)
Hi every one am going for a training in physical design for six months... after that what i should plan look for a job or a little confused please can any one help me.... and is there any openings for internship...
Hello, I was using a GS-R400V in one of my design. This part is now obsolete and unable to find anymore. I plan to design a replacement for this part. I already found buck controller ( LM2678 ) but there is a little something that scare me. Let me explain my needs : Input : 24V Output : 0.5V - 23V ( I don't think it is possible (...)
I plan to buy a SATA HDD switch and I found one which has different designs (but the same reference so I can know which is newer than the other). I'm not a pro in electronics, but I know that each component has a role in a circuit, and I suppose that one of these two designs is better and more secure than the other. So regarding your (...)
Hello everyone. I'm building a simple bjt diff amp with active current source loading. I plan on employing negative feedback for obvious reasons related to distortion among others. I do understand that on a resistor loaded amp, the common mode gain is modelled by BRc/ri+2(B+1)Re where Re is a resistor connected between VEE and da bjt emitters. My q
I would like to use an offline PFC flyback controller that operates in critical/boundary conduction mode. I am stuck in trying to figure out what my magnetizing inductance Lm for my flyback transformer should be! The datasheet only recommends part numbers, but I would like to know how they f
Which controller did you plan use for the design? and the datasheet application notes and diagram are still the starting point. So check and read to understand the basic of the chip and lets solve the problem together. Good luck.
Hello I am designing a microstrip balun and plan to do it by using a Wilkinson divider to divide the signal into 2 signals with equal amplitude and then a Lange coupler to obtain 90 degree phase shift between the signals. The problem is with this design I am getting S(2,1) and S(3,1) more than -3 dB. What can be done
Hi there Peace on you all, I need to design an electronic switching circuit to switch between high DC Sources(range from 30 to 80V) to form a square wave from these DC sources.Up time and down time i need to get control of them with very small switching time from up to down and viceversa (like ideal square wave, u know). You can at least gui
Dear All, I am planning to implement an MPPT algorithm for solar powered battery (Lead Acid, 12V, 7Ah) charger. The solar panel is a 50W one. At peak power it can give 18V and 2.78A. It has a Voc of of 21V and Isc of 3A. I have some querries regarding the design I plan to do, which are: 1. Which converter topology is suitable for this (...)
Hi, I am designing a RFID rectifier. I am referring a IEEE paper for this purpose. The paper has shown results for both 130nm and 350nm technologies. I have chosen 180nm technology. So, I expected results in between the above technologies. To my surprise, the results are wierd - undesirable. Let me explain you the stuff: I have used the
I'm getting the tools together for a Pandaboard (OMAP4460)-based design. This system will be for a robotics application, so I'll be removing much of the peripherals, such as Ethernet and HDMI, and expanding its functionality to include two camera ports. I'm trying to choose the right software for this job. My budget is several hundred dollars (d
Hi every one Cutting long story short, since I consider myself relatively new to FPGA design. I really have no idea about, usually what size of ROMs and RAMs in FPGA designs are considered inappropriate. For example. In my case I have a ROM (dual port ROM) of very large size along with RAM of very large size as well. Rom size is (100*100*4)
Hi there, I wonder if anyone can help me with this one: I plan to design my own antenna geometry for an RFID chip. In oder to learn about the frequency response, I think of scanning the setup using a spectrum analyser. This requires to build my own antenna probe if one does not wish to spend too much money. In principle, this should be straig
hi, Am going to design an ADC board ,can any one guide me ,what are things I should follow?
Hi all, I have used UofU_TechLib_ami06 Technology I have created verilog RTL Level design file fulladder_struct.v(given below) and written script syn-rtl.tcl I have used UofU_Digital_v1_2 library, and UofU_Digital_v1_2.lef, UofU_Digital_v1_2.lib, UofU_Digital_v1_2.v module fulladder (a, b, ci, s, co);
Please guy can you help, How can i design a 50kV high voltage direct current generator and measurement system for point plan gap corona experiment thanks. Hi wiseman Current generator ? what do you mean by 50 kv current generator ? is your mean a circuit which can convert a low voltage into a high voltage ( DC high voltage ?) if so
Hi guys, I'm doing physical design using IC Compiler. i want the clock signal to enter a plan group on a certain spot. How can i specify that? Do i have to specify pins or ports to that plan groups. I can't really find a command for that :( Would be great if someone could help me out. Greets