Search Engine www.edaboard.com

Disadvantages Of Opamp

Add Question

1000 Threads found on edaboard.com: Disadvantages Of Opamp
What are the disadvantages of subthreshold PMOS opamps? thanks
which are the pricipales advantages and disadvantages of using the bootloader and as using it. thank you
hi all, I have one question regarding the design of voltage regulator. To design a regulator we need a opamp to regulate the volatge. What type of opamp is the more suitable to acheive high PSSR (power supply rejection ratio)? Two stage amplifier? cascode two amplifier, or folded cascode amplifier? Thanks in advance. Suria
Who can tell the differences between input offset and systematic offset of opamp?
Hi, if a signal is not activly driven under all conditions a latch will be infered. what are the disadvantages of such latches? thanks
Hi there, My question is that whether the input common-mode voltage has to be equal (or intend to set to be equal) to the output common-mode voltage of opamp for the general opamp design? Thank you very much. ethan
recently,i'm wondering how to measure the input capacitor of opamp,please give some advice.
how to simulate for output resistance of opamp through spice.
from gregorian i read that for SC circuits the UGB(w0) of opamp should be greater than 1/Tsh. w0 > 15/Tsh Tsh is the charging discharging time of load. Tsh=1/(2f),where f is clock frequency. now my question is if my clock is 1Mhz,w0 comes to be it not sounding strange. please help
Do we need the -3dB frequence of opamp greater than the signal frequency? To reach a give resolution of Nyquist ADC, the DC gain of opamp must be greater than 2?(N-1), (according the book "mix signal design" by Baker), but if the -3dB frequency of opamp is smaller than the signal frequency, which means for this signal frequency, the gain is (...)
Hi friends, Can we discuss all the possible disadvantages of CMOS... This may help us in appreciating it more and .. regards..
nowadays I read Some paper writtend by R.Poujois, deal with low drift fully differential opamp. when I read the paper, I had one question. in paper, the author say that " We must avoid saturation of the amplifier by the opamp gain product offset voltage at the output. So a limited Value of the voltage gain per elementary stage is allowd ( Av
Dear All: I try to measure the bandwidth of the opamp (real chip). But I have no idea on it. Can you give me some comments about that? Thanks^^ slchen
When plot the PSRR+, the phase plot will decreases from 0 some negative degree, So, if the phase plot decreases from about -180 degree, How to explain this? Thanks.
I know a lot of people know about java but, what makes java stand out of the rest? What are the advantages and disadvantages of java compared to C++, Pascal, and other langauges?
Hello , I have some doubt regarding, effect of loop gain control over stability of opamp. Normally if we take a correctly designed single ended opamp, it has a one dominant pole, and nondominant pole after unity gan frequeny and a right half zero at twice that non dominant pole. we ll take two cases: 1)One with worst case feedback factor ie 1.
Hello , I have some doubt regarding, effect of loop gain control over stability of opamp. Normally if we take a correctly designed single ended opamp, it has a one dominant pole, and nondominant pole after unity gan frequeny and a right half zero at twice that non dominant pole. we ll take two cases: 1)One with worst case feedback factor ie 1.
can any one tell me wht are the advantages and disadvantages of mealy and moore machines...
Hi I have designed an opamp with 5V power supply. when non inverting input is higher than inverting input the output reaches close to positive rail i.e. 5v. I want to design the opmap ( or use some other circuitry) such that the max output voltage doesn't exceed 2.5V. constraints are => power supply can't be changed and also gain of opamp shoul
Hi friends, Any recommended good link or document about the advantages and disadvantages of voltage-mode control dc-dc converter?? Any help would be very appreciated. Will
hi all .. plz tell me the exact definition of gain drift of opamp r pga .. if u have any docs pdf and any links plz let me know .. i want to know more about this and how should i improve it in any circuits. hope u will help me.. regards manissri
Hi folks, I have a question about the bandwidth of opamp used in a basic sample and hold circuit (which includes a switch, a capacitor and an opamp buffer). if the operating frequency of the switch is 1MHz, then what is the requirement for opamp bandwidth or unity gain bandwidth? bandwidth mush be greater than 1Mhz or unity gain (...)
what are disadvantages of directly coupled amplifiers plz explain in detail
which parameters of opamp are critical for loop filter of PLL? especially for low spur. thanks
what are the advantages and disadvantages of ADI compared to Ti, ST or other top10 analog design companies? why Ti's revenue is much more than ADI?
How to derive specifications of opamp fro specifications of DAC.. Upload any docs r gud books in this ..
What are the advamtages and disadvantages of a 8051 based core microcontroller over PIC 18 series including Keil compiler against the PIC C18 ? And the opposite PIC -> 8051 For example I have found a strugle in pointers to functions n 8051
hi,all, how to simulate and measure the input/output impedance of operational amplifier. pls give me some methods. can you give me some papers about analysis and simulation of operational amplifiers. thanks in advance! kind regards
A method of simulating CMRR of opamp directly is provided in Allen's book. The circuit configuration is as figure. The equations are: vout = (vp-vn)*Av+0.5*(vp+vn)*Ac vp = vcm vn = vout+vcm so we have, (1+Av-0.5*Ac)*vout = vcm*Ac. and vout/vcm = Ac/Av = 1/CMRR The spice netlist is listed as follows: vcm1 vp 0 1.27 ac=1 vcm2 vn vout 1.27
Dear All : Does anyone know how to simulate the slew rate of opamp apply in SC circuit ? Thanks
How to decide the slewrate of opamp for SC application?
Hi, How can to reduce offset in input terminal of opamp ? Layout? or circuit? Thanks
what are the disadvantages of using asynchronous reset(ar),synchronous preset(sp) in pld design?
Hello Friends. My doubt is how do we calculate the gain of opamp's used in the Active and SC Filters..? does the gain of the opamp has anything to do with the rolloff the filter..? In the case of double sampling SC filter with a clock frequency of fs, the corresponding UGB of the opamp should be taken 8 times of the clock frequency (...)
Can anyone give me Advantages disadvantages of High freq for ASICs. Many devices have low crystal oscillator and PLL on chip which does frequency multiplication. why is this required?
please give me the advantages and disadvantages of companding,more explanation and new information about companding.:D how the ? law and Λ law derived the formula.
how to calculate offset voltage of opamp for CMOS and BJT? how to calculate offset voltage and noise of bandgap reference?can the offset and noise be seen visually?How? pls help me, i need the answer urgently. thanks.
how to analyze the ac and dc characteristics of opamp(cascode or two-stage) and bandgap(PTAT)? which aspects do the ac and dc characteristics contain? how to analyze them in general?
Hi everybody, i used of ac analyze for printing bode plot of opamp, and when i used of ac source for input, gain was 4000 and it was depicted in .Lis file beside bode plot verified that value, but when i apply sin source to input with same dc and very low amplitude(0.1mV), gain is only about 20. Pls give me some help. Thanks in advance
Hi guys I have a question about the pipeline adc. In behaviour model of pipeline adc, every issue is ideal except the opamp offset voltage of opamp in SH. When i set the offset voltage of opamp in SH 2mV, the enob is about 8.8bit (9.9bit at all ideal issue). Here i am puzzled with this. Why is the influence of the offset voltage (...)
hi there, Does anyone know how to simulate the noise performance(such as input refered noise) of opamp using HSPICE, can you share some hspice cards for reference. Documentations or links are also appreciated. thank you all! regards, henry
Hi! I'm working in a DRA presentation but I'm really new in this field. I have some question that are imposibles to solve by myself.. what are the disadvantages of a DRA conpared to other antennas?? in C-band (4 to 8GHz) what antenna is better (microstrip or DRA) and why? thanks a lot. for any cases, if we wan
Hi Can anybody show me an similar example of this type of circuit?
Hi all and good day! I have question regarding correct biasing of opamp input pins. I am studying desing of fully differential opamp and have misunderstanding of correct biasing procedure. As I understand from books opamp is self powered and biased element so it not need biasing at normal conditions. How can biasing is applied at the (...)
how to define macromodel of opamp,vco,lm555
What are the disadvantages of dividing a memory space to separate banks (bank0, bank1 etc)....................
Hi everyone, can any one help me about the type of opamp which has the gain 77db. and also list out the different architecures of opamps?. Thanks bharat
Hi friends, Could any one tells about advantages and disadvantages of Carry look ahead adder and carry select adder. I have already google it but i did not get the selective answer. Thanks Regards Joe
i have designed a two stage fully differential opamp with hybrid ahuja compensation (that is, two compensation capacitor used in the two cascode nodes of each branch), the first stage is folded cascode, the second is common source, and the CMFB is continuous common mode feedback which have two input pairs, one pair connected to vcm, the other pair
Hello everyone, Iam designing a 2nd order 16 bit Delta-Sigma ADC, i need to design two opamp's for two integrators. What difference should be there for both the opamp's in two integrators.Plz reply, i will be happy to reply on any clarification about the question. Regards, Srudeep Patil