10 Threads found on edaboard.com: Extended Drain
I'm not 100% sure as I currently don't have access to documents of 65nm, but there may be cases where they needed DRC tool to know which diffusion is the drain. So they may have added it for this reason. For example an extended drain or a lightly doped drain device may have different rules which requires identification of (...)
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 09-26-2016 03:40 :: kemiyun :: Replies: 1 :: Views: 625
If your particular PDK allows permuteSD (or whatever
the LVS tool of choice likes to call it) and this is a simple
symmetric MOS (not extended-drain, LDMOS, etc.) then
there's no LVS difference and you don't have to set anything.
I found, though, in one Assura setup that this aspect needed
messing-with and was not very obvious. I forget the detail
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 12-16-2014 18:47 :: dick_freebird :: Replies: 3 :: Views: 1010
Source and drain are permissible to swap, in standard CMOS.
Only if you have an asymmetric device design (drain-only
extended, or source strapped to body internal to the
PCell) is this not true.
Take up your ideas of "should" with the netlist procedure
call, and any layers of subcircuit or schematic below symbol.
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 11-15-2014 18:10 :: dick_freebird :: Replies: 2 :: Views: 649
what are some advantages and disadvantages of drain extended mosfet over standard low voltage mosfets? assuming I am using these for a common drain amplifier for both high and low voltages?
does drain extended mosfet have body effect?
Elementary Electronic Questions :: 10-11-2014 20:02 :: flabbergastt :: Replies: 1 :: Views: 1107
From design point of view, if one wants to use LV device for HV supply operations.
On has to use cascading, or extended drain structures for reliability.
One should run GOX or SOA sims before putting such design onto production.
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 09-30-2012 09:41 :: supreet_95 :: Replies: 4 :: Views: 707
Touchstone Semiconductor has extended its free demo board program through Dec. 31, 2011. The company is offering free demo boards for their analog IC products, including the 0.8V, 0.6?A
TS1001 operational amplifier, and the new push-pull TS9001-1 and open-drain TS9001-2 ultra low-power voltage monitor ICs, with +1.252V reference and a 1% initial
EDA Jobs :: 09-30-2011 14:04 :: maryh :: Replies: 1 :: Views: 633
Can anybody send the pdfs on DEMOS(drain extended MOS)
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 07-03-2008 10:53 :: thirupathik :: Replies: 0 :: Views: 669
Hi all ..
CAn anyone tell me about drain extended devices and LDD ,
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 03-30-2008 11:05 :: sunileda :: Replies: 2 :: Views: 995
I have never come across any paper etc. that would have recommended to use a larger pitch for the contacts in the drain region. Logically, it makes no sense as one would want to have as many contacts as possible. Maybe it was a misunderstanding and an extended drain region was suggested? That would make sense, as it is (...)
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 12-20-2007 17:45 :: CK815 :: Replies: 8 :: Views: 1775
Demos : drain extented mos
The extended drain transistor allows higher voltages at the
drain by the increased width of depletion region between the gate oxide and
the drain diffusion. The depletion region is wider due to the lighter
hope this helps
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 08-10-2006 17:26 :: atamez :: Replies: 2 :: Views: 852