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help for mosfet models ...
hi every one my project is to design mosfet transistor with 1um channel length at first i started to understand mosfet device and its behavior and its characteristics then i found out that i have to choose a suitable model which can predict my design...
Analog IC Design & Layout :: 15 Nov 2009 12:43 :: shams mr :: Replies: 6 :: Views: 234
2.4ghz or 5.2ghz ifa (inverted "f" antenna),who ha
i am doing some simulations with ansoft hfss on ifa.the 2.4ghz dimension fits good both on simulation and measurment with the reference dimension.i want to simulate the 5.2ghz ifa, but i have no reference to compare.does anyone have the design dimesi...
RF, Microwave, Antennas and Optics :: 09 Nov 2009 13:25 :: ahsaan :: Replies: 83 :: Views: 12146
asic technology
hi,what is meant by 130 nm, 90nm, 65nm etc. how do they arrive at this value?thanks!...
ASIC Design Methodologies & Tools (Digital) :: 29 Oct 2009 6:42 :: jagan.tr :: Replies: 7 :: Views: 540
ic fabrication tutorial
can i get some tutorial on steps of ic fabrication described with good pictures or the video tutorial....
Analog IC Design & Layout :: 24 Oct 2009 5:19 :: hanif :: Replies: 1 :: Views: 267
prototype pcb fabrication
i want to get some prototype pcbs fabricated. i need the following capabilities.->volume: prototype - 3pcs->board size: 15x12->6 to 8 layer fr4 stack-up->impedance controlled->5mil/5mil and lower->vias: through/burried/blind/micro - filled and plated...
Business Special Interest Group :: 18 Oct 2009 16:36 :: jianping2121 :: Replies: 7 :: Views: 1122
free webinar: 60 ghz power amplifier design for wireless hdm
free webinar: 60 ghz power amplifier design for wireless hdmi the emergence of wireless hdmi standard requires advanced design tools and technologies to meet its stringent performance requirements. this webinar will review the ads design tools & meth...
RF, Microwave, Antennas and Optics :: 01 Oct 2009 18:44 :: ADS_Marketing_Manager :: Replies: 0 :: Views: 153
rf/analog layout course - your opinion plz.
hi all,i am currently developing a comprehensive rf/mixed signal layout course, mainly targeting either entry level layout engineers or people who could use a refresher course. i would love to get some feedback from you - do you think this would be u...
Analog IC Design & Layout :: 24 Sep 2009 7:04 :: dcshell3 :: Replies: 7 :: Views: 917
looking for metal enclosure manuf in china
i am looking for a manufacturer in china that can manufacture batches 100-500 pcs of small electronic sheet metal enclosures. enclosure will have a few cutouts, so some laser cutting or precision punching will be needed. surface finish to be powder ...
Mechanical Engineering and Design :: 19 Sep 2009 15:19 :: Unitechs :: Replies: 3 :: Views: 968
mismatch simulation (sf/fs) vs monte carlo
hi,may i know what is difference between mismatch simulation (sf/fs) and monte carlo simulation?rgds,kkliaw...
Analog Circuit Design :: 24 Aug 2009 7:27 :: cinch :: Replies: 2 :: Views: 210
looking for junior asic/vlsi engineer
hi all,we are looking for junior asic/vlsi engineer. it is a permanent opportunity for a r&d center of a us company in singapore.responsibilities:• design and verification of blocks requirements:• bsee + 1 year experience • proven e...
EDA Jobs, Promotions, Advertising :: 10 Aug 2009 20:37 :: pfal :: Replies: 7 :: Views: 1293
why negative hold time?
hi, in .lib files of the tsmc the hold time is in negative, what is the reason? what does it mean? thanks in advance,...
ASIC Design Methodologies & Tools (Digital) :: 04 Aug 2009 9:29 :: sowmya005 :: Replies: 12 :: Views: 1398
how to learn pcb fabrication at home, i m a beginner!!
hithose are the first words i write in this forum which i found amazing for all electrical engineers and hobbyists. i m from middle east, jordan. and i m an electrical engineer. but i still have no idea about fabricating pcbs at home niether creating...
PCB Routing & Schematic Layout software & Simulation :: 31 Jul 2009 13:21 :: harii74 :: Replies: 50 :: Views: 2987
test banks & solutions manuals
test banks test banks solutions manuals a framework for marketing management keller 4 accounting horngren 7 accounting warren 22 accounting warren 23 accounting : what numbers mean marshall 8 accounting ch13-26 horngren 6 accounting for decision mak...
PC Programming and Interfacing :: 17 Jul 2009 23:34 :: atfalo2 :: Replies: 0 :: Views: 2415
help needed ! how to printout of pcb layout in 1:1
how to take print of pcb layout into 1:1 ratio.so that i can check whether an ic foot print is correctly matched or not?i am using orcad 16.0.could any one help me out?...
PCB Routing & Schematic Layout software & Simulation :: 26 May 2009 12:57 :: george1 :: Replies: 9 :: Views: 840
help needed to home made pcb fabrication?
i have no idea about of pcb fabrication. i want make my pcb at my home for through hole component and also for smd devices.help needed for: what is procedure for home made pcb fabrication? what are the too...
PCB Routing & Schematic Layout software & Simulation :: 23 Apr 2009 15:52 :: saumya_85 :: Replies: 13 :: Views: 1257
what vdd for fabrication processes
hi.there are many different fabrication processes in manufactures. let’s say ami06 (c5n) from mosis.it says 5v applications. this is what i am confused with. i interpret it vdd max is 5v, which means that you can use any vdd but less than 5v dependin...
Analog IC Design & Layout :: 07 Apr 2009 22:43 :: florescent :: Replies: 3 :: Views: 240
coils on the pcb
hi,i have problem with my pcb. i use several coils (ferrite choke) and i wonder how i must place that coils on the pcb. best regardslukee...
PCB Routing & Schematic Layout software & Simulation :: 02 Apr 2009 8:20 :: Gundam001 :: Replies: 15 :: Views: 894
monte carlo simulations - what are they?
can any one tell me what is monte carlo simulations and how does it help in designs? thanks in advance....
Analog IC Design & Layout :: 27 Mar 2009 14:39 :: raduga_in :: Replies: 5 :: Views: 525
pcb fabrication and manufacturing process
hi guys,i would like to share this site to all who wants to know pcb fabrication processes. this site tills a lot of techniques and things to be considered in making pcb.some of topics discussed:panel and pattern platinglead free printing and surface...
PCB Routing & Schematic Layout software & Simulation :: 19 Mar 2009 9:12 :: Gundam001 :: Replies: 0 :: Views: 363
about liga???
---i didnt know where to post this topic, so i placed it here!!!anyone know a good article or book that explains liga processi searched the internet but i found nothing much useful!for example i found this site:http://www.fzk.de/fzk/idcplg?idcservice...
Other Design :: 17 Feb 2009 12:47 :: sreevyas :: Replies: 1 :: Views: 535
why the adc experimental result is so bad?
ples with the 8 bit resolution, after fabricated in 0.18um process, the experimental result is much worse.can anyone tell me the reason?or what restrict the performance of an analog circuit after the fabrication? thans a lot....
Analog Circuit Design :: 08 Feb 2009 8:22 :: watersky :: Replies: 6 :: Views: 393
book about layout design
hi ! i need a book about the design of layout. could you suggest some titles ? thanks...
Analog IC Design & Layout :: 04 Feb 2009 20:35 :: rajeshkr1979 :: Replies: 55 :: Views: 7446
a lot interview questions with resposes
hi all,here is a nice collection of interview questions with reponses:cmos interview questions.1/ what is latch up?latch-up pertains to a failure mechanism wherein a parasitic thyristor (such as a parasitic silicon controlled rectifier, or scr) is in...
EDA Jobs, Promotions, Advertising :: 21 Jan 2009 9:03 :: sridhar540 :: Replies: 15 :: Views: 8810
need advice regarding advanced course in highspeed pcb desgn
dear friends, i need your advice regarding something which i feel may be important for my future.a company is organizing an advanced course in highspeed pcb design.the course details are as followsfundamental electrical conceptspcb materials and manu...
EDA Jobs, Promotions, Advertising :: 03 Jan 2009 19:16 :: INS-ANI :: Replies: 5 :: Views: 522
diffusion area in mos
hi all,in mos we draws one rectangle for diffusion area,but source and drain is a seprate terminals.so why they didnt get short with each other....
Analog IC Design & Layout :: 01 Jan 2009 9:37 :: manruru :: Replies: 11 :: Views: 468
stellaris cortex-m3 power consumpsion
hido any one have info about the cortex-m3 stellaris power consumpsion?any comparison for power consumption with lpc21xx arm7tdmi based?salamhossam alzomor...
Microcontrollers :: 29 Dec 2008 20:32 :: bobsanjose :: Replies: 6 :: Views: 390
corner simu vs monte carlo
i need to know if anybody can provide some links towards books or artciles which can explain ina formal way the difference between corner and montecarlo simulations. as far as i know corner simualtions are the real deal due to the fact they are show...
Analog IC Design & Layout :: 22 Dec 2008 7:41 :: cretu :: Replies: 4 :: Views: 468
how can i specify metal0 and epi layer in asitic??
dear all,i am not quite clear about the metal0 specification in asitic? since it is assigned in the layer epi, is metal0 equal to layer poly in the fabrication process?furthermore, i only know characteristic about the nwell and active area in pdk, h...
RF, Microwave, Antennas and Optics :: 18 Dec 2008 6:15 :: oermens :: Replies: 1 :: Views: 147
board edge to copper
hi all,what is min spacing we need to maintain from board edge to copper? if we didnt maintain the spacing between edge to copper (board edge to copper clearance is 0), what impact will happen in manufacturing? please explain in detail. thanks in ad...
PCB Routing & Schematic Layout software & Simulation :: 03 Dec 2008 12:18 :: egyptPCB :: Replies: 6 :: Views: 363
ltcc pdk for mwo
hi,can i know what are the pdk available for ltcc design in mwo, and if some trial version is there then is good. please guide me...
RF, Microwave, Antennas and Optics :: 28 Nov 2008 5:20 :: Manjunatha_hv :: Replies: 1 :: Views: 348
fabrication of conformal antenna
please can anybody tell me how to bend the pcb into curved shape for conformal antenna?which company can fabricate this?thanks....
RF, Microwave, Antennas and Optics :: 16 Nov 2008 7:06 :: honeydewsan :: Replies: 4 :: Views: 264
stacked structures?
is it true that if u use stacked vias,the overall parasitic capacitance will reduce?and why are many small contacts preferred over one big contact?...
Analog IC Design & Layout :: 14 Nov 2008 16:54 :: Colbhaidh :: Replies: 4 :: Views: 222
i am a student, how can i get my chip fabricated
dear edaboardiansi am an electrical engineering studentits now my final year graduation projectit is in designing asici finally determined the application to be donebut the big problem now ishow can i get my chip fabricatedin another way, does any of...
ASIC Design Methodologies & Tools (Digital) :: 20 Oct 2008 15:11 :: gliss :: Replies: 8 :: Views: 423
what happens if we dont follow the grid and snap spacing.
hi all,plz dont think that it is a stupid questions.what happens if w dont follow the grid and snap spacing while doing laying out the devices.will there be any impact while fabricating?????...
Analog IC Design & Layout :: 02 Oct 2008 13:07 :: erikl :: Replies: 6 :: Views: 501
why ic are black?
why ic are black?...
Professional Hardware and Electronics Design :: 27 Sep 2008 18:03 :: dharesu :: Replies: 15 :: Views: 708
where can i fabricate microstrip and help with genesys
hi there,im designing a microstrip filter circuit as part of my final year engineering project. im located in new zealand and im wondering if anyone can help me point out companies that might be able to fabricate it. preferably in the australasian re...
RF, Microwave, Antennas and Optics :: 23 Sep 2008 2:45 :: selva500 :: Replies: 40 :: Views: 1557
please help me on this reference circuit..
hi all, could anyone please explain to me the operation of the circuit below? i know this is a bandgap but i confuse for the part q3, r and why there is a cap. q1=8q2http://images.elektroda.net/96_1221032920_thumb.jpgthanks a lot first. :danother que...
Analog Circuit Design :: 19 Sep 2008 11:41 :: saro_k_82 :: Replies: 6 :: Views: 405
looking for hv esd pad
1) pad type: i/o resistor-less hv analog pad. also looking for hv power pads for vdd and vss.2) pad size: the pad sizes shall be less 92 um x 92 um.3) pad ring: i have both 3.3v and 15v rings in io section, but they aresepareted. the sizes for the pa...
Analog IC Design & Layout :: 27 Aug 2008 1:29 :: marcelo.baru :: Replies: 7 :: Views: 522
spiral inductor design
hi,i want to design a silicon spiral inductor and send to fabrication.can anyone help me how to proceed..........what should be the order of design ............ (i have hfss)like,layout, simulation etc..first do i need to start with layout or simulat...
RF, Microwave, Antennas and Optics :: 24 Aug 2008 10:20 :: james cook :: Replies: 2 :: Views: 309
what is the difference between silicide and non silicide tec
what is the difference between silicide and non silicide technology??which will be used normally, silicide or non-silicide??...
Analog IC Design & Layout :: 08 Aug 2008 14:42 :: obi1 :: Replies: 3 :: Views: 207
can give a list about simulation tools
can give a list about simulation tools about digital design, analog design. mix-signal design .etc...
Electromagnetic Design and Simulation :: 07 Aug 2008 19:03 :: elec-eng :: Replies: 7 :: Views: 3003
spacing between n+ diffusion and nwell
hi, why should there be a huge spacing between n+ diff and nwell.is there any reason, other than the regions gettting extended during fabrication....
Analog IC Design & Layout :: 07 Aug 2008 7:58 :: analayout :: Replies: 8 :: Views: 315
to be asic or not
hello, i am checking on feasibility of giving an application as asic. i am a novice in this area. my application does the following1.correct the uneven lighting in an image2.stitch two imageswhat are the important parameters to be taken when conside...
ASIC Design Methodologies & Tools (Digital) :: 12 Jul 2008 13:27 :: MarcS :: Replies: 3 :: Views: 237
international mems forum centre
share your ideas and experience here.micro-electro-mechanical systems (mems) is the integration of mechanical elements, sensors, actuators, and electronics on a common silicon substrate through microfabrication technology. while the electronics are ...
RF, Microwave, Antennas and Optics :: 07 Jul 2008 7:13 :: memsgg :: Replies: 0 :: Views: 174
beginner - layout techniques
im a beginner in drawing layout, any suggestion on how to gain my knowledge on layout?? website or book that you can suggest??is there any layout techniques rather than multi-finger and common centroid??pls let me know.......
Analog IC Design & Layout :: 21 Jun 2008 20:26 :: faiflay :: Replies: 89 :: Views: 17064
relation between metal density rule and yield
hi all,i have doubt here : what is the relationship between metal density rule and yield ? i heard some one saying that metal density rules enhances the yield. but am not sure how .. i request you guys to comment on this ..thanks,sp3...
ASIC Design Methodologies & Tools (Digital) :: 21 Jun 2008 15:23 :: sunjimmy :: Replies: 2 :: Views: 138
technology tsmc with n-well and p-well in the same substrate
hello, im so sorry for my english writing but im happy to listen to you. the tsmc fabrication processes available through mosis(provides access to fabrication of prototype)include 0.35 µm cmos, 0.25 µm cmos, 0.18 µm cmos, and 0.13 µm cmos. i select:t...
Analog IC Design & Layout :: 04 Jun 2008 18:05 :: drabos :: Replies: 1 :: Views: 210
what is exactly process?
what is process? how does it take effect timing analyze? could anyone give a example? thanks...
ASIC Design Methodologies & Tools (Digital) :: 27 May 2008 10:19 :: bradyue :: Replies: 4 :: Views: 105
via tenting
i want to know how we can tent via with soldermask on protel, pads and allegro?is it possible to make it conditional vi tenting(under some component)?...
PCB Routing & Schematic Layout software & Simulation :: 19 May 2008 22:02 :: Eli75 :: Replies: 19 :: Views: 2940
the fabrication fee of bicmos and cmos process
hi,i wondet at the same feature size, what s the cost descranpancy between the bicmos process and the cmos process? 20%.30% or other in normal? thankd...
Analog IC Design & Layout :: 13 May 2008 13:58 :: drabos :: Replies: 1 :: Views: 162
problem of resistor matching
ends, a question on resistor matching. i am using the umc 130nm technology. as per the documents given the resistors can have a mismatch of upto ±10% betweent he actual value in the circuit and after fabrication. in my circuit i am using two resisto...
Analog Circuit Design :: 10 May 2008 23:21 :: rfsystem :: Replies: 3 :: Views: 222
layout question
hi everybody,the figure 1 shows the layout of a cmos inverter.i have 2 questions regarding the layout of the pmos and nmos transistor.1/ figure 3 shows that in a pmos transistor there is an n-diffusion. why this diffusion is not done in the layout of...
Analog IC Design & Layout :: 05 May 2008 6:21 :: analayout :: Replies: 10 :: Views: 381
layout
difference between the layout in custom design and semi-custom design? thanx in advance for the valuable reply...
ASIC Design Methodologies & Tools (Digital) :: 03 May 2008 15:38 :: mohaddin :: Replies: 11 :: Views: 447
any book talks about fabrication and device characteristic?
i am looking for some knowledge for the relation between silicon fabrication process and device characteristics, like how oxide thickness or diffusion doping density will affect vt, is there any good books that you can recommend? thanks very much....
Analog IC Design & Layout :: 22 Apr 2008 9:57 :: mdcui :: Replies: 3 :: Views: 111
metal density rules
can anyone explain me about the rules of metal density...why do we need to check and what is the purpose?why ,why,why...go as much depth as u can bcz its been asked by the intel company...........what is the difference between bjt and cmos at the cir...
ASIC Design Methodologies & Tools (Digital) :: 22 Apr 2008 8:01 :: selvaraja :: Replies: 11 :: Views: 414
drc
hi ...is there any standard thats being followed for drc setting?thanks...
PCB Routing & Schematic Layout software & Simulation :: 10 Apr 2008 10:22 :: Manjunatha_hv :: Replies: 5 :: Views: 165
a question about schockley's diode equation
can anyone help me what is the difference between:id=is(e^(kv/tk)-1)andid=is(e^(vd/nvt)-1)?thank you!...
Electronic Elementary Questions :: 05 Apr 2008 11:58 :: ssankurathri :: Replies: 1 :: Views: 99
mos and bjt
in what way mos overtaken bjt ?? plzz explain briefly...
ASIC Design Methodologies & Tools (Digital) :: 02 Apr 2008 12:04 :: neetinsingh :: Replies: 2 :: Views: 615
needed brief explanation of attena effect
hi, to reduce the atenna effect ,we place a higher order metal b/w the long interconnect and short gate.the other way is to connect reverse biased diode ,can anyone explain how that diode reduces attena effect clearly.thanks in advance...
Analog IC Design & Layout :: 19 Mar 2008 13:08 :: Fom :: Replies: 8 :: Views: 225
new to pcb design .. need help??
hi im new to pcb design. i need some material on pcb design and its basics.can anyone help ??? thanx in advanceregards~niks~...
PCB Routing & Schematic Layout software & Simulation :: 17 Mar 2008 10:56 :: PCBL :: Replies: 17 :: Views: 1783
process : metal hole error
hi,how is metal hole area a concern from process point of view ? they usually check that the metal hole area should be greater than certain x um2.please dont reply saying that it is due to the uniform metal to be present. usually in the end there is ...
Analog IC Design & Layout :: 05 Mar 2008 19:51 :: sandeep_torgal :: Replies: 5 :: Views: 204
fabrication procedure
can any one provide me good documentation on fabrication procedure....
Analog IC Design & Layout :: 05 Mar 2008 6:41 :: varma_cs012 :: Replies: 1 :: Views: 69
fabrication concepts ?
chap,can we get some papers about fabrication concepts which are new. i mean what ever we have book alan hastings and smsze and all these are very old. i want to know latest fab process flow. can we get it ? please help me out.i have lots of doubts r...
Analog IC Design & Layout :: 05 Mar 2008 5:11 :: varma_cs012 :: Replies: 0 :: Views: 66
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cmfb
can anyone please explain to me what is cmfb all about? why do people use it?after spending about 2 hours reading the book, the only thing i get is that due to the mismatches in nmos and pmos, cmfb is required...i am not even sure if that is right......
Analog Circuit Design :: 01 Mar 2008 16:19 :: AMS2007 :: Replies: 15 :: Views: 747
corner cells ,scribe seal , filler cells
what is the purpose of using corner cells and scribe seal in a full chip ?on a unrelated note - why do we need standard cell fillers ? why do the doping wells need to be continuous ?...
ASIC Design Methodologies & Tools (Digital) :: 28 Feb 2008 14:55 :: vikramc98406 :: Replies: 5 :: Views: 615
cmos layout questions
1) according to clein, what has been one of the main reasons why cadtools have failed to be successful among ic layout engineers?2) with respect to cad tools, what are some of the advantanges anddisadvantages to being a small ic design house?3) what ...
Analog IC Design & Layout :: 30 Jan 2008 11:37 :: ninge :: Replies: 36 :: Views: 7422
phase margin vs. process variation
i designed an opamp and did some corner simulation. what i found is that in slow slow corner, the phase margin is in its worst case. what does it mean and how can i compensate for process variation in this case ?thank you for your help !...
Analog IC Design & Layout :: 30 Jan 2008 7:48 :: yibinhsieh :: Replies: 5 :: Views: 222
job openings for mems design engineers at sws
job openings for mems design engineers at si-ware systems (sws)job ref code: mem-108about si-ware systemssi-ware systems (sws) is an independent egyptian fabless company providing a wide spectrum of asic design and development solutions from initial ...
EDA Jobs, Promotions, Advertising :: 27 Jan 2008 8:05 :: mosmed :: Replies: 0 :: Views: 759
how to write a book on transistor ?
how to write a book on transistor ? from where to start ?what r the topics should be covered ? this book is being written for both beginner and advance level readers ?thanks :)...
Electronic Elementary Questions :: 26 Jan 2008 18:54 :: IamnotJunk :: Replies: 3 :: Views: 127
is mentor-carlo analysis neccessary?
thanks....
Analog IC Design & Layout :: 24 Jan 2008 11:29 :: little-nemo :: Replies: 16 :: Views: 614
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