| Search found 688 matches on edaboard.com: follower follower line follower source follower source follower |
amplifier for dc motor
hey guys i need an analog amplifier to drive a small dc motor of current 500maamplifier input 0 to 5 voltsamplifier output 0 to 12 voltsanyone plzzzz...
Analog Circuit Design :: 17 Nov 2009 16:53 :: hameeds01 :: Replies: 6 :: Views: 315
positive and negative feedback !
hi freinds;we have spoken later in (problem with ldo design) about the positive and the negative feedback for the error amplifier and hopefully as lvw said, the pm is not always calculated by taking the origin in -180° and lvw has well explained it. ...
Analog Circuit Design :: 16 Nov 2009 3:12 :: musyafa :: Replies: 15 :: Views: 708
class ab output stage - request for resources
hi,i need to design a class ab output stage. it could be a source follower output stage or a common source output stage.. but the main criteria is class ab operation. i would really appreciate it if someone could post schematics of it including the b...
Analog IC Design & Layout :: 14 Nov 2009 8:58 :: g.s.javed :: Replies: 3 :: Views: 237
opamp: inverting or non-inverting?
which configuration has best frequency response inverting or non-inverting and why?!...
Electronic Elementary Questions :: 09 Nov 2009 9:00 :: chandra.prakash :: Replies: 7 :: Views: 1944
what's the drawback of mosfet cap for miller compensation
hi, allive designed a buffer for a reference voltage in standard cmos process. the buffer used a 2-stage miller compensation opamp followed a source follower (the follower feed back to opamp neg), and the output is a follower replica.my problem is th...
Analog Circuit Design :: 29 Oct 2009 21:32 :: snafflekid :: Replies: 6 :: Views: 378
opamp input transistor corner variation
i use 0.18um cmos process to design my opamp, and the telescopic structure with nmos input transistor is used. the body of input transistor is connected to gnd, however i find that when i do corner simulation, the opamp works abnormally at some corne...
Analog Circuit Design :: 24 Oct 2009 23:19 :: dick_freebird :: Replies: 3 :: Views: 120
how to design a digital switch to match 50 ohm or 75 ohm rl?
question on a analog design project. in this project, i need to design an amplifier that can match 50 ohm or75 ohm output impedance by using a digital switch. im considering using a source follower output stage. by changing thebias current...
Analog IC Design & Layout :: 22 Oct 2009 7:01 :: wizardz :: Replies: 2 :: Views: 165
how to design a digital switch to match 50 ohm or 75 ohm rl?
question on a analog design project. in this project, i need to design an amplifier that can match 50 ohm or75 ohm output impedance by using a digital switch. im considering using a source follower output stage. by changing thebias current...
Analog Circuit Design :: 21 Oct 2009 3:00 :: wizardz :: Replies: 3 :: Views: 144
ldo stability
i need the papers about loop stability in low dropout regulators thanks...
Analog Circuit Design :: 12 Oct 2009 10:45 :: mtechvlsi :: Replies: 35 :: Views: 4545
controlling stepper motor robot
hi, i have a robot with 2 stepper motors connecting to a pic16f877a and i am adding a line follower application on it... i got the circuit done with 3 pairs of infrared sensors for left, middle and right but now i dont know how to program it. prefera...
Microcontrollers :: 08 Oct 2009 0:45 :: suelooi :: Replies: 0 :: Views: 132
band - gap reference for adc
i have a micro which has band-gap reference of 1.2v . i am powering up the adc with 3.3v and i want to give reference to my adc around 3.3v. do you think i can use band-gap ref. and use a voltyage follower to make it ~3.3v . or u may suggest me some ...
Analog Circuit Design :: 07 Oct 2009 22:27 :: dick_freebird :: Replies: 6 :: Views: 309
asic cmos opamp design
hi guyz,the following is my design problem.need to design a cmos opamp in the tsmc 0.35um process. supply voltage is 3.3vsome of the design considerations are as follows:1. the opamp will be set-up in the non-inverting configuration.2. high open loop...
Analog IC Design & Layout :: 05 Oct 2009 6:21 :: carporsche :: Replies: 8 :: Views: 465
bandgap with 60db of psrr at 1mhz
hi,im trying to design a bandgap with a pretty high psrr at high frequency (for a switching regulator which frequency can go up to 1mhz). ive tried a pre-regulation, ive tried voltage subtraction, but the best i get is 30db at 1mhz.any ideas on what ...
Analog IC Design & Layout :: 01 Oct 2009 6:11 :: saro_k_82 :: Replies: 4 :: Views: 171
line follower robot
see atwww.njbibin.blogspot.com...
Robotics and Automatics Forum :: 30 Sep 2009 17:22 :: viunk :: Replies: 14 :: Views: 3252
problem with inl/dnl
d a flash adc and now i want to test it. but ive some problems with inl/dnl calculation due to the using of tha!i used of track and hold amplifier (tha; a track and hold which is followed by a source follower as a buffer), besides input of adc is (v...
Analog IC Design & Layout :: 29 Sep 2009 12:34 :: shanmei :: Replies: 10 :: Views: 375
how to realize a 0.5v output ldo ?
dear all,i want to design a ldo with 0.5v output. as i know, the output voltage is derived from the bandgap voltage by res devider. so it is easy to realize a ldo with output > 1.2v. but how to realize a 0.5v ldo? could you give me some tips or pape...
Analog IC Design & Layout :: 27 Sep 2009 16:02 :: dick_freebird :: Replies: 4 :: Views: 177
opamp with cmir down to 0v
hi,i would like to create an opamp with a common mode input range down to 0v? it does not have to be rail to rail, but does have to operate down to 0v.is is possible to create such an opamp using, for example, a two stage opamp, with pmos diff pair? ...
Analog Circuit Design :: 24 Sep 2009 19:20 :: willi65 :: Replies: 4 :: Views: 489
how to generate negative voltage?
ent is about 100ma through this voltage. except the charge pump chip, how can i realize a negative voltage with simple method on pcb? #2.i also need a big size mosfet (power transistor?) with source follower connection for my test chips power supply...
Analog Circuit Design :: 23 Sep 2009 7:08 :: FvM :: Replies: 2 :: Views: 333
current mirror design
hi all.i was wondering if anyone knows what the best way of achieving low input impedance and high output impedance in a cmos current mirror? the input of the current mirror is connected to the output of a current steering dac, and the output of the ...
Analog Circuit Design :: 21 Sep 2009 11:24 :: eld03 :: Replies: 3 :: Views: 513
can anyone tell whether the program is correct..
rom the mc....some one pls tell me whether the program is correct and if it is complete(htis program was not written by me i got it from the net)...thanks in advancethis is the schematic for the line follower the......
Microcontrollers :: 20 Sep 2009 4:50 :: nirmal_rockin :: Replies: 1 :: Views: 132
high voltage switching using igbts or transistors
hi.. im woking on the design and fabrication of a dc to ac inverter without using a transformer.the design involves first steping up the dc input to a high dc output.this output is switched using a bridge inverter to produce a square wave ac. a volta...
Power Electronics :: 17 Sep 2009 20:47 :: sperate :: Replies: 4 :: Views: 498
opamp modelling in hspice
hi,i am trying to model ideal opamp in unity gain configuration (voltage follower).i used vcvs with max/min voltages.hspice simulation of this circuit runs out with non-convergence error (saying timestep is too small). can enyone help me to force thi...
Analog IC Design & Layout :: 14 Sep 2009 8:12 :: knreserve :: Replies: 2 :: Views: 603
dc fan control using ni - daq 6009 analog output
hey guysi have a dc fan that works between 3 and 10 volts and needs 1a. i need to control it using a daq 6009 by varying the output voltage at the analog output of the daq. i am well aware that the daq cannot give the necessary current that the fan n...
Power Electronics :: 14 Sep 2009 5:33 :: pauloynski :: Replies: 3 :: Views: 264
slew rate of a fully differential amplifer
hello all,regarding measuring slew rate of single ended opamp its easy and straightforward, by giving a step on positive input and using opamp a follower.but i was thinking how would it be for a fully differential case?thanks and look forward for so...
Analog Circuit Design :: 14 Sep 2009 0:19 :: dick_freebird :: Replies: 1 :: Views: 174
measuring the slew rate of fully differential amplifier
hello all,regarding measuring slew rate of single ended opamp its easy and straightforward, by giving a step on positive input and using the opamp in the follower configuration.but i was thinking how would i measure for a fully differential configura...
Analog IC Design & Layout :: 13 Sep 2009 16:16 :: EmbdASIC :: Replies: 0 :: Views: 156
can anyone correct the two errors in the program.
hi im getting two errors in this programwarning: c:\documents and settings\administrator\desktop\line follower.c(178): function parameter delay was not referencedwarning: c:\documents and settings\administrator\desktop\line follower.c(178): function ...
PC Programming and Interfacing :: 13 Sep 2009 7:56 :: nirmal_rockin :: Replies: 2 :: Views: 180
adc input buffer in 0.18um cmos
hi,i want to drive the bootstrapped switch track and hold circuit for a 1.5gs/s, 8 bit cmos adc. for 0.18um cmos process, normal source follower buffer has linearity and gain drawbacks because mos transistors output conductance is strongly nonlinear ...
Analog IC Design & Layout :: 09 Sep 2009 18:37 :: dick_freebird :: Replies: 1 :: Views: 201
no output from the enable pins....pls help
hi this is the schematic for my line follower.. the problem is tat i don get any output from both the enable pins(pins 18 and 19 of the mc). due to wch the motor refuses to. run... nw im confused how to resolve this problem...any one help pls...i hav...
Microcontrollers :: 09 Sep 2009 16:46 :: nirmal_rockin :: Replies: 0 :: Views: 90
connecting bulk and source of an nmos for a non-rf applicati
hello,i am designing an amplifier which has to switch on and off approximately 30 times per second. the amplifier is a folded cascode opamp with 2 gain boosting stages. when i run simulations, i get very good results for the bulk and source for all t...
Analog IC Design & Layout :: 03 Sep 2009 21:40 :: dick_freebird :: Replies: 2 :: Views: 171
c-program compiling for microcontroller...pls help....
hi...im in urgent need.. i got this program somewher from the net and ive edited it for my line follower which im building....but the program shows some errors(the microcontroller used is atmega16) and im totally confused about the header files delay...
Microcontrollers :: 02 Sep 2009 15:11 :: nirmal_rockin :: Replies: 4 :: Views: 156
value of the photo resistor...??????
can any one pls tell wat value of photo resistor can be added to the sensor circuit of the line follower.....pls helpthanks.....http://img199.imageshack.us/img199/8908/31595493.th.jpg...
Electronic Elementary Questions :: 29 Aug 2009 10:05 :: vipinsaini :: Replies: 9 :: Views: 411
qrd1114 reflective optical sensor ....
can anyone tell where i could get the qrd1114 sensor for a line follower which im building. can i order it over the net. and if i order when wil i be receiving it. i live in chennai -india...if anyone can help me i would be very grateful. im really i...
Electronic Elementary Questions :: 26 Aug 2009 14:09 :: nirmal_rockin :: Replies: 0 :: Views: 66
voltage follower, op-amp
hi, everyone!i want to build a voltage follower with ne5532. one requirement is that the op amp should be supplied with a single power.my design is:http://images.elektroda.net/42_1250911502_thumb.jpgthe output, however, suffers from great distortion ...
Analog Circuit Design :: 22 Aug 2009 16:18 :: millwood :: Replies: 7 :: Views: 945
vco phase noise measurement with spectrum analyzer
i was trying to measure vco phase noise with agilent n9320b spectrum analyzer. my problem is that whenever i connect my vco output to the rf input of the analyzer, the signal on the oscilloscope is gone as my signal swing is reduced from 0-3.3v to ab...
RF, Microwave, Antennas and Optics :: 21 Aug 2009 22:32 :: vfone :: Replies: 1 :: Views: 345
charge pump based ldo
anybody knows how to design charge pump based ldo with nmos as drop-out element ? please suggest some papers....
Analog IC Design & Layout :: 19 Aug 2009 9:08 :: mitgrace :: Replies: 5 :: Views: 516
12 to 5 volts clipping circuit
hey guys,its been while for me, and it sure feels great to be back, i sure need some help :p i am trying to design a clipping circuit from 12 volts input clipped down to 5 volts using lm-324 op-amp.really appreciate the helpthe sniper (+)...
Analog Circuit Design :: 15 Aug 2009 19:50 :: baysidebecca :: Replies: 10 :: Views: 768
flipped-voltage-follower
hello: i want to ask the disadvantage of flipped-voltage-follower comparing to the conventional voltage follower?best regards...
Analog Circuit Design :: 13 Aug 2009 22:41 :: yjj1119 :: Replies: 0 :: Views: 185
differential amplifier with source follower
hello,look at my attachment. the output x01_in+ is shifted 180° from the input a. how to make sure so that this shifting is as low as possible? thx...
Analog IC Design & Layout :: 12 Aug 2009 18:27 :: Teddy :: Replies: 3 :: Views: 261
clamping circuit... plzzz help
hi all, i want to design a clamping sort of circuit which would produce an output of 0v when the i/p to it is +5v and 5v when the input to it is 0v... the input is not a pure sine wave... its a sine-wavish pattern with a frequency of around 50-6...
Analog Circuit Design :: 09 Aug 2009 20:48 :: rvnd5d :: Replies: 2 :: Views: 252
op-amp signal conditioning for adc
hi, alli am trying to design an input circuit for an adc. adc1173 is already selected for our design. to obtain a stable reference voltage for the chip, the circuit shown below is suggested. the reason, according to the spec. sheet, was that this ...
Analog Circuit Design :: 05 Aug 2009 16:05 :: puppet.rhapsody :: Replies: 6 :: Views: 396
line follower robot
which one is best c or assembly language for line follower robot?...
Microcontrollers :: 03 Aug 2009 2:54 :: doraemon :: Replies: 4 :: Views: 567
level shifter circuit :
hi ppl !!i am looking for a cmos circuit which will convert cmos 3.3 v supply logicto cmos 1.2 v supply logic. can anybody help me out in this regard.tiaraduga...
Analog IC Design & Layout :: 01 Aug 2009 19:01 :: nadigsharma :: Replies: 7 :: Views: 1095
how to translate signal to a different voltage level
greetings,i am an amateur in this things and i am stuck with this problem:i want to interface a signal to an adc, but the signal is outside the limits of my adc. so, what i am trying to do is basically, without altering the original signal to run it ...
Electronic Elementary Questions :: 29 Jul 2009 9:35 :: rituparnasaikia :: Replies: 6 :: Views: 588
how to compensate super source follower?
hi, im doing a project now using super source follower, besides itself is a negtive feedback system, it is also in a bigger loop( you can find this paper naminga transient-enhanced low-quiescent current low-dropout regulator with buffer impedance a...
Analog IC Design & Layout :: 24 Jul 2009 11:49 :: jesseyu1984918 :: Replies: 0 :: Views: 144
how to compensate a super source follower?
hi, im doing a project now using super source follower, besides itself is a negtive feedback system, it is also in a bigger loop( you can find this paper naminga transient-enhanced low-quiescent current low-dropout regulator with buffer impedance a...
Analog Circuit Design :: 24 Jul 2009 11:47 :: jesseyu1984918 :: Replies: 0 :: Views: 144
related to inverter
in an inverter we connect pmos to vdd, nmos to gnd...wht happens if we do viceversa??i.e pmos to gnd or vss, and nmos to vdd ? will it still function as inverter??if so why??...
Analog IC Design & Layout :: 20 Jul 2009 20:32 :: sandeep_torgal :: Replies: 11 :: Views: 435
h bridge design, technical question about transistors
hello,im about to build an h bridge for a buzzer.i find the following circuit very interesting, but i will not use the opto-coupler.i was wondering why the pnp transistor were at the top ? i build one from myself and i putted the pnp at the bottom o...
Analog Circuit Design :: 19 Jul 2009 23:32 :: Kral :: Replies: 3 :: Views: 288
ADS
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hold violation during front end sta
ask this, because when there is 2 flops connected back to back (without any combo in between), clock network delay (skew, uncertainity, latency) is for sure going to be more than hold requirement of follower flop and so hold violation. is it not??le...
ASIC Design Methodologies & Tools (Digital) :: 16 Jul 2009 7:05 :: dcreddy1980 :: Replies: 7 :: Views: 354
how to design vco buffer amplifer?
please give me some advice on how to design vco buffer.i desined a 4~8ghz vco without buffer desined in 2um hbt process.,it works well,but i need a 4~8ghz vco buffer.is a attenuator needed? i dont think insert a attenuator between vco and the buffer ...
RF, Microwave, Antennas and Optics :: 16 Jul 2009 5:14 :: du_hast :: Replies: 9 :: Views: 732
mosfet turning completely on
i seem to be having a problem turning on a mosfet completely. i am using a 2n7000 n-channel mosfet hooked up to a logic gate which is controlling the gate of the mosfet. however, the logic seems to be unable to turn on the mosfet all the way. until t...
Electronic Elementary Questions :: 16 Jul 2009 2:22 :: Audioguru :: Replies: 6 :: Views: 585
pid line follower robot, using pic
hellohow can i use pid control algorithm to build a line following robot using three infra-red sensors placed on right - middle - left, and using picbasic pro.i still cant find how to translate a pid control algorithm to control the robot, the robot ...
Microcontrollers :: 15 Jul 2009 2:01 :: tellMeDaBasix :: Replies: 6 :: Views: 1662
how to build a motor speed control circuit
how to build a small dc motor speed control circuit with photoresistor/phototransistor but without using mcu?thank you....
Analog Circuit Design :: 13 Jul 2009 6:45 :: amitjagtap :: Replies: 4 :: Views: 876
low pass filter with pmos input differential pair
i designed a low pass filter. it has a pmos bias at the top, a pmos input differential pair and a nmos current mirror as an active load. then connect the output to the negative input form a unity negative feedback. finally a capacitor is connected to...
Analog Circuit Design :: 13 Jul 2009 6:33 :: amitjagtap :: Replies: 3 :: Views: 309
help needed in making a stable opamp with big load
hi,im making rail to rail opamp for buffer.the buffer will have big load(10nf) or no load.my current design structure of opamp is two stage opamp.first stage is gain stage(diff amp) and second stage is for rail to rail buffer.i think dominant pole is...
Analog Circuit Design :: 10 Jul 2009 2:40 :: sutapanaki :: Replies: 28 :: Views: 1226
lm 358 as a comparator
im trying to build some kind of short circuit checker that always beeps when 2 pins are shorted. i realized the beeping thing with a 555 timer ic. its emitting a sound as long as the input (reset of the 555 ic) is not connected to ground.where i have...
Hobby Circuits and Small Projects Problems :: 10 Jul 2009 1:27 :: vsmGuy :: Replies: 7 :: Views: 655
regarding op-amp configuration and circuit fucnctioning
hi all,while designing op-amp based circuit, the ratio of feedback resistance decides gain, so rf=10k, r1=1k and rf=100k, r1=10k wil give tha same gain and input output resistance then is there any differennce of using any one pair over other and wha...
Analog Circuit Design :: 30 Jun 2009 16:41 :: Kral :: Replies: 5 :: Views: 226
output voltage of a transistor circuit
in the circuit below, when logic function commands low, the following explanation is given:1: for small load currents, q3 remains in the active mode, and the output voltage is a function of the drop across the 1.6-kΩ resistor, vbe3, and vdiode2...
Electronic Elementary Questions :: 26 Jun 2009 13:57 :: trekkytekky :: Replies: 4 :: Views: 226
h-bridge - should a maximum of 5 v appear across the load?
s say i made one using 4 npn transistors... the switching voltage at the base of each transistor is 5 v and 50 volts are at the collectors of the upper transistorsnow, as the upper two are in emitter follower configurations, shouldnt a maximum of 5 v...
Microcontrollers :: 25 Jun 2009 15:50 :: elrayes :: Replies: 2 :: Views: 300
design circiut interface for line follower & motor using
am asking on how to make a circiut for linefollower connect to two dc motors& how to connect them to plc so tht i can program plc on a task i want to do it automatically just push start bottom please if u can help reply me...
Professional Hardware and Electronics Design :: 22 Jun 2009 12:50 :: crazy 901 :: Replies: 0 :: Views: 126
estimating the impedance on op-amp - how to do it?
hey !if i need to know the impendanz for a voltage-follower configuratet op-amp, for example a lm324 or lm258, how do i do that ?? is it not somthing that is normally given in the datasheet ?? if not not, how do i find it ??hope some can help :)...
Analog IC Design & Layout :: 22 Jun 2009 8:24 :: FvM :: Replies: 1 :: Views: 132
opamp integrator with fast current pulse input
im trying to determine if an opamp, such as lm124, can integrate the current of a very fast pulse. i am simulating the circuit in pspice. the problem is that the voltage proportional to the integral is appearing at the input rather than the output. ...
Analog Circuit Design :: 17 Jun 2009 10:31 :: joker12 :: Replies: 10 :: Views: 1416
need help in sample and hold design
i desinged a sample hold circuit for adc. if i input 1v vpp, i cannot get 1v vpp from output. but if i input 500mv vpp, i can get correct sampled 500mv vpp from output. what is the reason caused this problem? not enough gain or not enough output swin...
Analog IC Design & Layout :: 16 Jun 2009 5:37 :: mdcui :: Replies: 5 :: Views: 390
problems being faced in making a 0-12v variable dc supply.
g lm 723.since vref has to be more than 2v my o/p is in the range 2.something to over 14v. the problem i am having is in finding a virtual ground of around 2v.i put a 741op amp and used it as a unity follower with vref of around 2v as i/p and +vcc co...
Electronic Elementary Questions :: 14 Jun 2009 2:03 :: Audioguru :: Replies: 3 :: Views: 306
my line follower robot - feedbacks are welcome
dear friends i wanted to share some images of my line follower robot here..this robot secured second place in state level mini project competition..here are the images... feedbacks are welcome..http://shree-electronics.com/images/100_0665.jpghttp://s...
General :: 11 Jun 2009 17:00 :: srikanthsamaga :: Replies: 0 :: Views: 378
power supply rejection analysis of ldo regulators
hi everybody,i used cadence to simulate two designs of linear regulators... one used a pmos device as the pass transistor while the other used a nmos pass transistor. the error amplifier had same gain. the plot of psr show that there is a peaking in ...
Analog Circuit Design :: 04 Jun 2009 14:07 :: onteri :: Replies: 2 :: Views: 387
how to test the input impedance of a voltage follower?
hi! guys, i got a voltage follower which was formed by connecting the inverting input to the output of opam opa128 ,say a unit gain amplifier. is there any effective&pratical way to test the input impedance of it? not long ago i ...
Analog Circuit Design :: 03 Jun 2009 11:39 :: wyckaka :: Replies: 0 :: Views: 159
a question that is about source follower and body effect!
hi, every body,i have a question that is about the source follower (common-drain amplifier) and body effect. why does increasing the output bias level can reduce the percentage of source to bulk voltage due to the signal? could everybody explain the ...
Analog Circuit Design :: 01 Jun 2009 18:03 :: davison7 :: Replies: 1 :: Views: 192
jfet source follower gain problem
hi,ive been attempting to simulate a jfet source follower (common drain) and was expecting to get something near to a gain of 1. i understand that i would never get a gain of exactly 1, but near enough. however, i was getting nowhere near. more li...
Analog Circuit Design :: 30 May 2009 9:02 :: FvM :: Replies: 21 :: Views: 1281
how to simualte cmrr for diffrential amp?
hi all,i have a question here. how to simulate cmrr for a diffrential amplifier and also common gain in hpice? thanks in advance...suria...
Analog IC Design & Layout :: 29 May 2009 6:35 :: chibijia :: Replies: 58 :: Views: 8856
how to make a unit gain amplifier ???
hi all i am working on my masters project on phase lock loop . i have to make a unit gain amplifier to include it in my charge pump design . i was wondering how to make it with few complications . also can i use 2 inverters connected in series ??? i ...
Analog Circuit Design :: 23 May 2009 22:32 :: FvM :: Replies: 18 :: Views: 1272
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