11 Threads found on edaboard.com: Fpga And Neural Network
I must implement in vhdl a neural network capable of recognizing these characters: left arrow, right arrow, up arrow and down arrow. I need to use as a template matrix 7 * 5. I also to be and code in Matlab for it.
PLD, SPLD, GAL, CPLD, FPGA Design :: 02-26-2016 05:36 :: bogdani1991 :: Replies: 1 :: Views: 242
I want to implement face recognition system on fpga board. The pre-processing is done in Matlab. So the input will be feature matrix extracted from image. Topology details are as follows :-
No of Input Neuron - 250
No of Hidden Neuron - 25
No of Output Neurons - 40
Activation function - tan-sigmoid
Learning Algorithm - Scaled Conjugate Gr
PLD, SPLD, GAL, CPLD, FPGA Design :: 03-16-2015 05:36 :: saidwivedi :: Replies: 1 :: Views: 383
I am doing a project on implementation of neural network using backpropagation algorithm in fpga. and i have developed a general purpose design in VHDL and i need one application for this. So please help me out with the application.
PLD, SPLD, GAL, CPLD, FPGA Design :: 11-24-2013 08:51 :: dhana60 :: Replies: 1 :: Views: 483
Hi All, I am doing ME in Embedded Systems. I am thinking to make a paper on fpga. Im not knowing the areas of research to do on fpga. I am thinking to do an ASIC design and implement it on fpga. I have interest on Cryptography, digital signal processing, computer architecture, micro processors, micro controllers, digital (...)
PLD, SPLD, GAL, CPLD, FPGA Design :: 08-17-2012 01:42 :: sri krishna yadav :: Replies: 4 :: Views: 517
Can anybody please help me with the EDK tutorials for image preprocessing using MICROBLAZE(the soft core processor in spartan 3e starter kit).I need help for obtaining the chain code sequence of an image downloaded into fpga and give this sequence as an input to the neural network implemented as hardware in the (...)
PLD, SPLD, GAL, CPLD, FPGA Design :: 09-17-2011 10:09 :: vgs :: Replies: 0 :: Views: 573
I'm doing a neural network project on fpga implementation of stock market prediction.There's no error in my vhdl code but it cannot fit into any device because too many logical resources.Any idea how to solve this??
PLD, SPLD, GAL, CPLD, FPGA Design :: 09-15-2008 23:19 :: ainwana :: Replies: 2 :: Views: 1924
Sorry for double posting.
I am an electrical engineering student doing final year project on handwritten recognition. I am thinking of using wavelet transform for feature extraction and hybrid of fuzzy logic with neural network for recognition. May I know any comments on whether is it feasible to implement the (...)
ASIC Design Methodologies and Tools (Digital) :: 09-27-2009 04:28 :: kolopipo :: Replies: 0 :: Views: 850
I found this link of using speech recognition using neural network and fpga
It provides the main code in c as below :
My problems are how to find out the values of normc and
mins ??? As I can not find them to ask !!!!!
Digital Signal Processing :: 09-14-2009 06:32 :: lgeorge123 :: Replies: 1 :: Views: 1601
I'm trying to dive into deep waters. I'm trying to implement (more correct I'm looking for more information at this stage) some basic (for the moment) neural network with fpgas. I am very interested in how others are doing it. But found almost no free information - basically some IEEE transactions that are 1. paid (...)
PLD, SPLD, GAL, CPLD, FPGA Design :: 01-26-2007 09:41 :: uglyduck :: Replies: 1 :: Views: 1087
Any idea about implementing neural networks on fpgas?
PLD, SPLD, GAL, CPLD, FPGA Design :: 06-16-2004 02:01 :: mami_hacky :: Replies: 2 :: Views: 1207
I did my graduate thesis about neural networks Embedded fpga. Do anyone want to share docs about it? I used Matlab and Verilog HDL to design my Equalizer....
PLD, SPLD, GAL, CPLD, FPGA Design :: 04-08-2004 06:16 :: ThaiHoa :: Replies: 6 :: Views: 2156