| Search found 260 matches on edaboard.com: fpga pcb fpga zx fpga cp d cpld fpga spi fpga |
what is eda tools?
i just wanna ask what is the meaning of eda tools. i only use cadence tools to design circuits. is it part of eda tools?...
Software Problems, Hints and Reviews :: 15 Feb 2007 3:50 :: ryusgnal :: Replies: 15 :: Views: 1254
please list of the companies in the field of vlsi.....
hi,please list of startup and other companies working in the field of vlsi that are there in india.as this listing may help many of them who are in search. many of us know companies that are not know to others. this may help them.regardskil...
PLD, SPLD, GAL, CPLD, FPGA Design :: 10 Feb 2007 9:57 :: gharuda :: Replies: 1 :: Views: 759
need help reg power suplly for fpga
i want to make a standalone pc card(push in structure).so when inserted in the pci slot can the 3.3v from computer, drive two regulators(2.5v-1.5a & 1.2v-200ma) and one spartan3 fpga?is the voltage from the system enough to drive regulators and fpga...
PLD, SPLD, GAL, CPLD, FPGA Design :: 09 Feb 2007 9:12 :: ilikebbs :: Replies: 5 :: Views: 156
fpga vs dsp which one is better
if the money does not the matter...
Digital Signal Processing :: 09 Feb 2007 5:18 :: ariyan :: Replies: 45 :: Views: 4527
company in eu offering services
hi,we are developement company located in eu. as our service we are offering sw/fpga/pcb solutions at competitive prices. our expertise is number crunching in fpga(xilinx, lattice, altera) backed by academic research (signal processing, numerical alg...
EDA Jobs, Promotions, Advertising :: 08 Feb 2007 14:45 :: Mazi3 :: Replies: 0 :: Views: 183
[required] experienced dsp engineer (communication focus)
dear all,below a list of requirements for a vlsi-dsp/communication systems focus engineer. the guaranteed engineer, is supposed to travel to us within two monthes and work in a project for about 3-6 monthes.allowed experience is 3+ years.if you know ...
EDA Jobs, Promotions, Advertising :: 06 Feb 2007 14:45 :: fahadislam2006 :: Replies: 1 :: Views: 432
lookup table with cpld or fpga?
hi friends,i want to implement a lookup table (rom memory) which comprise 362 cells, each one is 16bits ( so contains 2*181*16=5792bits). i prefer to use cpld because it do not need any prom in pcb. can you suggest me a cpld from xilinx (for example ...
PLD, SPLD, GAL, CPLD, FPGA Design :: 28 Jan 2007 6:47 :: my_garden :: Replies: 2 :: Views: 159
the 10 digital code of fpga based development kit board
hi all, i have bought an fpga based development kit in america, and i want to send it to china, but unfortunately i don’t know the correct 10 digital code for export/import thing, so the board has been held by the costumes officer there. could you pl...
Business Special Interest Group :: 30 Nov 2006 8:37 :: cdcll :: Replies: 1 :: Views: 339
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which pcb software is most recomendable?
hi, i am new to pcb design. can anyone tell me which pcb design software is most recomendable for use?...
PCB Routing & Schematic Layout software & Simulation :: 28 Nov 2006 9:50 :: taymoor2000 :: Replies: 28 :: Views: 1665
altium 6 : wire length for timing
hi.as i know the signal integrity simulator measures the total length of wire segments in a net. am i correct? its good to calculate a capacitive load, but not for timing.i would need an info about the wire length betwin the soure-sink1 and source-si...
PCB Routing & Schematic Layout software & Simulation :: 12 Nov 2006 23:10 :: buenos :: Replies: 5 :: Views: 267
need schematic and pcb of fpga development board .help
i intend to make a development kit for spartan_3 family,have anyone got schematic and pcb of this board :)). it is good if it is simple, i can not make a board if there are many layer and complex :)) , please send to me . thanks for your attention :...
PLD, SPLD, GAL, CPLD, FPGA Design :: 07 Nov 2006 19:52 :: System.out :: Replies: 3 :: Views: 165
what is the importance of coupling capacitors in pcb ?
what is the importance of coupling capacitors in pcb ?...
PCB Routing & Schematic Layout software & Simulation :: 07 Nov 2006 7:27 :: bcl :: Replies: 8 :: Views: 435
[helpme] job choose problem
hi guys, i have a big problem... i need to decide my first job and i need to understand by what kind of job start.i have done a stage of one years half in fpga (vhdl programming), vhdl testbench, analog design and pcb design (a whole system).now i re...
EDA Jobs, Promotions, Advertising :: 27 Oct 2006 6:37 :: fahadislam2006 :: Replies: 1 :: Views: 333
passing clocks to 2nd fpga
suppose we need a design with clk in one fpga, and we also need this clk to go to 2nd fpga, and the skew between them must be small. whats the best way to achieve this?thanks...
PLD, SPLD, GAL, CPLD, FPGA Design :: 02 Oct 2006 17:23 :: Iouri :: Replies: 7 :: Views: 288
how to learn system design
to learn the basics of system and pcb design? not pcb layout, but pcb design (bypass capacitors, resistors, diodes, power sources, etc) added after 13 minutes: everybody can program a microcontroller/fpga, but few can implement the whole hardware sys...
Professional Hardware and Electronics Design :: 30 Sep 2006 13:36 :: PaulHolland :: Replies: 3 :: Views: 291
need urgent help for xilinx fpga!!!
by accident, we have connected the vcco for lvds output signals from 2.5v to 3.3v on pcb.we still can assign the signals to lvds level inside program, but the i/o voltage at outside is 3.3v.what we should do to correct this?we do not have time to f...
PLD, SPLD, GAL, CPLD, FPGA Design :: 19 Sep 2006 18:26 :: Gunship :: Replies: 1 :: Views: 234
fpga design
i am working on a graphics application where a fpga is used to transfer pixels from a video input to video output. i need someone who can help me design the board properly. i can come up with a circuit diagram or pcb layout, but someone has to inspec...
Professional Hardware and Electronics Design :: 13 Sep 2006 20:42 :: vijair :: Replies: 0 :: Views: 192
higher speed design problem
hi,i used to design fpga at 125 to 170 mhz. now the question is if i upgrade the design at higher frequency et say 900 mhz, what kind of crisis i need to handle? what would be the critical issues and how can i solve them?...
ASIC Design Methodologies & Tools (Digital) :: 09 Sep 2006 5:07 :: funster :: Replies: 4 :: Views: 294
who to chose fusion fpga or cyclone ii fpga?
i am beginner and want to lern fpgas and all this time (2months) i searched the best, cheapest fpga for my lerning experiments and found ofcours alteras cyclone ii series (i am intrested in ep2c8q208c8) and xilinx spartan 3 and lattice and new actel ...
PLD, SPLD, GAL, CPLD, FPGA Design :: 05 Sep 2006 8:57 :: Epis :: Replies: 7 :: Views: 1338
maximum load for fpga io
dear all,im designing a memory interface where a lot of memory chip are driven by an fpga so that the capacitive load on the pcb track becomes high. the effect will be1) increase of delay2) slow edge on the signalcan this second effect cause problems...
PLD, SPLD, GAL, CPLD, FPGA Design :: 23 Aug 2006 8:17 :: guybrush :: Replies: 0 :: Views: 165
lvds signalling
dear friends,i need your help for an lvds question.according to your direct experience,how important is impedance matchingin vhdl signalling at 150mbps and fora 1m distance point to point communication?how much the eye pattern will closeif i dont res...
PLD, SPLD, GAL, CPLD, FPGA Design :: 26 Jul 2006 10:05 :: YUV :: Replies: 22 :: Views: 858
free lancers' portal
hi, would like to create a electronics engineer free lancer home base.those who is interested in the free lance job. please state:name:contact: email/phonecountry:core competency/skills: fpga/high speed pcb design/analog + etc... added after 2 minute...
EDA Jobs, Promotions, Advertising :: 19 Jul 2006 11:16 :: Sigma|Six :: Replies: 0 :: Views: 210
1.2v power supply for altera cyclone ii fpga
dear sir,would you please suggest me about altera cyclone ii ep2c8q208 vccint 1.2v circuit ?is there any linear regulator could supply this voltage ?very very thanks your suggestions ~...
PLD, SPLD, GAL, CPLD, FPGA Design :: 12 Jul 2006 15:06 :: elcielo :: Replies: 5 :: Views: 327
isa to pci complaint
hello,we have a pcb which is isa spec. it has fpga and other related circuitary.if i have to design pci complaint pcb what the thing i should take care.regards,nsrm...
PC Programming and Interfacing :: 11 Jul 2006 9:13 :: n_s_r_m :: Replies: 0 :: Views: 111
mentor graphics pads pcb tool
hello all,i am fpga designer and i would like to learn how to work with a pcb / layout tool. i need an example / tutorial to show me how to start from schematic and end up with a routed pcb. does anyone know if i can find any kind of such tutorial? i...
PCB Routing & Schematic Layout software & Simulation :: 29 Jun 2006 10:17 :: kachuisa :: Replies: 4 :: Views: 696
what is the need of "flux" when soldering on pcb?
what are the advantages/disadvantages of using flux when soldering components on a pcb, also how can it be used?thanks for help,ahmad,...
Professional Hardware and Electronics Design :: 19 Jun 2006 17:55 :: mmike :: Replies: 26 :: Views: 1818
problem with avnet virtex-ii pro eval board
hello guys, i have a avnet virtex-ii pro eval board, do i have to use edk to program the chip?i ask this question now because i have edk and ise 8.1 but i only have a multi-linx cable which is no longer supported by xilinx. i have to go back to us...
PLD, SPLD, GAL, CPLD, FPGA Design :: 10 Jun 2006 17:29 :: SynKore Support :: Replies: 3 :: Views: 204
xilinx ise coregenerator...is it really usefull?
i am not sure about ise coregenerator.... can we say that this is like other compiler that are not as optimised as manual coding?!!my question is : is the final result of these automatic coregeneratore, more optimised than self-written vhdl code? or ...
PLD, SPLD, GAL, CPLD, FPGA Design :: 02 Jun 2006 6:22 :: JaneZhong :: Replies: 5 :: Views: 504
xilinx fpga router error,can someone heip me?
hello everyone, i use a pair of lvds signals as the differential clks of dcm,when implementing the design ,i encounter an error as follow:this design contains an lvds pair.the pair of ios must be palced in a specific relatice structure.what should i ...
PLD, SPLD, GAL, CPLD, FPGA Design :: 30 May 2006 5:25 :: shoufeng_luo :: Replies: 3 :: Views: 153
about measure dac
dear all, i want to measure my current dac. i have some question.1.how do i measure my inl and dnl using multimeter? because my current dac has 12 bits and 500mhz. too many points. how do i measure inl and dnl by using multimeter? or if you...
Analog Circuit Design :: 24 May 2006 3:30 :: yen :: Replies: 3 :: Views: 366
voltage regulators on fpga kit
how can i use the voltages from the voltage regulators for 2.5v/3.3v on the development kit....how can i take voltages from them and use them for input to gpiothanks,salma:)...
PLD, SPLD, GAL, CPLD, FPGA Design :: 18 May 2006 14:52 :: yego :: Replies: 1 :: Views: 147
how to convert a design into a real product?
i am a newbie , sorry if this question sounds stupid. i want to know the way to convert a fpga design into a form thats close to final product form. or put it this way, how to build it into a more compact form? for example, if i design a up down c...
PLD, SPLD, GAL, CPLD, FPGA Design :: 05 May 2006 12:50 :: electron_boy :: Replies: 11 :: Views: 396
how to design a soc?
i want to study to design a soc , and where to find a soc design example?open_cores?...
ASIC Design Methodologies & Tools (Digital) :: 14 Apr 2006 13:22 :: SkyHigh :: Replies: 12 :: Views: 732
can i build an fpga kit? need your suggestions plz
trollers programmers, kits, and manyother test boards and whatever for many types of microcontrollers that can be built, however therere many other kits for microntroller sold everywhere,but, for the fpga, i never see any kit circuits or shematics th...
PLD, SPLD, GAL, CPLD, FPGA Design :: 04 Apr 2006 23:38 :: gliss :: Replies: 6 :: Views: 501
business opportunity
hithis is my profile:-location - singaporebackground - bachelor of engineering, msc in computers. related experience - avr and 8051 based system. vb and c coding fpga / cpld. manufacturing setup - i own industrial land in noida (near delhi, india), ...
Business Special Interest Group :: 29 Mar 2006 5:17 :: webmaster_ph :: Replies: 8 :: Views: 1083
chip design
this may be a stupid question but:if i want to start to design my own fpga chips where do i have to start with?which topics do i have to learn? do i have to study analog chip design or digital chip design or something else? which companies can produc...
ASIC Design Methodologies & Tools (Digital) :: 21 Mar 2006 7:17 :: deva_eda :: Replies: 11 :: Views: 714
[fpga] newbies help on multichannel video stitching
hi i am working on a project which require stitching 4 videos together. 320x240 each, i am new to this field, so i need advice on what to buy which is suitable for this project. the video have to be in real time.i am looking at this http://www.altium...
PLD, SPLD, GAL, CPLD, FPGA Design :: 10 Mar 2006 12:33 :: ug02048 :: Replies: 4 :: Views: 285
questions about livedesign?
questions about livedesign?hello there...1) what is the difference between altium livedesign board and altium livedesign evaluation board?2) is this right, spartan 3 has 1 million gates, i.e. pentium ii can be embedded in the board?3) what is the dif...
PLD, SPLD, GAL, CPLD, FPGA Design :: 06 Mar 2006 11:15 :: samcheetah :: Replies: 1 :: Views: 222
final year project
hi friends,i am looking for a project....which include fpga(verilog),pcb and gui design..can somebody suggest me a project...or is there any chip/bridge, which is absoloute from the market....so i can use that as my project..looking forward for your ...
Hobby Circuits and Small Projects Problems :: 05 Mar 2006 17:27 :: tom_hanks :: Replies: 12 :: Views: 831
pls give advice for "new soc chip development flow"
new soc chip development flow1.1 what productionactivity:market information collection.market analysispeople involved:market department(include customer support group)manager.customer1.2 production function define include planningactivity: informatio...
ASIC Design Methodologies & Tools (Digital) :: 04 Mar 2006 9:32 :: xiongdh :: Replies: 0 :: Views: 192
how to get started with cpld/fpga?
hi all,this is not a new question but my experience about cpld/fpga is almost zero. all concepts and comments that you discuss here are very new for me. so can someone show me some ways to get closer? how can i start researching about cpld/fpga?thank...
PLD, SPLD, GAL, CPLD, FPGA Design :: 02 Mar 2006 7:18 :: deb_mallik :: Replies: 5 :: Views: 480
pesudo random number generator
hi,i need a 32-bit pesudo random number generator?thx...
ASIC Design Methodologies & Tools (Digital) :: 28 Feb 2006 8:28 :: moorthi :: Replies: 8 :: Views: 675
questions about termination and pcb layout
hi all, im designing a board which has an fpga xc3s1500 interfacing with qdr sram memories. it works at 100 mhz (effectively 200 mhz because the qdr memory uses both rising and falling edge - ddr). i read some documents about designing high speed pcb...
PCB Routing & Schematic Layout software & Simulation :: 27 Feb 2006 11:22 :: sugvivek :: Replies: 2 :: Views: 336
re-balling fpgas
i currently have an issue on some of my board designs due to leaded bga devices becoming obsolete and only the lead-free variants being available. the solution i have requires me to get the devices re-balled. does anybody have any experience of re-ba...
PLD, SPLD, GAL, CPLD, FPGA Design :: 10 Feb 2006 13:43 :: banjo :: Replies: 2 :: Views: 213
how to find jobs?
hi,how to find some jobs to work over internet.all about microcontrollers,fpga,pcb designs,......
Microcontrollers :: 03 Feb 2006 0:32 :: darko79 :: Replies: 0 :: Views: 96
cadence or mentor
please ,could any one tell me which tools is better in rf circuit design :mentor tools or cadence tools ?and why?...
RF, Microwave, Antennas and Optics :: 02 Feb 2006 10:24 :: Manjunatha_hv :: Replies: 6 :: Views: 282
impedance characteristic and pin problem
i want to desing a pcb for a fpga tqfp144 with a pin width 0.254mm, now for matching my fpga with my pcb track at 50Ω i need a width track of 0.526mm with a fr-4 with 0.32mm of thickness (distance signal-ground), but this width track isnt compat...
PCB Routing & Schematic Layout software & Simulation :: 30 Jan 2006 20:42 :: jdhar :: Replies: 3 :: Views: 279
features of protel dxp 2004?
features of protel dxp 2004?i know, protel dxp 2004 can do simple circuit simulation(if simulative models are used),it also helps in pcb layouting. but i like to know about its fpga features. such as 1. what are nanoboards,how much they cost,does any...
PLD, SPLD, GAL, CPLD, FPGA Design :: 08 Jan 2006 6:20 :: samcheetah :: Replies: 3 :: Views: 351
how to simulate this system? orcad can do? or others?
i want to simulate my system:one virtex4 fpga and some other leds and others, i have all rtl file(writen by verilog) for the virtex4 fpga, and the schematic of the fpga and other parth are aready designed by orcad capture. can i simulate this system(...
Software Problems, Hints and Reviews :: 22 Dec 2005 20:31 :: jhallows :: Replies: 5 :: Views: 444
pcb and decoupling capacitor
i must design a pcb board for my fpga project, theres any document or website that describe how can i set decoupling capacitor on my pcb?...
Analog Circuit Design :: 12 Dec 2005 9:34 :: Thanat_Chu :: Replies: 2 :: Views: 192
a simple question
a simple question.what are fpga and pcb abbraviation of ??...
Electronic Elementary Questions :: 06 Dec 2005 16:50 :: van_gift :: Replies: 4 :: Views: 300
need advice on building a pci card
hi alli really want to learn how to interface to the pci bus and am trying to collect information on how to go about designing and building a simple card. what im aiming for at first is a very simple i/o card that can do something like control some l...
PC Programming and Interfacing :: 29 Nov 2005 23:45 :: chiptoxic :: Replies: 7 :: Views: 1167
fpga learning
dear alli want to learn fpga or cpld programming an design a simple board that could connect to rs232 and paralell port with one keyboard and lcd with cheap fpga or cpld ic.please help me and your suggestion.best rigards....
PLD, SPLD, GAL, CPLD, FPGA Design :: 16 Nov 2005 15:47 :: echo47 :: Replies: 4 :: Views: 663
i want to find the job in germany
i want to find a job in germany:have experience in: fpga/cpld, vhdl, pic, pci, pcb designing, c/c++ and a lot of more. now working with mpeg-2 transport streams in dvb systems. other information on e-mail.lelik_bolik@hotbox.ru...
EDA Jobs, Promotions, Advertising :: 05 Nov 2005 15:15 :: ayemen :: Replies: 11 :: Views: 2504
schema/pcb/simul/emc package tailored to power electronic
hello ,im an electronic engineer dealing with power electronics.ups units, power conversion, analog desing - are my main everyday goals.im rather not working with microprocessors or fpga designs.my question is:is there a dedicated software suite or c...
PCB Routing & Schematic Layout software & Simulation :: 03 Nov 2005 18:11 :: Jos Brink :: Replies: 1 :: Views: 348
fpga jtag port dont't work ?
i have do two pcb fpga board , but they dont work good ,the jatg port does not download bit file ,the error report is read id 11111111111..., not the correct id number, one know the reason,who can help me?thanks!...
PLD, SPLD, GAL, CPLD, FPGA Design :: 02 Nov 2005 3:16 :: Matrix_YL :: Replies: 10 :: Views: 2034
at91rm9200 board/schematics
hi,i`m looking for a simple board with tha at91rm9200, or for some reference design schematics. so far i was only able to find an announcment for an atmel board of $5000,- on the atmel site no schematics are available.any suggestions, links ?whoops...
Microcontrollers :: 27 Oct 2005 1:29 :: elcielo :: Replies: 12 :: Views: 2495
[question] any small size oscillator for fpga use??
dear all,due to the small area of pcb, any small size osc for use ???clock rate about 10m ~ 40mhz!!!thank you for help!!!regards,etrobin...
PLD, SPLD, GAL, CPLD, FPGA Design :: 20 Oct 2005 8:37 :: echo47 :: Replies: 1 :: Views: 186
config cpld(urgent,urgent)
hi,all!!!im using altera cpld--epm7128slc.if i use one of the altera university boards, the cpld can be very easily configed.the problem is that im designing my circuit, as part of my circuit, i want to use jtag pins(tdi,tdo,tms,tck) to do the isp t...
PLD, SPLD, GAL, CPLD, FPGA Design :: 03 Oct 2005 5:35 :: jay_ec_engg :: Replies: 6 :: Views: 543
labview fpga
does anyone has some tutorials/ projects / e-books / more information about labview fpga module? i want to begin a study about this topic!kind regards and thanks in advance....
Electronic Elementary Questions :: 30 Sep 2005 12:07 :: piscanec :: Replies: 5 :: Views: 579
need help about cyclone fpga, too high current!
ive designed a signal acquisiton and processing system based on dsp(tms320c6713) and fpga(altera cyclone). when the circuit is powered, the total current is 0.55a though there is no program running neither in fpga nor in dsp. the other devices, such ...
PLD, SPLD, GAL, CPLD, FPGA Design :: 28 Sep 2005 16:14 :: cube007 :: Replies: 5 :: Views: 306
why my fpga can't work?could anyone help me
i have developed my fpga board using ep1c3t100(cyclone) .i use as+jtag configration model,but! when i config my fpga using jtag ,the log showcant access jtag chain.when i using as model ,it can programe epcs1 chip, but the verifcation is wro...
PLD, SPLD, GAL, CPLD, FPGA Design :: 16 Sep 2005 14:37 :: zgq0319 :: Replies: 9 :: Views: 414
chipscope problem
now i want to see the internal signal in the fpga under test,so i use the chipscope but the chipscope doesnt work correctly,sometimes it can trigger however the match function i use.and the datas are always 0s,sometimes it cant trigger however the ma...
PLD, SPLD, GAL, CPLD, FPGA Design :: 14 Sep 2005 2:57 :: yeewang :: Replies: 10 :: Views: 522
two layer pcb can do this?
hello: now i want to make a customer develop board.there are a 1c12 cyclone fpga 256 pins,a sdram 54 pins ,a flash 48 pins and other components.i think if the four layers it will be easy,but much expensive.so i want to ask the two layerscan ...
PCB Routing & Schematic Layout software & Simulation :: 15 Aug 2005 14:28 :: funster :: Replies: 9 :: Views: 813
win2003 for eda?
has anybody already switched over from win2000 to win2003 for eda?any problems with major pcb/fpga design packages so far?...
Software Problems, Hints and Reviews :: 08 Jul 2005 23:41 :: davorin :: Replies: 0 :: Views: 168
urgent need for 4-layer fpga based pcb design and implement
dear members,i am in an urgent need for pcb design and implementation services for an fpga board with xilinx spartan-3 xc3s1500fg676. my budget is very limited. my complete need is:1. schematic design2. pcb design 3. signal integrity analysis4. acqui...
PCB Routing & Schematic Layout software & Simulation :: 29 Jun 2005 13:34 :: Mazi3 :: Replies: 2 :: Views: 201
asics vs fpgas
today i read an article at embedded365.com about fpgas and asics. what i understood is that asic based design was once rocket science but due to alot of complexities it is dying out. whereas fpga simplifies alot of the complexities for the designer. ...
PLD, SPLD, GAL, CPLD, FPGA Design :: 23 Jun 2005 4:47 :: freeinthewind :: Replies: 20 :: Views: 1422
what is a function of pll and dll in fpga ??
hi..what is a function of pll and dll in fpga.. while selecting fpga... which specifications related to pll and dll i should keep in mind.can anyone give me some example where pll and dlls have played critical role in designing ?...
ASIC Design Methodologies & Tools (Digital) :: 22 Jun 2005 8:06 :: dBUGGER :: Replies: 7 :: Views: 1512
buffer
im looking for a methode to protect ioport of my fpga. my io run at 100 mhz and i need a dip or plcc pakage. i need current and voltage protection. thanks for your help...
PLD, SPLD, GAL, CPLD, FPGA Design :: 19 Jun 2005 4:20 :: power-twq :: Replies: 9 :: Views: 771
how can i find rise/fall time of xilinx fpga?
how can i find rise and fall time of output signals from xilinx fpga ? will it generate any file after synthesis which will provide this sinformation ?...
PLD, SPLD, GAL, CPLD, FPGA Design :: 18 Jun 2005 14:31 :: power-twq :: Replies: 5 :: Views: 384
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