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which is the first company that produce fpga?
q1.why fpga can guarantee almost all logic design can be implemented in its le( logic cell/logic cell), base on what theorem?q2.who is the le(fpga) invetor, which paper(s) is fpga pioneer paper?q3. any article/paper mention about the history of...
PLD, SPLD, GAL, CPLD, FPGA Design :: 11 Jun 2005 7:23 :: power-twq :: Replies: 4 :: Views: 252
"standard" jtag pinout
what is most common jtag pinout? i saw 3 standards:2x5 pins (old altera byte blaster)2x7 pins2x10 pins (imho newes one).ps i am designing pcb for xilinix fpga, and for this project i wonder what pinout use....
Other Design :: 25 Apr 2005 2:42 :: sp :: Replies: 1 :: Views: 621
fpga
what is fpga and what for?...
Electronic Elementary Questions :: 16 Mar 2005 16:11 :: kairimai :: Replies: 17 :: Views: 1563
how to protect the bitstream in xilinx/altera fpga?
hi, actel have some fuse and flash base fpga that can protect the bitstream inf fpga device . does xilinx or altera have similiar function or devices?...
PLD, SPLD, GAL, CPLD, FPGA Design :: 09 Feb 2005 7:18 :: alixedi :: Replies: 12 :: Views: 832
how do i secure my hardware design?
i have an application consisting of a quad op- amp, an ic from the digital gate family, a few (<10) resistors, de-coupling caps and a transistor.how do i secure this design (protect it from being copied) without security, i cannot mass market it. ...
Professional Hardware and Electronics Design :: 09 Jan 2005 4:49 :: sp :: Replies: 12 :: Views: 1161
digilent fpga board
hello all,how about the digilent fpga board, see https://digilent.us, i want to buy the spartan3 board, but how about the quality of this companys board, who know that?regards,davy zhu...
PLD, SPLD, GAL, CPLD, FPGA Design :: 01 Jan 2005 17:03 :: soccer :: Replies: 12 :: Views: 1395
fpga reset
i use xilinx xcv3200e for asic verification,after the target was configured,and i run some programs,the fpga was always reset,i dont know why????????????plus:i configurate the fpga with parallel download cable,i just guess the pc lpts signals did it!...
PLD, SPLD, GAL, CPLD, FPGA Design :: 18 Nov 2004 14:54 :: taotaocui :: Replies: 7 :: Views: 622
i need job in germany.
i need job in germany.fpga/cpld altera xilinx picavrarmpcb and more.ka_ru2003@msn.com...
EDA Jobs, Promotions, Advertising :: 18 Nov 2004 12:39 :: ep20k :: Replies: 14 :: Views: 2228
how to start with xilinx's fpgas
hello friends,probably this question is very banal but i would like to create a pcb as simple as possible with one xilinx fpga lat say from spartan family.i would like to create a simple download cable as well.as a result i want to fit several simple...
PLD, SPLD, GAL, CPLD, FPGA Design :: 10 Nov 2004 3:09 :: nj_jack :: Replies: 9 :: Views: 582
pr0tel2oo4 and sp(at)rtan
some days ago i migrate from pr0teldxp to pr0tel2oo4 and noticed that new version doesnt support sp@rtan family in fpga design, it left only in pcb design :(anybody know how i can patch new version of pr0tel to add sp@rtan support?...
PLD, SPLD, GAL, CPLD, FPGA Design :: 04 Oct 2004 9:11 :: SPATAN :: Replies: 2 :: Views: 321
about avnet avbus
i am planning to buy one of the avent fpga evaluation boards. in the board description has mentioned that its user i/os are through avbus connectivity. i find out i should buy avbus breakout module too.but i still dont know ...
PLD, SPLD, GAL, CPLD, FPGA Design :: 26 Sep 2004 15:10 :: Big Boy :: Replies: 5 :: Views: 957
how to configurate a xilinx device with a mcu and flash?
to gain lower cost and less pcb area , i need to configurate the xilinx device -spartan 3 with the mcu and flash memory ,but i dont know how to do it.somebody knows ?...
PLD, SPLD, GAL, CPLD, FPGA Design :: 24 Sep 2004 8:47 :: 5life :: Replies: 8 :: Views: 717
stratix enhanced /fast pll, gclk, rclk question
hi, i am new to stratix fpga design, maybe my question is too simple.what is the relation between enhanced/fast pll and global/regional clock? our current design uses a lot of clocks, and the global clock number are not enough, so we need to use regi...
PLD, SPLD, GAL, CPLD, FPGA Design :: 14 Sep 2004 5:10 :: hayang :: Replies: 0 :: Views: 240
my fpga devlp platform
with a xilinx spartan2 xc2s200 pq208 fpga on the main boardand many other daughter boards such as the sdram, video(in, out), keyboard, uart etc.and another main board is cypress usb2.0 based (cy7c68013), which featured with a enhanced 8051 core. this...
EDA Jobs, Promotions, Advertising :: 09 Sep 2004 4:12 :: dandynee :: Replies: 4 :: Views: 1209
p*otel 2004 update?
hi all, is somewhere available update from dxp to 2004?...
PCB Routing & Schematic Layout software & Simulation :: 17 Aug 2004 19:03 :: Frosty :: Replies: 6 :: Views: 864
hardware design of 3mb/s point-to-point data link..
lly ive designed a simple protocol on cplds for a 3mb/s data link using manchester encoding (1byte preamble, 2 bytes data, 1 byte tail). the cplds are fine, otherwise i would have posted this in the fpga area. it wo......
Professional Hardware and Electronics Design :: 31 Jul 2004 2:26 :: Buriedcode :: Replies: 3 :: Views: 471
highest bga pin
hi i would like to know the highest no of bga pins that anyone have succesfully routed and may i knoe what is the name of the i/c & whats it use for?regardstaring...
PCB Routing & Schematic Layout software & Simulation :: 29 Jul 2004 12:53 :: majnoon :: Replies: 8 :: Views: 924
high speed fpga pcb with rf
is there anyone who has ever tried ansoft siwave?now im trying to debug 14 layer 4 fpga pcbs with 5 ghz rf interface,its really annoying in si and pi problems.originally there were not much chance to rigorously simulate thepcb working condition in de...
PCB Routing & Schematic Layout software & Simulation :: 29 Jul 2004 3:40 :: nandopg :: Replies: 1 :: Views: 552
ep1s60f1508 pcb
someone might have a simple prototype pcb design for this fpga handy?or readymade pcb to solder it with it?...
PLD, SPLD, GAL, CPLD, FPGA Design :: 22 Jul 2004 17:35 :: davorin :: Replies: 0 :: Views: 195
board level design
i was wondering if anyone out there doing this stuff can tell me 1) what skills are required for am fpga board level design2) what tools?3) whats the neccesary background?i am quite comfortable with the chip level design for fpgas. i would like to ge...
PLD, SPLD, GAL, CPLD, FPGA Design :: 07 Jul 2004 17:55 :: delay :: Replies: 4 :: Views: 1107
fpga development board
hifor those who are familiar or worked with fpga development boardswho knows how to made a poormans fpga development board?i mean does someone have a practical schematics and pcb for such a board.it is not required that it is to be very-high end.tnx...
PLD, SPLD, GAL, CPLD, FPGA Design :: 25 Jun 2004 7:35 :: delay :: Replies: 7 :: Views: 789
how to config two @letra fpga sin one pcb
i have to use 2 @ltera fpgas in one pcb,how to config these two fpgasand,how the configuration data flow?ths...
PLD, SPLD, GAL, CPLD, FPGA Design :: 21 Jun 2004 4:24 :: jetset :: Replies: 3 :: Views: 261
bga part soldering
hi all, im very new to pcb design and i wonder if there is any tutorial that descrube how to solder bga parts (for fpga) to the pcb. i seached aroud the web and i find some documents, but i wonder if some body have a more explicit document....
PCB Routing & Schematic Layout software & Simulation :: 10 Jun 2004 16:27 :: eltonjohn :: Replies: 7 :: Views: 1485
spartan2 &jtag& pcb design? thx!!
how to design the jtag interface of a fpga system?in this system ,one spartan2e chip was used!!!!!may u give me some advice when i design the pcb ?thanks!! :?...
PLD, SPLD, GAL, CPLD, FPGA Design :: 10 Jun 2004 13:24 :: echo47 :: Replies: 1 :: Views: 333
logic estimation in fpga?
how can designer roughly estimate number of macrocells needed,once design is ready...?...
PLD, SPLD, GAL, CPLD, FPGA Design :: 20 May 2004 7:50 :: ashishjindal76 :: Replies: 10 :: Views: 675
hdlmaker (for asic, fpga, verilog, vhdl)
hihdlmaker (for asic, fpga, verilog, vhdl)hdlmaker is a tool for generating verilog and vhdl designs. hdlmaker simplifies the development of complex fpga designs as well as pc boards by performing the following tasks:writes hierarchical verilog and v...
Software Links :: 21 Apr 2004 23:20 :: jimjim2k :: Replies: 0 :: Views: 945
pisoiu, come 2 c my problem.
it happened that recently i was bothered by a data acquisition problem.i have a system base on one dsp.and one fpga implement 4 pwm channel and an adc controller.to test the adc controller, i use 1 pwm channel to generate sinwaveand force the output ...
Professional Hardware and Electronics Design :: 10 Mar 2004 16:19 :: llrry :: Replies: 2 :: Views: 507
display jpgs on t.v
hi,anybody got any idea on how to display pictures taken by digital camera (jpeg) to be displayed on the t.v ?anybody got any previous project (schematic), reference ebook or link to share ?thanks...
Professional Hardware and Electronics Design :: 30 Jan 2004 18:26 :: socketz :: Replies: 8 :: Views: 612
how to protect the ip in an fpga design?
hey guys,what is the best way to prevent reverse engineering for fpgas. how can i protect my ip?...
PLD, SPLD, GAL, CPLD, FPGA Design :: 12 Jan 2004 17:21 :: henrik2000 :: Replies: 25 :: Views: 2279
hold time issue!!??
hi all,i understand that hold time violation happens when the data retain too short after the active edge...but what about, say the data retain for 2 clock cycle, but it falls on the 2nd active edge, does this still consider hold time violation!!??if...
PLD, SPLD, GAL, CPLD, FPGA Design :: 05 Jan 2004 5:03 :: andromeda :: Replies: 10 :: Views: 1780
how to calculate input to output delay
currently i design a protocol conversion using x/ilinx fpga some signals need to be passed through the fpga and other can be dirctly connected, im worry about the time delay between the signals passed through fpga and the direct ones and i should iss...
PLD, SPLD, GAL, CPLD, FPGA Design :: 18 Dec 2003 13:54 :: dll_embed :: Replies: 3 :: Views: 570
spartan 2 configuration method
hi all,what is for you the best, simplest, cheapest method to configure a spartan ii ?please describe your method (pc cable and software , configuration device used on board, ...)thx :please:...
PLD, SPLD, GAL, CPLD, FPGA Design :: 05 Dec 2003 13:24 :: Git :: Replies: 6 :: Views: 1166
no sp3 for protel dxp --> protel 2004
here is the official word from altium, the work that was going into sp3 will be integrated into protel 2004 which will be a new product.----------------------------hi everyone, we would like to notify you about a recent altium announcement and takeso...
PCB Routing & Schematic Layout software & Simulation :: 25 Nov 2003 2:05 :: Frosty :: Replies: 1 :: Views: 971
best aplication for linux?
hi all,what do you use for your work on linux based?1. for schematic + pcb.2. for pld, cpld, fpga design.3. for c based programing.4. for file server.5. for networking (router, repeater, etc)6. for web server.7. for database server.8. for graphical d...
Linux Software :: 06 Sep 2003 16:04 :: fogh :: Replies: 7 :: Views: 1309
best placement for lvds ic ???
hi,i have in my design fpga that connect to the worldwith rx / tx lvds components.where is the preferred location to place the componentsnear the connector or near the fpgaregards,kobik 8o...
Professional Hardware and Electronics Design :: 14 Jul 2003 13:03 :: YUV :: Replies: 1 :: Views: 187
design problem
any body encounter the kind of problem that your design works well atfpga but fails in real chip? can you tell the story?...
PLD, SPLD, GAL, CPLD, FPGA Design :: 11 Jul 2003 6:41 :: brmadhukar :: Replies: 3 :: Views: 423
some circuit for pc logic analyzer?
i was planning a pc based logic analyzer. the idea is using a cache like sram (like 7cy199 or similar) and storing in it digital samples at high speed (40mhz) for later download to pc via pc port. first experiments demostrate concept is ok, but over ...
Hobby Circuits and Small Projects Problems :: 05 Jun 2003 12:33 :: Fragrance :: Replies: 6 :: Views: 1562
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help needed with pcb/board design interview
hi all,ive very humble request for all of you. ...actually im an asic/fpga design verification engineer and i have an interview with a company which does pcb/board designs....i would really appreciate if anyone can give me what sort of questions are ...
PCB Routing & Schematic Layout software & Simulation :: 02 Jun 2003 18:46 :: kbulusu :: Replies: 2 :: Views: 439
how to transmit still images over internet using a micro?
hi to all,im going to explain my proyect and my problem,i want to transmit still video images over internet using a microcontroller, instead of using a comercial pc. i have an analog camera as a source of images, so i have to digitalize the signal, i...
Microcontrollers :: 16 May 2003 18:55 :: algilsan :: Replies: 6 :: Views: 1410
new protel dxp manual
hi all!new protel dxp manual*******************************************the protel dxp manual introducing protel dxp has been extensively updated with a large number of new tutorials and articles. you can access the latest version in pdf format fromht...
Software Links :: 07 Mar 2003 11:15 :: sgrudu :: Replies: 1 :: Views: 767
pci voltage.
hello, im planning to build a simple pci (32bit / 33mhz) card using a spartan-ii, a pci core and some custom vhdl code..im trying to make all points clear but i think i dont have clear a thing, even if i read specs, forums etc :if i want the pci card...
PC Programming and Interfacing :: 24 Jan 2003 7:15 :: drwho78 :: Replies: 9 :: Views: 759
usage of fpga in hobby circuits???
can anyone give me suggestions about using (small) fpgas in hobby electronic circuits? most fpgas seem to be hard to get. and nearly impossible to put on a board (> 100 bga pins). im not sure if other packages are still available and where i can b...
PLD, SPLD, GAL, CPLD, FPGA Design :: 21 Jan 2003 8:34 :: alledauser :: Replies: 21 :: Views: 4818
can i trust it completely?when pins are auto assigned.
after my epm7128lc84-6 was auto assigned pins ,i found that the 84th pin(input/oe1) was assigned as a in pin. the 1st pin(input/glcrn) and the second pin(input/oe2) were gnd.what should i do,trust them or amend them? :oops:...
ASIC Design Methodologies & Tools (Digital) :: 17 Jan 2003 11:58 :: cbh1024 :: Replies: 4 :: Views: 686
full pci i/o card implementation, including pc software.
hi,im looking for a full pci i/o card implementation including pc software.so that means:hardware1: pci card schematic.2: pci card pcb.3: hardware description.4: embedded design (fpga, cpld or whatever)software1: embedded software (if there is any)2:...
PC Programming and Interfacing :: 15 Jan 2003 13:03 :: probert :: Replies: 3 :: Views: 1579
the effect of vias on pcb traces.
could someone explain me the following in short:i have a layout of my 4-layer pcb. the traces should carry relatively high-speed digital data (up to 80mhz) from onboard fpga to the edge connectors. the traces routing on the board is really dense so i...
PCB Routing & Schematic Layout software & Simulation :: 15 Jan 2003 0:38 :: arcnet :: Replies: 6 :: Views: 1814
about xilinx programming eprom and spartan 2 fpga
hello:this is my first time to use xilinx fpga.i had designed the pcb , now i want to test my code is correct,so i have to program the code to the xilinx eprom .i have question about programming , i upload my schematic about xilinx fpga programming c...
PLD, SPLD, GAL, CPLD, FPGA Design :: 04 Jan 2003 13:32 :: Bartart :: Replies: 1 :: Views: 1259
looking for a logic analyzer design.
esign on a logic analyzer.im looking for the kind that doesnt need mbytes of memory or can only sample 1mhz or something.specs:- cheap- fast (>20ms/s)- at least 32 channels.- simple interface to pc.- fpga/cpld based design.greetz, venz....
Professional Hardware and Electronics Design :: 31 Dec 2002 14:49 :: venz :: Replies: 13 :: Views: 1559
xilinx spartan ii eval-board
hi,i am looking for an eval-board with a xilinx spartan ii fpga. it schold be cheap and flexible in the way of use. thanks for any linksolpa...
Hobby Circuits and Small Projects Problems :: 24 Sep 2002 1:50 :: al_extreme :: Replies: 8 :: Views: 4096
pci card
how can i design a card with pci interface and write for it a device driver?i need helps on ics for pci and good links .if there are pci chips with prepared drivers ,it will be better....
Professional Hardware and Electronics Design :: 03 Jul 2002 6:07 :: hot_chmock :: Replies: 11 :: Views: 1238
eda tools can run above linux
can any eda tool run above linux?...
Linux Software :: 02 Jun 2002 9:21 :: tapa :: Replies: 5 :: Views: 2026
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