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altera / xlinx fpga beginer
hello,i wish to start my development with fpgas and cplds.i have knowledge of basics of digital circuit design, but i come from a mostly analog and power background. kindly help me to start my new endeavor with fpgas and cplds.i came to know from thi...
PLD, SPLD, GAL, CPLD, FPGA Design :: 26 May 2008 7:18 :: boseji :: Replies: 5 :: Views: 384
microcontrollers to asic, need advise.
software developement etc. i have completed many projects based on microcontrollers. in this field i have spent 5 years, now i have an offer for job + training for digital hardware design, like asic, fpga , ver......
Microcontrollers :: 19 May 2008 7:50 :: ckshivaram :: Replies: 1 :: Views: 117
routing for multi drop bi-directional bus??
hi guysi have a dought about routing multi drop bi-directional bus. can some pls share there view on this.my current project pcb is 6 layers and contains 2 processors, fpga, 2 cplds. each channel has a processor and cpld. i am trying to route add an...
PCB Routing & Schematic Layout software & Simulation :: 16 Apr 2008 7:20 :: v_kumar :: Replies: 7 :: Views: 273
rf or em and pcb design relationship?
is there subjects takes how to design high frequency pcb; example fpga,dsp boards,... as research topics ?...
RF, Microwave, Antennas and Optics :: 06 Apr 2008 20:32 :: hodahussein :: Replies: 0 :: Views: 69
regarding fpga board design
dear all,i am new to fpga board design, may i know the basic steps to be followed in the fpga design board and may i get any reference books for this.thanks,r balasubramaniaraju...
PCB Routing & Schematic Layout software & Simulation :: 04 Apr 2008 22:17 :: echo47 :: Replies: 1 :: Views: 201
[req] - experience with fpga with built in serdes
8o on pcb or/and cablealtera or xilinxtia :d...
PLD, SPLD, GAL, CPLD, FPGA Design :: 02 Apr 2008 9:14 :: grigodedes :: Replies: 9 :: Views: 1070
which fpga kit is best for beginners?
hi,im planning to use an fpga in a project i have currently. and i was wondering which fpga kit is best for my application.basically i have lots of ttl compatible switches (around 50) to turn on and off in a certain pattern. im thought that the bes...
PLD, SPLD, GAL, CPLD, FPGA Design :: 30 Mar 2008 15:24 :: robinh :: Replies: 6 :: Views: 639
pcb component placement
hi can any one tell me how do we decide the placement of components on the pcb i.e. where to route power signals where to route clock signals and how to route digital and analog signals?...
PCB Routing & Schematic Layout software & Simulation :: 17 Mar 2008 8:51 :: s3034585 :: Replies: 11 :: Views: 679
fpga and adc intefacing
want to know about fpga and adc interfacing?is this interfacing differs with the fpga vendor or any standard interfacing is there???thanx in advance.:d...
PLD, SPLD, GAL, CPLD, FPGA Design :: 11 Mar 2008 9:45 :: xtcx :: Replies: 6 :: Views: 596
how do i generate a 50mhz clock on altera stratix ii
hi there,were trying to generate a 50mhz square wave clock on the altera stratix ii to send to an off-board chip.the way were doing this right now is using the on board 100mhz crystal oscillator and implementing using the following vhdl block. where ...
PLD, SPLD, GAL, CPLD, FPGA Design :: 07 Mar 2008 9:16 :: muralicrl :: Replies: 9 :: Views: 387
we are looking for a freelance job.
hello, everybody!we offer services for circuit design, pcb design, fpga design, system and embedded programming. if someone wants to use our services - email to comp.vision.contracts@gmail.comthanks a lot....
EDA Jobs, Promotions, Advertising :: 29 Feb 2008 8:13 :: compvision :: Replies: 0 :: Views: 257
what's the time delay between seq stat using variable?
hi everybody!, consider this example,process(clk)isvariable a,b,c : std_logic;begin if rising_edge(clk) then a:= 1; b:= not(a); c:= a or b; end if;end process; the above statements should be executed in sequence,since the declaration type i...
PLD, SPLD, GAL, CPLD, FPGA Design :: 29 Feb 2008 0:38 :: tkbits :: Replies: 13 :: Views: 239
vcc/gnd plane requirements for internal fpga voltage?
eed power/ground planes to minimize the high-frequency voltage ripple that results from the switching of external bus drivers. im choosing a board stackup for my board which uses an altera cyclone ii fpga. this fpga has a number of 1.2v vcc pins for ...
PCB Routing & Schematic Layout software & Simulation :: 28 Feb 2008 22:31 :: FvM :: Replies: 4 :: Views: 257
reduce the ise implementation time
hi, i encounter an problem: the ise implementation flow spends 5 hours or so.this lead to the effiency is so low for asic prototyping in our project.who has the experience on this problem? maybe you can give me some advive orprovide some materials. t...
PLD, SPLD, GAL, CPLD, FPGA Design :: 28 Feb 2008 5:05 :: xtcx :: Replies: 16 :: Views: 396
what is a serdes?
can someone here clarify what is a serdes?what applications/designs it is being used?what are the design guidelines to be considered when doing design/layout of serdes circuits?...
Professional Hardware and Electronics Design :: 27 Feb 2008 13:12 :: JABEZ.S.DAVID :: Replies: 2 :: Views: 309
problem with xc18v04 and xc3s400
i have to perform a project with spartan-3 fpga . i have xc3s400 and xc18v04 as fpga and prom. for performing the project i made a pcb based on the circuit from xilinx application note xapp453 the 3.3v configuration of spartan-3 fpgas as below:http:/...
PLD, SPLD, GAL, CPLD, FPGA Design :: 21 Feb 2008 5:34 :: tkbits :: Replies: 1 :: Views: 147
being an electrical engineer
hello everyone ！！i am a student in elecrical engineering i want to know being an electrical engineer ,what is the enssiential software that i must to lerarn------hope someone can help me thank you very much 謝謝啦A...
Professional Hardware and Electronics Design :: 13 Feb 2008 11:14 :: gigahertz :: Replies: 16 :: Views: 1899
want to design a pcb with an fpga on it?
want to design a pcb with an fpga on it, but it seems i can not find official documents from altera or xilinx on how the pins should be connected. on most circuits ive used (simple ics in comparison) there is always a typical circuit to go by. ive lo...
Hobby Circuits and Small Projects Problems :: 05 Feb 2008 21:28 :: FvM :: Replies: 4 :: Views: 192
ise vs qu(at)rtus
im a quartus user. recently, i have to use xilinx tool to synthesize and simulate. but, im really confused because theres a lot of thing i didnt know about xilinx tools....
PLD, SPLD, GAL, CPLD, FPGA Design :: 01 Feb 2008 19:12 :: Iouri :: Replies: 4 :: Views: 183
help in selecting level shifter ic
frnds,myself doing project on fpga as part of academics. i need a level shifter ic between 8-bit parallel flash adc and fpga. purpose is to convert high level voltage 5v to 3.3v (acceptable by fpga)& no shift required in low level. if you have used o...
PLD, SPLD, GAL, CPLD, FPGA Design :: 30 Jan 2008 13:33 :: ep20k :: Replies: 7 :: Views: 1860
fpga hardware (pcb) design
hi, i will be required to start working on desinging custom fpga board (for some algorithm evaluation ) including a device from virtex family...i am new in this era kindly help me in any way u cani want to know ... related software .what about the p...
PLD, SPLD, GAL, CPLD, FPGA Design :: 18 Jan 2008 15:23 :: Koson :: Replies: 3 :: Views: 334
enig or dig pcb plating?
im in the process of choosing a surface finish for my latest pcb. the smallest pitch is 0.5 mm (fpga in 208 pqfp). i have narrowed down my choices to two: 1) enig (electroless ni, immersion gold): apparently a tricky manufacturing process or else ill...
Professional Hardware and Electronics Design :: 12 Jan 2008 0:31 :: JohnG300c :: Replies: 1 :: Views: 227
_altium designer pcb graphics, components disappear....
hello board, i have _altium designer 6.8, but when i drag components in pcb to another place, other components that are beneath them disappear(become invisible) sometimes only one pad of them is visible but when i click on the place that i knew they ...
PCB Routing & Schematic Layout software & Simulation :: 11 Jan 2008 22:08 :: House_Cat :: Replies: 10 :: Views: 399
suggestion needed for a career change
from india and i have been working for about 2.5 years on pcb functional testing, debugging, testings for standards like emc emi, etc....related to pcbs in automotive domain.i got a chance to work on fpga design or asic verification now. i know basi...
ASIC Design Methodologies & Tools (Digital) :: 11 Jan 2008 16:57 :: kumar_eee :: Replies: 1 :: Views: 186
grounds of fpga do not match
i have two digital fpga design boards which use digital ground all perfectly designed 4 layer pcb(2 layers for double side ground). these two boards have two major fpga chip soldered along with some leds and switches. now the case is that i use to se...
PLD, SPLD, GAL, CPLD, FPGA Design :: 04 Jan 2008 13:53 :: xtcx :: Replies: 2 :: Views: 138
atium designer: fpga weak/strong setting doesn't effect sim
when changing the altera cyclone ii drive strength model setting in the model assignment dialog (via the signal integrity floating window the simulation is not affected (rise/fall times the same for non-terminated signal). i have typical, weak, and s...
PCB Routing & Schematic Layout software & Simulation :: 26 Dec 2007 22:29 :: JohnG300c :: Replies: 0 :: Views: 113
two circuits grounds do not match!
i have two digital fpga design boards which use digital ground all perfectly designed 4 layer pcb(2 layers for double side ground). these two boards have two major fpga chip soldered along with some leds and switches. now the case is that i use to se...
Professional Hardware and Electronics Design :: 22 Dec 2007 7:43 :: xtcx :: Replies: 0 :: Views: 147
competetitive pcb design services
i would like to introduce myself as a freelance professional pcb design engineer , and i have been handling pcb layout designs for various electronics organisations in mysore/bangalore in india and in bahrain and saudi arabia. i would feel it a great...
Professional Hardware and Electronics Design :: 21 Dec 2007 17:20 :: manish12 :: Replies: 1 :: Views: 260
why a non-standard 6 layer stackup?
hi,i am trying to analyze the layout and construction of an altera de1 development board, because i want to make a board similar to it.i have determined that it is a 6 layer board with the following layer stackup based upon grinding down the side of ...
Professional Hardware and Electronics Design :: 18 Dec 2007 18:43 :: Arulaane :: Replies: 4 :: Views: 674
career decesion
hi guys i am a new member for this forum.can u just tell me which is the best to make a career in either board design or fpga design writing hdls like vhdl or verilog or learning pcb design.i need to take decesion on any one of this things.p...
Professional Hardware and Electronics Design :: 18 Dec 2007 18:29 :: Arulaane :: Replies: 6 :: Views: 608
high-speed pcb decoupling caps selection?
hi,im doing a board with a cyclone ii and i will need to choose decoupling capacitors for it. im planning to use fr4 with a power and gnd plane. after a fair bit of study it seems like i should use 0.1uf, 0.01uf and 0.001uf low esl/esr capacitors. th...
PCB Routing & Schematic Layout software & Simulation :: 17 Dec 2007 10:25 :: buenos :: Replies: 9 :: Views: 531
free lancers
hi,we are a group of experience developers in singapore & malaysia region.we are specialized in:1. embedded system development. (arm based, pic based, rabbit/zilog based)2. xilinx based fpga development. (we did virtex 5, 4, spartan 3)3. pcb layout (...
EDA Jobs, Promotions, Advertising :: 07 Dec 2007 13:28 :: Impressa :: Replies: 2 :: Views: 315
how to equalise net lenght??????
hi guysi am new to pcb design. can any one pls tell me how to equalise net lenght. i have a fpga and a microcontroller on the pcb and need to route the address and data bus. the pcb is a 4 layer and i am trying to route data on top layer and add on b...
PCB Routing & Schematic Layout software & Simulation :: 03 Dec 2007 7:19 :: s3034585 :: Replies: 5 :: Views: 330
our team offers the development services: sw/hw design
we offer services for circuit design, pcb design, fpga design, system and embedded programming. from idea to a product!we estimate projects in following price range: - software projects $15 - $25 per hour - hardware projects $20 - $35 per hour if you...
EDA Jobs, Promotions, Advertising :: 22 Nov 2007 11:12 :: compvision :: Replies: 2 :: Views: 228
digital sampling oscilloscope (analog part)
hello good people!i develope dso as my diploma project. digital part of the device i decided realise in fpga. but i do not know how competently design analog part of the device(programmable attenuation/div, overvoltage protection). morover, there are...
Analog Circuit Design :: 07 Nov 2007 21:20 :: jazzz :: Replies: 1 :: Views: 315
fpga, cpld in egypt ?!
does anyone know where to buy either fpga , cpld or any sort of programmable logic that can run with clock frequencies 100 mhz or more from egypt ?it would be best if someone already bought one of these components so he can tell me the price also , b...
PLD, SPLD, GAL, CPLD, FPGA Design :: 05 Nov 2007 8:21 :: salma ali bakr :: Replies: 78 :: Views: 4395
atmel vs pic vs fpga
hi, i understand that atmel, pic and fpga are different type of microcontrollers. i am currenly doing my final year project. still deciding on a topic. most sample project available from the internet are using atmel, i would like to know if either pi...
Microcontrollers :: 24 Oct 2007 21:47 :: funnynypd :: Replies: 11 :: Views: 3003
what is firmware engineering?
what is firmware engineering? i hear jobs offered in this field. know o has to do with testing systems or more.i merely learnt some vhdl in college and requirements now jpbs i looked is to ogram in ada langugage.i need more info and lectures about th...
Electronic Elementary Questions :: 23 Oct 2007 9:15 :: alexz :: Replies: 5 :: Views: 543
ADS
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first xilinx fpga board design,what to choose?
i would like to design first fpga board soon,for experimenting with vhdl doing custom microprocessors.. which device do you advice me to select? virtex5,4? spartan? which chip? i am also planning to place a microcontroller on the board and interconec...
PLD, SPLD, GAL, CPLD, FPGA Design :: 20 Oct 2007 0:52 :: echo47 :: Replies: 4 :: Views: 408
want to make a fpga board
i am not familiar with the electric engineering. but i am interested in the fpga. can anybody tell me how to make a fpga board? tools to design the pcb? any knowledge to design the power? thanks a lot....
PLD, SPLD, GAL, CPLD, FPGA Design :: 15 Oct 2007 17:35 :: Iouri :: Replies: 15 :: Views: 927
final project ideas
hello i am studing communication & electronics engineering and i am now at last year so i need idea for good projectthanks for all:?:...
Hobby Circuits and Small Projects Problems :: 10 Oct 2007 11:01 :: dewabantura :: Replies: 8 :: Views: 603
help choosing between altium 6.7, pads, orcad
i’ll try not to make this a “this package is better than that one…” thread.we need help in selecting a schematic package, pcb layout (with autorouting), and signal integrity analysis tool(s).we did a lot of simple board layout in the past (2003), but...
PCB Routing & Schematic Layout software & Simulation :: 13 Sep 2007 10:16 :: mImoto :: Replies: 6 :: Views: 924
correct io standard for 125mhz signal..
hi...i am designing high speed transceiver on pcb, which has adc signals which are interfaced to spartan 3a fpga at bank 3 by lvpecl standard. this interface works at 250mhz.signals from the bank 1 of this spartan 3a fpga are interfaced to i/o of spa...
PLD, SPLD, GAL, CPLD, FPGA Design :: 20 Aug 2007 9:15 :: mta97e :: Replies: 5 :: Views: 1113
how to make an fpga kit from scratch
i want to create a kit of my own for fpga programming. i m familiar with xilinx project manager, model sim, leonardo spectrum...now, i plan for spartan ii fpga, a flash prom, alevel shifter to interface with ttl logic, and some voltage regulator ic t...
PLD, SPLD, GAL, CPLD, FPGA Design :: 13 Aug 2007 20:12 :: abhijitk85 :: Replies: 10 :: Views: 1308
usb to ide hdd
hi all,i would like to build a circuit that interfaces between the ide cable from hdd, and usb cable from pc, so that as a result, my pc would recognise the hdd when my circuit is turned on, and i will be able to read from and write on to my ide hdd,...
Hobby Circuits and Small Projects Problems :: 03 Aug 2007 11:10 :: x_zoli :: Replies: 5 :: Views: 756
input and output delay budgeting for 2 fpga
hi all,example i have 2 fpga on a single pcb board. fpga1 and fpga2 will communicate to each other. a signal will output from fpga 1 to fpga 2. so the output from fpga1 will actually have internal routing delay+ the board level routing delay, so how ...
PLD, SPLD, GAL, CPLD, FPGA Design :: 18 Jul 2007 19:47 :: echo47 :: Replies: 1 :: Views: 159
image processing
i want to make a dip system for production lines so i have some questions.1- to do this project its better i use vhdl and implement fpgas or not?2- whats different between fpga and dsp ics for example tms320c64x series3- if you have any article or bo...
Digital Signal Processing :: 15 Jul 2007 17:02 :: ramram :: Replies: 4 :: Views: 396
ad &fpga
how can i interface nis adc081000 (1ghz) to a fpga(200mhz)? thanks...
PLD, SPLD, GAL, CPLD, FPGA Design :: 02 Jul 2007 1:17 :: calm :: Replies: 13 :: Views: 549
dac module with xupv2p
linx.com/univ/xupv2p.html).but it doesnt contain high speed data converters.i am looking for a dac module in the order of 100 msps.the question is: where can i find it? and how can i connect it to my fpga?...
PLD, SPLD, GAL, CPLD, FPGA Design :: 15 Jun 2007 5:41 :: funster :: Replies: 3 :: Views: 408
sram interface
i am dealing with fpga which interfaces to zbt, i need to add clock feedback to deskew clock using dcm, which pint on pcb is recommended to get feedback signal, from zbt clock pin or other place? also do i need to add more delay on zbt clock path? i ...
PLD, SPLD, GAL, CPLD, FPGA Design :: 14 Jun 2007 14:27 :: funster :: Replies: 3 :: Views: 345
printed circuit handbook by clyde f.coombs.
hi,can anyone provide the link for good analog question , cmos questions ?thanks...
Analog Circuit Design :: 08 Jun 2007 7:26 :: jilkdr :: Replies: 23 :: Views: 3468
synchronous memory: address/data change at which clock edge?
hias i know, the synchronous interfaces (sdram-data/addr, ddr-address) sample the data/address at the clk rising edge.but what i want to know, when do they change the data/address on the bus? at the clk rising edge or falling edge? if at the same ris...
PLD, SPLD, GAL, CPLD, FPGA Design :: 07 Jun 2007 20:43 :: buenos :: Replies: 11 :: Views: 543
question about fpga pcb manufacturing
i am wondering why based on the same pcb design, the same pcb manufacturing, the same firmware and the same fpga, the output data quilty from fpga is so different?some are so good, some are so bad.what is the possible reason for this?thanks....
PLD, SPLD, GAL, CPLD, FPGA Design :: 31 May 2007 14:01 :: sp_harikrish :: Replies: 6 :: Views: 495
sending serial data from fpga through ribbon cable
guysis it possible the serial data from the fpga to the other ic or gate can be loss if we use such a long (1.5meter) 20awg ribbon cable?please advise.thanks in advance....
PLD, SPLD, GAL, CPLD, FPGA Design :: 29 May 2007 14:02 :: fazan83 :: Replies: 11 :: Views: 672
maximum pcb's frequency
hello everybody,i am going to design a pcb which holds an fpga, and i wanna use an external ram on it too. can you tell me please the frequency limitation of pcb, commercial or even high tech. pcb.thanks in advance,hani...
Professional Hardware and Electronics Design :: 29 May 2007 7:36 :: rogerynt :: Replies: 5 :: Views: 645
download cable iii with spartan-3
as you know xilinx download cable iii circuit works with 5v and spartan-3 is 3.3v tolerant. i have a question which may seems funny.is it possible to connect download cable iii(which works with 5v) directly to program spartan-3 or should use a 3.3v k...
PLD, SPLD, GAL, CPLD, FPGA Design :: 23 May 2007 10:19 :: yego :: Replies: 2 :: Views: 525
weird problem. help needed
hi, gangs,i am working on ddr memory controller targeting xc4vfx60-10 with mt46v32m16p-5b. the tools is xilinx mig17.first, i designed a memory controller (16bits) for one mt46v32m16p-5b chip only. it is working properly. then, i designed a memory co...
PLD, SPLD, GAL, CPLD, FPGA Design :: 21 May 2007 18:53 :: banjo :: Replies: 5 :: Views: 570
what is the basic of routing two sdrams???
i wondered about how to rout in pcb two sdrams which are connected to fpga while both data/adress/control bus is shared....
PCB Routing & Schematic Layout software & Simulation :: 20 May 2007 16:28 :: buenos :: Replies: 1 :: Views: 126
freeware spice or ibis simulator for xilinx models?
linear tech simulator and another engineer in the office tried to use the texas instrument simulator. both had problems even opening the xilinx models. what we are trying to do is just simulate the fpga output, the pcb traces and some connectors. ....
PLD, SPLD, GAL, CPLD, FPGA Design :: 15 May 2007 3:26 :: banjo :: Replies: 0 :: Views: 480
fpga and microcontroller
hi,which one is better in performance fpga or microcontroller?...
PLD, SPLD, GAL, CPLD, FPGA Design :: 04 May 2007 2:40 :: babaship :: Replies: 13 :: Views: 1137
pcb design
could anyone suggest me about the sigma-delta adcs and dacs that can handle signal of up to 10mhz to design a pcb that connect to fpga board?thanks...
PCB Routing & Schematic Layout software & Simulation :: 02 May 2007 4:39 :: Rame :: Replies: 3 :: Views: 318
fpga routing
tellme about a tutorial on routing and plcement in xilinx ise8.2i...
PLD, SPLD, GAL, CPLD, FPGA Design :: 23 Apr 2007 9:38 :: vinodkumar :: Replies: 4 :: Views: 666
microcontroller design issue
om2- i can save a number and keep it after turning off the controller and then reload it and change it next time it powers up 3- i can program it on circuit using in circuit programmer (like jtag in fpga) without adding any extra circuits on the pcb...
Microcontrollers :: 22 Apr 2007 15:34 :: omid_azmoon :: Replies: 5 :: Views: 1032
seeking the solutions of high speed interconnection
seeking the solutions of high speed interconnection for the long distance transmission of 3.3v/24mhz signals.we need to connect a cmos image sensor and a fpga chip. the distance between them is approximately 1 meter. the output signal of the sensor i...
Professional Hardware and Electronics Design :: 18 Apr 2007 14:46 :: X.Y. :: Replies: 0 :: Views: 213
any embedded systems company in uae
hi, please post embedded systems companies which are in uae, also provide weblinks if possible. by embedded systems i mean ,,, any of digital designing (fpga,hdl), embedded designing (ucontrollers, c), pcb designingthanks in advance...
EDA Jobs, Promotions, Advertising :: 07 Apr 2007 16:33 :: akduone :: Replies: 3 :: Views: 321
equalizer implementation on fpga
lly i am an undergraduate electronic engineer and this year i am making my graduation project to design and implement an mp3 player, mp3 decoding and the equalizer will be implemented digitally using fpga then i ll use an appropriate dac to implement...
PLD, SPLD, GAL, CPLD, FPGA Design :: 07 Apr 2007 4:59 :: elkass :: Replies: 0 :: Views: 168
uart (1v8 and 2v8) interface to xilinx spartan3 - help need
hello, i have one module that has two operating uart, uart1 is 2v8, and 3v tolerant. uart2 is 1v8. i want to interface these uart to a spartan3 fpga, which i believe i/o signals are [0..+3.3v]. do i need a transceiver to switch levels? could you re...
PLD, SPLD, GAL, CPLD, FPGA Design :: 23 Mar 2007 18:48 :: banjo :: Replies: 4 :: Views: 252
same features & pin compatiblity with xilinx cpld
hi,now i am using xilinxs cpld xc9536xl-44pin.i want cpld from another manafacturer having same features & pin compatiblity with xc9536xl.for this should i do any other changes with my pcb also so that i can use any other manafacturers 44pin cpld?i ...
PLD, SPLD, GAL, CPLD, FPGA Design :: 22 Mar 2007 13:15 :: prajit :: Replies: 2 :: Views: 129
cash paid for fpga device programming
hi all,i need a programmer with enough experience to program an fpga for me based on existing hardware.its a device which loads rom files to ram from 3.5 hd floppy disk via a small menu, then runs the rom in an existing system.the target system is al...
PLD, SPLD, GAL, CPLD, FPGA Design :: 03 Mar 2007 3:33 :: Joel Whybrow :: Replies: 4 :: Views: 243
recommendations
is a 3 semester project for uni. i chose to implement an abs and traction control system in a 1/5th scale remote control car (http://www.mookins.com/car/ for pictures).my original idea was to use an fpga, spartan 3e. i have only ever written vhdl an...
Digital Signal Processing :: 16 Feb 2007 15:37 :: mookins :: Replies: 0 :: Views: 180
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