14 Threads found on edaboard.com: Fpga Verilog Adc
Hello everyone, right now i have the adc module (12-bits) which i convert it to BCD and then ASCII number since hyperterminal understand ASCII code. For UART TX module, i use the one in and it works but hyperterminal output multiple times like this . I believe some cont
PLD, SPLD, GAL, CPLD, FPGA Design :: 01-26-2015 09:56 :: darklumi92 :: Replies: 1 :: Views: 1087
here i provide you with my working adc code together with it ucf file..try it..should be ok...
NET "ad_conv" LOC = "P11" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;
NET "amp_cs" LOC = "N7" | IOSTANDARD = LVCMOS33 | SLEW = SLOW | DRIVE = 6 ;
NET "amp_dout" LOC =
PLD, SPLD, GAL, CPLD, FPGA Design :: 05-16-2014 03:24 :: asraf :: Replies: 4 :: Views: 2381
Hello All !!!!!
I am trying to implement FIR filter on fpga. I am not able make out how to go about it. I have calculated the coefficients and written a verilog code.There is 12 bit adc which will provide the input. I am thinking of converting the 12 bit input into decimal, then apply the filter equation, then convert the answer into binary (...)
PLD, SPLD, GAL, CPLD, FPGA Design :: 10-19-2013 15:50 :: embeddedaebi :: Replies: 0 :: Views: 655
Hi, I'm newbie for fpga. Actually I'm doing a project where i need to do combustible gas detector. I'm using combustible gas sensor and send the output to adc 0804 which will be interface with altera cyclone ii board. I have no idea how to do the verilog code. Anyone can help me
PLD, SPLD, GAL, CPLD, FPGA Design :: 03-12-2013 09:40 :: yuva89 :: Replies: 1 :: Views: 1271
I am working on a project which includes adc interfacing fpga. I have very little idea about it. Please provide a sample code in verilog, which can help.
PLD, SPLD, GAL, CPLD, FPGA Design :: 02-28-2013 06:46 :: sid_PESIT :: Replies: 3 :: Views: 2143
As far as know there are no Analog Digital Converter (adc) embedded in the fpga. You should use external module and the interface for the adc can be written in verilog or VHDL.
PLD, SPLD, GAL, CPLD, FPGA Design :: 09-17-2011 13:12 :: sameh_yassin99 :: Replies: 8 :: Views: 2958
I am trying to interface adc 0808 with spartan 3E fpga.can anyone please tell me how to do verilog program of this?.adc 0808 works at 450 KHz and fpga 50 i have to use different adc or i can do it with 0808.
thank you for your time and help
PLD, SPLD, GAL, CPLD, FPGA Design :: 09-22-2010 19:42 :: longbeach2 :: Replies: 4 :: Views: 2110
hi lads and happy holidays
I am trying to implement a routine, basic code on a fpga with verilog.
this will simply perform some calculations, adc/math operands etc to alter the supply voltage.
I am doing this to simply have control over the power usage of the fpga.
also I would like to have an additional bus for (...)
PLD, SPLD, GAL, CPLD, FPGA Design :: 12-27-2009 23:13 :: toffee_pie :: Replies: 0 :: Views: 812
I've been learning the basics (very basic) of DSP and I wanted to try to implement things in verilog. Histograms DAC->adc etc. How does one go about doing this on an fpga? I have the Spartan 3E starter kit. Not an fpga built specifically for DSP, but should be enough to get something going.
PLD, SPLD, GAL, CPLD, FPGA Design :: 11-08-2009 16:34 :: laserbeak43 :: Replies: 0 :: Views: 724
Hello . Any one can provide example using verilog to interface 10 bit SAR adc parallel out to cpld/fpga and out put i2c data ?
PLD, SPLD, GAL, CPLD, FPGA Design :: 06-19-2009 10:42 :: wls :: Replies: 0 :: Views: 1019
what kind of signal should the fpga generate for u? PWM?
PLD, SPLD, GAL, CPLD, FPGA Design :: 06-09-2008 08:10 :: mami_hacky :: Replies: 1 :: Views: 2587
i want a litel help in making my project on fpga ,,,
i m planing to make a samall scale model of NDT(non distructive testing)
here i giving general oveview,,
i will take a anolog signal from sensonr thn give it to the adc ,,,
i want to store 1 saple per second and display it on LCD display ,,,
then i want to store the
PLD, SPLD, GAL, CPLD, FPGA Design :: 03-21-2008 05:40 :: shadeslayer :: Replies: 7 :: Views: 967
Analog Circuit Design :: 11-13-2007 06:53 :: rameshchand :: Replies: 1 :: Views: 906
I request any question about adc with fpga or PLD.
How can I make adc with fpga or PLD?
PLD, SPLD, GAL, CPLD, FPGA Design :: 07-22-2004 06:40 :: picus :: Replies: 3 :: Views: 2330