1000 Threads found on edaboard.com: Generate Sinusoidal
Do u want to generate sine wave?
if the answer is yes then there are two different methods of doing it.
one is to use a DAC (digital to analog converter)with a controller and the other one is to use PWM(pulse width modulation) with an RC filter.
Microcontrollers :: 02-11-2007 22:20 :: waseem :: Replies: 6 :: Views: 2908
The PWM generated by a microcontroller will give you a square wave, then you will need to apply a process to convert it to sinusoidal, like a filter.
Microcontrollers :: 02-13-2009 14:16 :: daviddlc :: Replies: 7 :: Views: 6453
how to generate sinusoidal pwm pulses using microcontroller by comparing sinewave of 50hz and triangular wave of 3khz
Microcontrollers :: 04-20-2010 05:37 :: kedarnath238 :: Replies: 1 :: Views: 1623
i,m using inverter to control the speed of AC induction motor. switching for this inverter by using tyristor or IGBT. 3 phase PWM were be the pulse for this switch..i use 1khz freq for triangular wave and 50hz for sinusoidal wave, by comparing this 2 wave PWM was generated. i want to know, capture mode and compare mode is the right choice to genera
Microcontrollers :: 12-20-2009 06:37 :: sme7000 :: Replies: 0 :: Views: 986
Microchip have a free program, 'dsPICworks Data Analysis', which you can download from here:
You can use it to generate waveform tables.
PC Programming and Interfacing :: 12-21-2009 08:43 :: btbass :: Replies: 6 :: Views: 3231
Can any body plz tell me how to implement sinusoidal PWM using PIC micro. I have read quiet a few application notes regarding its use but i want to understand how does a single microcontroller can generate sinusoidal waveform in conjunction with the inverter bridge.
Microcontrollers :: 12-31-2009 10:21 :: khansaab21 :: Replies: 0 :: Views: 1542
I am making a pure sine wave inverter . In an intermidiate stage i have to drive the mosfets using SPWM. so anyone please tell me how to generate sinusoidal PULSE WIDTH MODULATION using ARDUINO board.??
Microcontrollers :: 12-18-2012 19:03 :: --BawA-- :: Replies: 1 :: Views: 813
I know PLL is used to generate clocks at higher frequencies than reference clock ... but is it used to generate sine waves too ?
Analog Circuit Design :: 09-01-2013 17:58 :: makanaky :: Replies: 2 :: Views: 230
I developed single phase sinewave inverter usin PIC 16F886 micro controller.I have used sinusoidal PWM technique to generate sinusoidal pulses.I am getting sinewave at out of transformer this sinewave is maintaining at buld loads very nicely and aslo voltage is controlling low battery of 10.5 volts also i
Microcontrollers :: 12-14-2009 23:55 :: praveen_palaparthi :: Replies: 1 :: Views: 1287
I Have certain doubts.
ATMega 16 supports 8 bits while AD9833 requires 16 bit data, how is this achieved?
I want to generate sinusoidal waveforms of different frequencies ranging from 100kHz-1MHz. How do i implement this in the program?
What is a frequency word? Do i feed in the frequency word to the microcontroller?
Microcontrollers :: 05-25-2011 06:12 :: twinklegal :: Replies: 0 :: Views: 1111
instead of generate sinusoidal waves with PWM, DAC or an analog waveform generator, you can use your microcontroller (or other digital circuit) for generate a square wave at f0 and f1. Then, filter the square-wave FSK with a low-pass or passband filter. That filter has to pass the band centered at about 20 KHz, and the lower (...)
Digital communication :: 06-29-2011 23:19 :: zorro :: Replies: 1 :: Views: 723
I`ve created my own frequency invertor. I have problem with the program of the microcontroller. I`m using 20 points 1ms each to generate sinusoidal wave but when I connect a load engin it`s turning on pushes. I`ve tried with different conbinations of these 20 points - different dead time, different continue time for each impulse but the rezult is a
Power Electronics :: 12-07-2011 02:59 :: stoyanoff :: Replies: 1 :: Views: 432
if u just need a single tone, then u can store the values for the sine in a ROM and throw it out on each clock.
If u need different tones to be generated, then u have to implement a Phase Accumulator also.This concept u can get it easily if u go through any of "DDS" or "NCO" implementation. search in google for NCO or DDS.
PLD, SPLD, GAL, CPLD, FPGA Design :: 01-28-2006 01:32 :: Renjith :: Replies: 1 :: Views: 901
I have designed a DAC. Now I want to test it.
I want to apply a digitized sinusoidal signal as a input.
But I do not know how to generate such kind of input signal.
Could you please advice.
Do you have a such example.
Thanks in advance.
Analog IC Design and Layout :: 05-04-2010 12:44 :: samvelc :: Replies: 5 :: Views: 1188
After extensively googling I found no valid circuit to generate two sets of triphasic sinusoidal signals simulating the V of a genset and its load.
It should be able to change phase of I wrt V. Peak value 3 to 5 V is enough. I feel that something with shif registers would be the way to go. If ready made, would be better.
Taking signals from r
Analog Circuit Design :: 08-25-2006 08:13 :: atferrari :: Replies: 1 :: Views: 766
I don't know if it can be done or not. My thought is
Pass the input signal to a F2V then V2I to generate the required current
Use current mirror which multiplication and pass thru ICO to generate final
sine wave. There, you can use the multiplication to act as multiplication or division
Analog Circuit Design :: 03-14-2007 11:07 :: firstname.lastname@example.org :: Replies: 4 :: Views: 870
Does DSB or SSB mixer generate LO frequency harmonics internally? Meaning if I feed sinusoidal LO, will there be mixing results of RF+2LO or RF-2LO
RF, Microwave, Antennas and Optics :: 04-29-2007 10:08 :: karote :: Replies: 3 :: Views: 986
I am trying to program closed loop SPWM controller for an inverter using dsPIC33.
I get the feedback ac current and want to compare it with a sinusoidal reference current. So can anyone tell me how to generate 60Hz sinusoidal reference current in my dsPIC33. I only have the peak value of the sinusiod. Any suggestions or sample code (...)
Microcontrollers :: 06-23-2007 15:43 :: abel51 :: Replies: 2 :: Views: 588
You should be able to implement a filter that has the proper performance--it might be a fairly large(lots of poles) filter, depending what your requirements are. If you know exactly what the 16KHz signal looks like, you could always just subtract the 180 degree-shifted version. You might also be able to do something with a Phase Locked Loop-lock
Analog Circuit Design :: 07-07-2009 12:34 :: barry :: Replies: 5 :: Views: 1155
Can anyone give me simple matlab code which generates a baseband signal?
Digital Signal Processing :: 08-26-2009 20:20 :: makis0987 :: Replies: 5 :: Views: 1894
In MATLAB, there are two types of "Sine Wave" generator (see figure below). One can be found in Simulink library, and another one can be found in Signal Processing Blockset (SPB).
When the "Output complexity parameter" of SPB "Sine Wave" block to Complex, it will generate complex sinusoidal signal.
What is the different between the sinewave g
Electronic Elementary Questions :: 12-11-2009 23:47 :: powersys :: Replies: 1 :: Views: 3484
I'm interested in your PWM generator.
I have to generate a PWM signal using a triangular wave and an audio signal, I assume it looks like what you were looking after. Were you able to make it? Could I perhaps take a look at it? If you still need help, I have some VHDL background, but this could make my life a bit easier!
PLD, SPLD, GAL, CPLD, FPGA Design :: 03-09-2011 09:43 :: scoot89 :: Replies: 1 :: Views: 1917
how to generate the sinewave pwm using compare mode in ccp for ccs compiler.. please help me :-D
Microcontrollers :: 09-27-2011 10:53 :: tmssenthil03 :: Replies: 2 :: Views: 1318
I try to generate a sinusoidal signal in matlab which is :
Amplitude = 10
Frequency = 100
sample rate = 5000
singal duration T = 1 sec
initial phase = 0
But does not come with me . Can any one help me with the code?
Digital Signal Processing :: 10-05-2012 09:58 :: tom12 :: Replies: 3 :: Views: 389
it's not so easy to use a switcher from 75V to generate 5V. Most switchers work from 24V or 35V.
I think you have 2 amother ways:
a) if you have a another source voltage with more wattage then use step up switcher.
b) use a good MOSFET and make a DC from your own PWM with MOSFET +R +C and step down to 24V or 35V - then use switcher (or 78x
Professional Hardware and Electronics Design :: 04-05-2002 15:58 :: hardworker :: Replies: 15 :: Views: 1708
Can anybody tell me how to generate EDIF files from Powerlogic?
Any help appreciated.
Microcontrollers :: 06-11-2002 10:54 :: Hollaender :: Replies: 0 :: Views: 1462
Following is a method to generate a -ve supply from a +ive. With some changes, it can generate a positive supply from a negative one. I think just reversing diode & cap polarity and putting -12v in place of GND and GND in place of +V will generate a +V for you.
You obviously need an oscillator source. But it can be either had from any (...)
Professional Hardware and Electronics Design :: 12-27-2002 00:11 :: techie :: Replies: 2 :: Views: 1029
I knew there was already some body generated the libpli.dll file.
But I just like to know the way to generate it, then I can generate
the .dll file by myslef for later release (or other PLI task(s)) :o
Thanks for reply anyway
I think that you still need visual c to compile it.
I did it before.
ASIC Design Methodologies and Tools (Digital) :: 01-01-2003 07:19 :: jiang :: Replies: 7 :: Views: 2590
I would like to generate video signals using scart connection on my tv via most common pic mcus'.For example i can use 16f877 if it is possible.I can't understand asm codes, i can use ccs c compiler.Can you show my way please?Thanks. :roll:
PC Programming and Interfacing :: 01-27-2003 12:49 :: Analyzer :: Replies: 12 :: Views: 2869
In any tutorial I find on AreaPdp they always specify an .IOC file, already generated.
How could I generate my own .IOC file?
ASIC Design Methodologies and Tools (Digital) :: 02-23-2003 01:52 :: niklar :: Replies: 0 :: Views: 795
In same case we usualy tes model in C or Systemview and generate files or in best case use real record of input signal. For functional testing you may scale sample ratio (decrease it) and test in generated files
ASIC Design Methodologies and Tools (Digital) :: 03-18-2003 01:24 :: steshenko :: Replies: 6 :: Views: 1532
I need to generate netlist from my project created in Design Capture.
I know it's possible to generate netlist in a lot of format but I don't know how.
Thanks in advance.
PCB Routing Schematic Layout software and Simulation :: 03-12-2003 15:13 :: BGA :: Replies: 0 :: Views: 976
Do you want generate Walsh Hadamard Sequence???
PC Programming and Interfacing :: 03-25-2003 12:42 :: diegolinder :: Replies: 1 :: Views: 1264
Is there any way to generate a flow chart from C source code?
PC Programming and Interfacing :: 03-27-2003 08:08 :: darksky041257 :: Replies: 8 :: Views: 3138
I need a spice netlist file for the layout LVS....
however, ADS2002 seems can't export that kind of format...
so could any one help me to generate a netlist file from my ADS schemetic design?!?!
Thanx in advance...
RF, Microwave, Antennas and Optics :: 04-02-2003 01:51 :: YiLi :: Replies: 0 :: Views: 1323
you can try to use the orcad from cadence. this tools is easy to learn and to use than Woffice. The only thing you need to do is read some special manuals about PSPICE templates in orcad manual, and then generate some parts which is suit for hspice. some parts for PSPICE you can use it directly like R,C,L,and so on.And with little modified you can
ASIC Design Methodologies and Tools (Digital) :: 04-09-2003 10:21 :: nmtr :: Replies: 17 :: Views: 3232
why does the tool generate some and *.pvl files in the current directory, when i run it to synthesis my design? And how to delete them or put them into one directory?
Linux Software :: 04-11-2003 07:58 :: brass :: Replies: 1 :: Views: 2055
In Cadence IC445, we can use 'abstract' to generate a LEF file from an analog block for mixed circuit P&R in SE. However, what tool can I use to generate TLF file from the analog block?
Thanks for your help!
Software Problems, Hints and Reviews :: 05-09-2003 11:39 :: luobo :: Replies: 1 :: Views: 2170
I tapped a clock from a chip (50) MHz ,found it to be almost a sinusoidal waveform
Can it be because of loading .
Correct me if i am wrong
ASIC Design Methodologies and Tools (Digital) :: 05-14-2003 03:59 :: harshad :: Replies: 2 :: Views: 1029
an mcu (even 20mhz 16f877) is not fast enought to generate color video, but enought to generate b&w video.
see attached examples for more explainations.
or the following links :
Microcontrollers :: 06-16-2003 07:03 :: Kripton2035 :: Replies: 11 :: Views: 3276
You can generate easily les than 100ps rise time pulses with SRD (Step Recovery Diode).
If you apply this pulse to a transmission line ended with short circuit, when the reflected pulse comes back it zeros (almost) out the pulse.
Such way you can get about 100ps or longer pulses.
When moving the short circuit farther from the source the pulse i
RF, Microwave, Antennas and Optics :: 10-20-2003 15:32 :: g579 :: Replies: 19 :: Views: 4869
Can anybody tell me how to generate WGL format for test machine ?
ASIC Design Methodologies and Tools (Digital) :: 07-08-2003 22:12 :: netghost :: Replies: 2 :: Views: 2472
Delays are not synthesisable. It wont work on the device.
You will have to develop a synchronous circuit to generate those delays.
PLD, SPLD, GAL, CPLD, FPGA Design :: 09-10-2003 23:02 :: it_boy :: Replies: 4 :: Views: 1037
Can some one guide me about how to generate psuedo random codes in matlab. Any documents in this regard would be welcome.
RF, Microwave, Antennas and Optics :: 10-07-2003 06:10 :: Sparkistine :: Replies: 9 :: Views: 3593
there are rippers in ca*dence compo*ser schematic,and as i generate netlist by verilog-xl from the schematic.the bus with ripper can't connect correctly,how can i do with the rippers.
ASIC Design Methodologies and Tools (Digital) :: 10-22-2003 02:30 :: xiongdh :: Replies: 0 :: Views: 947
how can generate video signals with 2051 and 89c51
Microcontrollers :: 11-06-2003 19:16 :: tanveerriaz :: Replies: 2 :: Views: 884
According to the image,
I want to generate the crc_scope according to the soc,eop and val.
As we know,we normally get the falling edge by delaying signals two cycles and then to get the last two-byte pulse scope signal,just as shown in the image below. but how to get the signal for the image above(crc_scope in red)??
PLD, SPLD, GAL, CPLD, FPGA Design :: 11-12-2003 02:58 :: arena_yang :: Replies: 2 :: Views: 899
Who can give me some info about using m-sequence to generate the test paterns fed to test chain in ASIC DFT, and how to get the results :P .
ASIC Design Methodologies and Tools (Digital) :: 11-16-2003 06:37 :: qpskguy :: Replies: 0 :: Views: 936
I am working on MaxPlusII. I wrote a verilog module, counter.v. it passed everything. how could I generate a symbol? so I could use this counter as a component in the graphic edit. I know there is a symbol eidt, but it has to draw the component from scratch. I think there must be another way.
PLD, SPLD, GAL, CPLD, FPGA Design :: 11-27-2003 15:04 :: wwwrabbit :: Replies: 2 :: Views: 1298
how to generate pspice files from windows softwares?
is there any softwares can do the circuit capture, then export the netlist as pspice?
PCB Routing Schematic Layout software and Simulation :: 11-30-2003 02:23 :: beabroad :: Replies: 2 :: Views: 1149