Harmonic Distortion Simulation |
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harmonic distortion , third harmonic distortion , total harmonic distortion , cadence harmonic distortion
harmonic distortion , third harmonic distortion , total harmonic distortion , cadence harmonic distortion
100 Threads found on edaboard.com: Harmonic Distortion Simulation
in my opinion,
if u only are only careing about the switch's linearity, u can build a ideal switch and then compare the result of S/H with ideal swtich to the S/H with real switch.
i think u will do FFT for the output of S/H to see any harmonic through the S/H network.
Analog IC Design and Layout :: 09.08.2005 12:45 :: Btrend :: Replies: 5 :: Views: 1203
The gain of CMFB also will influence 2nd harmonic.
Analog Circuit Design :: 30.01.2007 09:30 :: Btrend :: Replies: 6 :: Views: 1058
can someone tell how to do simulation in SPICE to calculate harmonic distortions in an opamp.
Analog Circuit Design :: 07.07.2006 13:45 :: engrvip :: Replies: 3 :: Views: 3502
I just do the simulation with a MOSFET, and the vds=0. Add a Sinusoidal Source to the drain of the MOSFET and do the harmonic distortion. Please see the attachment to get the details.
Thanks a lot!
Analog Circuit Design :: 12.10.2006 10:19 :: Alucard07 :: Replies: 3 :: Views: 934
1.6M over 5K =320. 320 is integer. So harmonic large even you use window function. U can select 5.01K input, and try it again.
Analog Circuit Design :: 22.05.2007 14:59 :: jerryzhao :: Replies: 22 :: Views: 1513
Dear All, thank you for reading this topic. I just design an OTA and I will conect it to a capacitor to build a lowpass filter. Then I will put a 100mV sine signal at the input and want to see the harmonic distortion at the output. Does anyone show me the procedure that how can I get the result? A sample is put in the attchment and that is what exa
Analog IC Design and Layout :: 30.11.2008 23:29 :: bhl3302 :: Replies: 9 :: Views: 1354
hi
presently i am worlking with Mentor graphic ELDO Spice for analog circuit simulation.for measuring specification of my amplifier i have to measure harmonic distortion(HD). i dn't know how to measure HD of a wave form by using EZ wave calculator of the mentor graphics .please guide me.
Rgds
Raju
Software Requests :: 23.02.2010 05:48 :: ashok_49 :: Replies: 0 :: Views: 235
Hi everybody, I'm having a little troubling simulating the harmonic distortion for a MOSFET differential amplifier with ADS. I am trying to calculate HD2, HD3, and the point at which the apparent gain drops by 1dB all for a 50mV signal at 100 MHz. I set up the circuit and added the harmonic Balance simulation block and set (...)
Software Problems, Hints and Reviews :: 14.10.2010 07:29 :: gotenks326 :: Replies: 1 :: Views: 714
hello friends
So far I was enquirer how to simulate or calculate the SNR.
Now I would like to ask you how to simulate the THDN (total harmonic distortion plus noise) of the operational amplifier.
Thank you and I appreciate very much your answers
Analog IC Design and Layout :: 29.10.2012 16:06 :: Junus2012 :: Replies: 3 :: Views: 196
Definition of THD
-----------------
Total harmonic distortion (THD) is the ratio of the harmonic power to the power at the measured peek. In the following equation, v1 is the RMS value at the peek frequency and v2, v3, ?, vn are RMS values at the harmonics.
THD = sqrt (v2^2 + v3^2 + ? + vn^2) / v1
Definition of THD (...)
Professional Hardware and Electronics Design :: 29.05.2003 15:59 :: VSWR :: Replies: 4 :: Views: 1500
Hi all!
I've been designing a multi-bit sigma-delta modulator and now I am
testing its performance with Element Selection Logic (modified Data
Weighted Averaging (DWA) in my case). The circuits in the DWA are
digital - log shifter, counter, regs etc. Right now I have added just
the 16-bit log shifter to the schematics (the only part of DWA t
Analog Circuit Design :: 09.04.2004 20:26 :: borodenkov :: Replies: 1 :: Views: 1470
Hi everybody:
I want to simulate the THD(harmonic distortion) and equivalent input noise of a opa, but how can I do it? thank you for your help.
Analog Circuit Design :: 22.04.2004 05:03 :: lunren :: Replies: 5 :: Views: 864
Hi all,
I'm starting a transconductor design using 0.13u CMOS, and I'd like to estimate the distortion, so I started to simulated the transistors. I apply a constant Vds, of 0.05V and I vary the Vgs to plot Ids, the gm, gm' and gm''.
I assumed I~gm*Vgs+1/6*gm''Vgs^3, and tried to check with distortion simulation. I used the QPSS analisys (...)
Analog IC Design and Layout :: 21.01.2005 15:18 :: skal81 :: Replies: 0 :: Views: 515
Hi ya!
To simulation for slew rate, you will need to configure your opamp as noninverting unity gain buffer (closed-loop). Your input stimulus should a pulse waveform connected to the +input pin. Then run transient analyis and observe the output waveform vs input waveform. Your slew rate should be 10% from the rising edge to the 10% before it se
Analog IC Design and Layout :: 17.03.2005 07:40 :: snoop835 :: Replies: 5 :: Views: 4098
Hi,
I'm designing an op amp and want to calculate the HD3. The input signal is 1KHz. I found that there's a "dft" function in the calculator. But how to set the variables in it? ("from", "to" means what?) And how to get the HD3 from the dft result?
btw: how long should I run the transient simulation to calculate the HD3?
Thank you for your
Analog Circuit Design :: 07.12.2005 07:35 :: princerock :: Replies: 2 :: Views: 1526
hello all,
i have designed a 10 bit ADC and i would like to simulate the major ADC characteristics.....but my knowledge in simulation of ADC characteristics is quite limited.......the characteristics i want to measure are the following:
1-DNL
2-INL
3-input offset voltage
4-Total harmonic distortion
5-Spurious Free Dynamic Range (...)
Analog IC Design and Layout :: 23.05.2006 13:13 :: nijMcnij :: Replies: 0 :: Views: 779
HB is a frequency domain analysis , it work in the harmonics and solve the circuit response in frequency domain , so it is very good in nonlinear analysis like P1db , IIP3 , IM , and so on
PSS is a time domain , so it is better in oscillators , and consume more time
khouly
RF, Microwave, Antennas and Optics :: 24.10.2006 13:23 :: khouly :: Replies: 6 :: Views: 739
i am not sure but i think when they say HD they mean the harmonic(mul;tiples of fundemental) distortions and when they say IMD they mean non-tones distortion (non-harmonic distortion)
Analog IC Design and Layout :: 24.01.2007 17:44 :: safwatonline :: Replies: 5 :: Views: 948
Hi, guys,
How to simulate the total harmonic distortion (THD) in Cadence Spectre simulator?
Many thanks,
Ruri
RF, Microwave, Antennas and Optics :: 20.09.2007 07:28 :: Ruritania :: Replies: 3 :: Views: 4009
Thx Alex_IC, after reading the notes above, I was still wondering..why pss can not continue but tran analysis can while no error is prompted?
Is there any way else we can get the THD without running the PSS analysis? I have already tried the function "thd" in calculator, but the result seems not to be convincible.
Anybody have some experience o
Analog IC Design and Layout :: 29.12.2007 10:49 :: liao0009 :: Replies: 3 :: Views: 3196
I am not yet exposed to ic6.x.
What is done 5.x is: do an DFT of the output waveform which will give you the frequency spectrum of the output waveform. From the frequency spectrum you will be able to find the amplitudes of fundamental, harmonics and other noise components. There from you can calculate whatever you need.
sankudey
Analog Circuit Design :: 11.06.2008 10:54 :: sankudey :: Replies: 16 :: Views: 5007
Hi,everyone!
I have a quesition about Cadence:
I do not kown the difference between the component parameter sweep and model parameter sweep and how to use Cadence to test total harmonic distortion(THD)?
thank you very much!
Analog IC Design and Layout :: 26.08.2008 15:39 :: h1_x2_r3 :: Replies: 5 :: Views: 697
I'm trying to simulate a Class D amplifier with hysteretic self-oscillating modulator but the PSS simulation is not acepting the configuration.
Basically the self-oscillating system frequency (fs around 500 KHz) will be modulated by an audio signal (fin around 1 KHz) and fs will be varying from 450KHz to 550KHz but in a non-linear fashion since
Analog Circuit Design :: 17.06.2011 16:19 :: adriancm5 :: Replies: 1 :: Views: 283
No, you do not any easy alternate. You need to have model for that. Can you share the circuit you want to simulate, may be seeing that people comment on possible sources to introduce harmonic distortion in simulation.
PCB Routing Schematic Layout software and Simulation :: 20.12.2012 15:51 :: atripathi :: Replies: 1 :: Views: 170
hi, i know this topic well. i am making an inverter for 120V AC (rms). you must choose a topology first. i would suggest a Full H-Bridge because of its current carrying capability.
then you must create PWM switching for the elements. the switching elements should be MOSFETS at power levels of 500W or less. BJTs are for less than 1A projects
Professional Hardware and Electronics Design :: 19.01.2003 18:54 :: Mr.Cool :: Replies: 39 :: Views: 27769
harmonics are mainly contributed by the nonlinearity of the transistor constructing the Op-Amp, by reviewing the drain current equation of the transistor it could be observed that the relation of the input -output are in a manner of quadratic hence contributing to weighted frequency component also known as harmonic component.
Analog IC Design and Layout :: 09.03.2004 09:19 :: hrkhari :: Replies: 33 :: Views: 3546
I use both tools, as standalone and with RFDE.
ADS is frequency basad simulator with a lot of stuffs to simulate complex signals
SpectreRF is the RF IC design standard and is a time based simulator.
In my opinion the two tools are complementary in some sense (and that's why Agilent and Cadence are working together into the RFDE integration).
RF, Microwave, Antennas and Optics :: 26.05.2004 13:16 :: Mazz :: Replies: 24 :: Views: 2935
In Cadence try the lower amplitude and the lower frequency in the time domain and examine the output waveform for clipping and slew rate limiting. A harmonic distortion test should show up any distortions that you cannot see by eye.
Analog Circuit Design :: 03.11.2004 02:55 :: flatulent :: Replies: 8 :: Views: 1443
I would recommend to print data to file and use Matlab - for me it's simplier..
About unequal freq beans - they can be slightly unqual due to nonidealities. Also I think that 1024 points may be not good enough for a proper freq resolution, especially if you look at freq near DC and the harmonic distortion of your ADC
Analog IC Design and Layout :: 22.11.2004 06:01 :: borodenkov :: Replies: 10 :: Views: 2797
I am not shure your gimmics are OK. Pentode first grid current is about +800?A because of positive Ug1-c voltage of about 1.5V. This is may be possible because of very low Ug2-c voltage. Output voltage and frequency characteristics are OK but harmonic distortion is about 2%.
Analog Circuit Design :: 27.01.2005 17:36 :: Borber :: Replies: 9 :: Views: 744
harmonic is not a key feature in sigma-delta modulator,because it will be shrinked by negtive feedback of integrator. A/1+AF.
and you can also find out the harmonic distortion of op amplifier by Spectre pac analysis.(when there is a discrete time cmfb).
Analog Circuit Design :: 06.07.2005 14:57 :: extraord :: Replies: 5 :: Views: 922
GDF
Do you have any suggestion for simulation to check the circuit does
get rid of charge injection?
Yes. To simulate charge injection in a modified SC (where a transmission gate is used), you need two sources (1) an analogous voltage source at the Drain of NMOS and Source of PMOS (2) a clock source to Gate of NMOS
Analog IC Design and Layout :: 18.08.2005 06:20 :: SkyHigh :: Replies: 14 :: Views: 1603
thank your for your tips. I have noticed the spectrum leakage phenomenon, but so little help occured.
another phenomenon in FFT analysis (Hspice): for a high gain amplifier (about 60dB), the input signal amplitude is very small. when doing fft analysis, the results indicate that the harmonic distortion will be improved with the increasing input
Analog IC Design and Layout :: 10.12.2005 10:10 :: flamingo :: Replies: 4 :: Views: 718
My question is how to extract the nonlinearity of a Gm-C integrator, i.e. THD (total harmonic distortion). SNR (Signal-to-Noise Ratio) and SDR (Signal-to-distortion ratio)?
As my knowledge, these perforamnces are from the FFT of a signal. Does it need a tranisent simulation???
In some literatures, the performances (...)
Electronic Elementary Questions :: 03.03.2006 11:21 :: zoujunjx :: Replies: 0 :: Views: 594
My question is how to extract the nonlinearity of a Gm-C integrator, i.e. THD (total harmonic distortion). SNR (Signal-to-Noise Ratio) and SDR (Signal-to-distortion ratio)?
As my knowledge, these perforamnces are from the FFT of a signal. Does it need a tranisent simulation???
In some literatures, the performances 1dB (...)
Analog Circuit Design :: 03.03.2006 14:57 :: zoujunjx :: Replies: 0 :: Views: 432
hello all,
i have designed a 10 bit ADC and i would like to simulate the major ADC characteristics.....but my knowledge in simulation of ADC characteristics is quite limited.......the characteristics i want to measure are the following:
1-DNL
2-INL
3-input offset voltage
4-Total harmonic distortion
5-Spurious Free Dynamic Range (...)
Analog Circuit Design :: 23.05.2006 13:12 :: nijMcnij :: Replies: 2 :: Views: 936
Could you tell me the DAC's power supply and output swing?
The simulation result is right? Why the 5nH inductor's SFDR is better than others.
I think if you use the cascode, the PSRR will not very bad. And the noise is not main cause for bad SFDR( if noise very large is the main cause).
I think when you output swing change, the Vds of current M
Analog Circuit Design :: 20.07.2006 09:12 :: jerryzhao :: Replies: 28 :: Views: 1750
my design requirement is SFDR>80dB.I had read some paper about it,most of them consider Vsb not equal 0 is the frist reason to design implement not support triple-well technology,so choose pmos transistor is the only choice to me.Using pmos means more bigger W/L than the counterpart in order to achieve same Ron.
Firstly, large W/
Analog Circuit Design :: 23.07.2006 10:48 :: xaviar :: Replies: 0 :: Views: 482
I am designing a 10bit pipeline ADC. The schematic simulation shows that the odd harmonics are too large(especially,the third harmonic is 55dB).
Can anybody give me some suggestion on how to find the reason?
Thanks.
sampling swith
opamp (settling time)
reference (settling time)
Analog Circuit Design :: 20.09.2006 10:27 :: wdd :: Replies: 8 :: Views: 1020
The harmonic may stem from the INL of the ADC. usually, INL manifest itself as harmonic distortion in the ADC (it's frequency depends on the INL graph).
Analog Circuit Design :: 26.12.2006 16:41 :: Jim cage :: Replies: 4 :: Views: 567
The project aims at the design of a fully-differential OTA to be used as a unity-gain buffer
in switched-capacitor filter applications. The expected load is 1 pF on each side as
shown below. The amplifier is required to accommodate a maximum swing of 3 V differential-
peak-to-peak running at 40 MHz and applied to the input of the amplifier. OTA?
Analog Circuit Design :: 01.02.2007 21:38 :: makanaky :: Replies: 11 :: Views: 1139
i think two tone transcient simulation of the complete receiver is acceptable, donnot think about the harmonic balance simulation to simulate a system more than two blocks.
some one really did simulate the noise performance by transcient, for example: Dennis Gee-Wai Yee of UCB in his PhD thesis (spring 2001) said he simulate the complete (...)
RF, Microwave, Antennas and Optics :: 08.02.2007 03:51 :: neo :: Replies: 11 :: Views: 1288
2nd harmonic comes from signal-dependent noise
thes signal-dependent noise may generated from
1. setting problem in SC
2. Vrefp/Vrefn was affect by signal (this will influence the feedback DAC)
Especially the first stage.
3. Parasitic cap. form a different path in different signal amplitude, and the different path will make ur SC gener
Analog Circuit Design :: 13.04.2007 09:43 :: Btrend :: Replies: 6 :: Views: 798
Try to optimize your final stage bias line design to reduce the harmonica.
RF, Microwave, Antennas and Optics :: 06.05.2007 14:10 :: pewang :: Replies: 14 :: Views: 1599
I could give you a complete thesis with working design, but then you would not learn "how to learn." which is the whole point of your university education.
Don't even need a PIC with Bubba Sine OScillator, comparator PWM, H bridge pre-drivers and H=bridge MOSFETs or IGBTs , filters, protection etc. But you can add a PIC, if you want.
Professional Hardware and Electronics Design :: 27.04.2012 23:49 :: SunnySkyguy :: Replies: 921 :: Views: 233043
i think u need also to enter the SOI like the TOI , so SOI will make the even harmonics generated
khouly
can u upload the project
khouly
RF, Microwave, Antennas and Optics :: 25.06.2007 14:52 :: khouly :: Replies: 6 :: Views: 680
I am designing an opamp used in 20bit codec. But I do not know to set the parameters correctly to get the right THD (Total harmonic distortion). The spec requres the THD<-90dB. But the THD function applied to the output of spectre can only get about -47dB even the waveform is the idel sinusoid generated by the sine source.
Can anyone give such a s
Software Problems, Hints and Reviews :: 26.10.2007 09:53 :: tsinghua :: Replies: 0 :: Views: 601
golden gate is a harmonic balanced simulation engine , from agilent , it is for RFIC design
khouly
RF, Microwave, Antennas and Optics :: 14.02.2008 13:24 :: khouly :: Replies: 10 :: Views: 986
dear trapoe and FvM,
i learned a lot of new useful things here...
again thx for your attention and patient...
i made a short circuit in the input and then simulated,in R11=270 MOS drains current comes to 109mA(is that the same as what i should do to achieve the desired current?),the picture below is showing the point:
[url=images.elekt
Analog Circuit Design :: 15.06.2008 22:05 :: beheshtaein :: Replies: 12 :: Views: 2998
I'm still confused about the THD simulation result, I pasted the simulation figure, the left one is sinewave, and right one is the DFT simulation (only sampled the last period as LvW suggested) with rectangula window,
from t
Analog Circuit Design :: 18.06.2008 21:29 :: jingxuelu :: Replies: 1 :: Views: 1155
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