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help for mosfet models ...
hi every one my project is to design mosfet transistor with 1um channel length at first i started to understand mosfet device and its behavior and its characteristics then i found out that i have to choose a suitable model which can predict my design...
Analog IC Design & Layout :: 15 Nov 2009 12:43 :: shams mr :: Replies: 6 :: Views: 234
what determine the supply voltage of a cmos ic chip?
hi, friends, i was asked to help design a small mixed-mode cmos ic chip. the supply voltage of target chip is about 1.8v to 5v. i know nothing about the cmos process,only design some digital logic before. what affect the input voltage range ? the ...
Analog IC Design & Layout :: 09 Nov 2009 13:01 :: erikl :: Replies: 11 :: Views: 285
need suggestions during interview for the ic layout position
hi,can anyone suggest tips for an interview for ic layout opening.rgds...
Analog IC Design & Layout :: 24 Sep 2009 8:00 :: prashantbabu :: Replies: 2 :: Views: 210
looking for junior asic/vlsi engineer
hi all,we are looking for junior asic/vlsi engineer. it is a permanent opportunity for a r&d center of a us company in singapore.responsibilities:• design and verification of blocks requirements:• bsee + 1 year experience • proven e...
EDA Jobs, Promotions, Advertising :: 10 Aug 2009 20:37 :: pfal :: Replies: 7 :: Views: 1293
why do we need to follow the design rules during ic fab?
1)why we need design rules?? 2)why design rules so important?? 3)what will happen during ic fabrication if design rules for some blocks are violated...
ASIC Design Methodologies & Tools (Digital) :: 08 Aug 2009 23:52 :: mehrdadfeller :: Replies: 1 :: Views: 186
is it easy to make a fabless company !!
oftware and expert engineers is it easy or it is so diff. , i guess the most diff one , is the marketing how to take a share in such huge world i need to hear all of your ideas & tips about such topicthanks all...
Analog IC Design & Layout :: 19 Jul 2009 18:23 :: RFDE :: Replies: 31 :: Views: 3874
will the fab manufacture a chip,if there is a drc violation
will the fab manufacture a chip,if there is a drc violation?...
Analog IC Design & Layout :: 08 Jul 2009 10:22 :: deepak242003 :: Replies: 6 :: Views: 371
i am getting error in ic flow layout drc checking...........
there are no drc rule checks in rule fileany one can solve this problem...................
Analog IC Design & Layout :: 30 Jun 2009 11:53 :: Goldeneagle :: Replies: 3 :: Views: 155
help to study im malaysia
hi friends :i finish study communication eng this year , and i hopt to complete specialization in malaysia.so any one have infromation about good university there please inform me best regardsmatelda...
EDA Jobs, Promotions, Advertising :: 29 Apr 2009 19:39 :: wala' :: Replies: 37 :: Views: 20019
hai frnds.plz tell me cmos fabrication steps.i read some boo
hai frnds.plz tell me cmos fabrication steps.i read some books.but i understand littel bit.any one have good material plz send to me vamsi_addagada@yahoo.co.inthanksvamsi...
ASIC Design Methodologies & Tools (Digital) :: 27 Feb 2009 13:44 :: sreevyas :: Replies: 3 :: Views: 198
book about layout design
hi ! i need a book about the design of layout. could you suggest some titles ? thanks...
Analog IC Design & Layout :: 04 Feb 2009 20:35 :: rajeshkr1979 :: Replies: 55 :: Views: 7449
why ic are black?
why ic are black?...
Professional Hardware and Electronics Design :: 27 Sep 2008 18:03 :: dharesu :: Replies: 15 :: Views: 708
why ic are black?
why ics are black in color, why not white?since black is absorbent of heat and hence ic may get heated quickly.if ic are white in color this problem may be reduced considerably.if the reason is behind fabrication technology, then i want to know exact...
ASIC Design Methodologies & Tools (Digital) :: 24 Sep 2008 20:15 :: Enlightenment :: Replies: 27 :: Views: 1260
asic fpga vlsi in dubai /uae
hi guys,whts scene of possible opportunities for asic design engineer in uae/dubai?heard lots of efforts put forth by govt to encourage ic tech parks for startups and new firms in dubai silicon oasis?is this all true?thanks,mad_dogs_ic_maker...
EDA Jobs, Promotions, Advertising :: 11 Aug 2008 6:50 :: sugvivek :: Replies: 58 :: Views: 12115
can give a list about simulation tools
can give a list about simulation tools about digital design, analog design. mix-signal design .etc...
Electromagnetic Design and Simulation :: 07 Aug 2008 19:03 :: elec-eng :: Replies: 7 :: Views: 3003
international mems forum centre
international mems forum centrewww.memspub.comthis is a new forum of mems, please come here and share your ideas and experience here.micro-electro-mechanical systems (mems) is the integration of mechanical elements, sensors, actuators, and electronic...
RF, Microwave, Antennas and Optics :: 07 Jul 2008 7:13 :: memsgg :: Replies: 0 :: Views: 174
any ic fabrication books or software suggestion.
plz give me some suggestion....
Analog IC Design & Layout :: 23 Jun 2008 11:07 :: SP24 :: Replies: 1 :: Views: 90
how to start ic design
hai friends im new to ic design . right now im working as a design engineer in a mnc. i like to learn ic design and want to switch my career to that field . some one plz help me:d...
Analog IC Design & Layout :: 21 Jun 2008 20:38 :: faiflay :: Replies: 26 :: Views: 1669
beginner - layout techniques
im a beginner in drawing layout, any suggestion on how to gain my knowledge on layout?? website or book that you can suggest??is there any layout techniques rather than multi-finger and common centroid??pls let me know.......
Analog IC Design & Layout :: 21 Jun 2008 20:26 :: faiflay :: Replies: 89 :: Views: 17064
openings in mentorgraphicsegypt--p&r consulting team
hi all,theres an open position to join the consulting team of mentor graphics (egypt) for those who are interested, please send your updated resumes (with a recent personal photograph) to me at: ahmad.abdulghany@gmail.com and please set the e-mail su...
EDA Jobs, Promotions, Advertising :: 27 May 2008 17:38 :: Iouri :: Replies: 1 :: Views: 351
which rf simulator is better ! ! !
hi everyone,i would like your opinion on which rf simulator is better from the 3 below:@ds 2003@wr mwo2003cst microw@ve studio 5i would also like to know why which one is better and lastly which one is good for professional /beginer level.aircraft ma...
Software Problems, Hints and Reviews :: 09 May 2008 4:01 :: paracyt :: Replies: 88 :: Views: 16671
drc
hi ...is there any standard thats being followed for drc setting?thanks...
PCB Routing & Schematic Layout software & Simulation :: 10 Apr 2008 10:22 :: Manjunatha_hv :: Replies: 5 :: Views: 165
wat is the lacthup problem?
wat is the latch up problem?...
ASIC Design Methodologies & Tools (Digital) :: 01 Apr 2008 5:52 :: gurpreet.singh :: Replies: 5 :: Views: 243
what is monte carlo analysis
hi all,can some one tell what is montecarlo analysis? why is monte carlo simulation done.? any materials regarding the same would be very grateful.thanx in advancechethan...
Analog Circuit Design :: 24 Mar 2008 15:15 :: treitmey :: Replies: 5 :: Views: 347
ic610
hi! guysis there any body succesful install ncsu kit 1.5.1 on ic610?thanks...
Linux Software :: 23 Feb 2008 6:16 :: QuanBao :: Replies: 22 :: Views: 3322
cmos layout questions
1) according to clein, what has been one of the main reasons why cadtools have failed to be successful among ic layout engineers?2) with respect to cad tools, what are some of the advantanges anddisadvantages to being a small ic design house?3) what ...
Analog IC Design & Layout :: 30 Jan 2008 11:37 :: ninge :: Replies: 36 :: Views: 7422
job openings for mems design engineers at sws
ob openings for mems design engineers at si-ware systems (sws)job ref code: mem-108about si-ware systemssi-ware systems (sws) is an independent egyptian fabless company providing a wide spectrum of asic design and development solutions from initial c...
EDA Jobs, Promotions, Advertising :: 27 Jan 2008 8:05 :: mosmed :: Replies: 0 :: Views: 759
about product engineer position
hiany one has idea about the role of product engineer position. and what kind of interview questions can i expect . please help me....
Analog IC Design & Layout :: 18 Jan 2008 17:49 :: vlsiguy9 :: Replies: 2 :: Views: 182
problem with altium designer
the tool is very slow and get near to 1g ram, for a design that contain only 2 x 1148pin fpga and 16 x pqfp100 with few other cap and res.:cry:is it true to say that tool is not suitable for component count more than 512?if so, what other tool do you...
PCB Routing & Schematic Layout software & Simulation :: 30 Dec 2007 0:58 :: House_Cat :: Replies: 133 :: Views: 7233
need quick guide, tutorial, or book about photodiodes design
hii need to know what should i know about photodiodes (from book, white paper, ...) so that to be able to work in a pdk development project involving fabrication of photodiodes.these photodiodes will be used in motion control ic and will be physicall...
RF, Microwave, Antennas and Optics :: 08 Nov 2007 10:40 :: ahmad_abdulghany :: Replies: 0 :: Views: 87
do i suit to be an analog ic designer?
dear all: i have been a process integrated engineer(pie) for one year, before that i had been a process engineer(pe) for two years. i have learned some analog ic design books, such as microelectronics circuits, semiconductor devices, the art of...
Analog IC Design & Layout :: 06 Nov 2007 17:26 :: HAJER LAHIANI :: Replies: 24 :: Views: 1176
fpga, cpld in egypt ?!
does anyone know where to buy either fpga , cpld or any sort of programmable logic that can run with clock frequencies 100 mhz or more from egypt ?it would be best if someone already bought one of these components so he can tell me the price also , b...
PLD, SPLD, GAL, CPLD, FPGA Design :: 05 Nov 2007 8:21 :: salma ali bakr :: Replies: 78 :: Views: 4395
corner analysis & process variation?
is process corner show process variation in the process? for example, if we do corner analysis in tsmc 0.18µ process, can we conclude that process variation will occur only in the range of corner analysis? im a bit confuse a bout this two term. can s...
Analog IC Design & Layout :: 03 Sep 2007 5:19 :: lijianheng :: Replies: 24 :: Views: 1491
development & design eng. position available in m'sia
dear all,our cleint, key asic is a leading fabless ic design company that designs and manufactures ic for electronics or system companies based in us, california. the companys primary technology offering is the keysoc(tm) platform for asic/soc design...
EDA Jobs, Promotions, Advertising :: 24 Aug 2007 9:50 :: kcutnnuy :: Replies: 0 :: Views: 786
do you want to find friend working together in china?
is there any possible business in rf electronic field we can do?...
Business Special Interest Group :: 16 Aug 2007 8:54 :: tangyee Seo :: Replies: 44 :: Views: 6902
resistor,capacitor,inductor fabrication
how do we fabricate a resistor,inductor n capacitor in an ic?...
Analog IC Design & Layout :: 14 Aug 2007 10:01 :: ameed :: Replies: 8 :: Views: 510
transistor model
the transistor model, e.g. bsim level 3, level 1, etc. so, i have some questions regarding this.1. how many models do we have?2. what are the differences between them?3. when should we use for a particular model?thanks....
Analog IC Design & Layout :: 08 Aug 2007 5:10 :: leohart :: Replies: 25 :: Views: 2022
vlsi design technology
can you please tell me which are the different problems that vlsi design technology is facing and what are the proposed remedies for these problems?can you suggest a few links or e books also if possible.thanks in advance! :d...
ASIC Design Methodologies & Tools (Digital) :: 31 Jul 2007 6:19 :: vlsichipdesigner :: Replies: 7 :: Views: 468
analog ic design... questions about fabrication
hello,there are a lot of analog ic design books, and also analog ic design software..but lets say one creates the schematic of analog ic, how can he fabricate it? of cuz not at home... does he have to send schematics to fabrication company and then t...
Analog IC Design & Layout :: 26 Jul 2007 6:03 :: smilodon :: Replies: 6 :: Views: 255
high voltage fabrication process
i am looking for the the high voltage fabrication process more than +100v and -100v because i want to do high voltage pulse generator ic design.in mosis, cxz 0.80 hv cmos(austriamicrosystems) has 50 volt only.i2t100 amis 0.7 has just nominal voltages...
Analog IC Design & Layout :: 24 Jul 2007 7:39 :: chenjia :: Replies: 1 :: Views: 132
why it is preffered to have maximum no. of vias?
hi all,can any one tell me why in a layout it is always preffered to have maximum no. of vias though we know each via has some resistance associated with it and after a particular no. it is of no use to put more vias.then why we put maximum everytime...
Analog IC Design & Layout :: 04 Jul 2007 11:18 :: stuck_adc :: Replies: 9 :: Views: 432
need help to learn ic testing
i m a new test engineer. i m going to perform design verification on a 1.25gbps optical transmitter for starters.my questions are:1) what area do i start reading on? 2) is there any book to guide me. i have seen many books regarding design of analogu...
Analog IC Design & Layout :: 02 Apr 2007 8:32 :: nathan80 :: Replies: 5 :: Views: 327
phd topic suggestion!!!
hi all! if one finished university as rf engineer and want to continue to phd in the trend telecommunication, then which topics (for phd dissertation) would you suggest? its better to continue with rf design, but this university isnt strong in thi...
RF, Microwave, Antennas and Optics :: 31 Mar 2007 12:41 :: binhjuventus :: Replies: 8 :: Views: 384
interveiw question
what are interveiw question based on cmos ic layout ?...
Analog Circuit Design :: 08 Mar 2007 12:05 :: varun :: Replies: 6 :: Views: 252
antenna diodes explanation
could you please explain to me why you need antenna didoes:1. why would there be a charge build up during manufacturing that can occur at the gates of these nmos and pmos2. what polarity is this charge?3. what kind of diodes (i.e. n diodes or p diode...
Analog IC Design & Layout :: 26 Jan 2007 6:43 :: mdcui :: Replies: 8 :: Views: 1905
infineon
hello every one, i am a fresh vlsi graduate and am called for an interview with infineon italy. the general procedure has 3 rounds 1) general test 2) tech test 3) interviewif any one has already appeared for this interview, please let me know with ...
EDA Jobs, Promotions, Advertising :: 16 Jan 2007 12:03 :: research235 :: Replies: 16 :: Views: 1224
why aluminium is used instead of copper in ic fabrication
can anybody tell me why aluminimium is used until now in ic fabrication for metal layers insted of copper in spite copper has low resistance and now they have move back toward to copper...
ASIC Design Methodologies & Tools (Digital) :: 23 Dec 2006 1:12 :: yaswanthr :: Replies: 4 :: Views: 234
anntena rule ?
what is anntena rule ? in cmos ic designe....
Analog IC Design & Layout :: 14 Dec 2006 16:06 :: gafsos :: Replies: 5 :: Views: 276
what is nano meter technology
i need comment for nano meter technology...what it is ???why it is ???and issues related to this as per my idea because complexity of chip is increasing and transister size is reducing so now a days width of the transiter or channel lenght goes into ...
Analog IC Design & Layout :: 05 Dec 2006 15:36 :: soundar :: Replies: 2 :: Views: 117
2 question for lna cadence design
1. between the input port and 1st transistor or output and input of 2nd stage, we usually put the coupling capacitor with series connection. but for my cadence simulation, there is no output coming out from the spectre graph or operating in region 0 ...
Analog Circuit Design :: 10 Nov 2006 8:24 :: whitewiz :: Replies: 2 :: Views: 183
[req] ic fabrication movie
hii need an ic fabrication movie.if you have please help me.thanksregards...
Analog IC Design & Layout :: 11 Oct 2006 7:47 :: glchun :: Replies: 11 :: Views: 954
i need sillicon ic fabrication steps videos if any, thanks..
i saw ,about one year ago, two videos (i think made by intel®) describing the si ic fabrication process steps, and one of them called: sillicon run ii . i wonder if i can download them and/or similar videos online,thanks for help,ahmad,...
Analog IC Design & Layout :: 09 Oct 2006 6:14 :: sengyee88 :: Replies: 4 :: Views: 408
q) how to go from ic layout to physical?
hope some of can help.what comes after an ic layout, i dont quite get the picture....for example if i ought to design a nor gate, after i layed with cadence or mentor, what are the other steps to get the physical product? will different layout yeld...
ASIC Design Methodologies & Tools (Digital) :: 25 Sep 2006 10:40 :: mpkp123 :: Replies: 5 :: Views: 459
the major difference between asic design and fpga design!
hi, could anybody list the major difference between asic design and fpga design?thanks a lot!thomson...
ASIC Design Methodologies & Tools (Digital) :: 31 Aug 2006 5:43 :: vcnvcc :: Replies: 7 :: Views: 351
mosfet switching
hello friends,can anyone help me to get the theory of mosfet charachteristics & operating principle on the net.one more doubt what is hard & soft switching in the mosfet. this i think is used for smps. please provide some solution(s) with details.tha...
Electronic Elementary Questions :: 02 Aug 2006 17:22 :: bauer :: Replies: 2 :: Views: 1515
how ic is constructed ?
how integrated circuit is constructed ?thanks :)...
Electronic Elementary Questions :: 02 Aug 2006 6:18 :: salma ali bakr :: Replies: 8 :: Views: 312
ADS
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comparison of cmos and bjt
anyone who has the paper or article about the comparison of bjt and cmos? im wondering that which case we should use the bjt device in bicmos topology....
Analog IC Design & Layout :: 20 Jul 2006 7:52 :: manissri :: Replies: 29 :: Views: 3285
what is differnce between def format and gds ii format?
what is the differnce b/w def format and gds ii format?what are the information will be available in both? when they will be prefered over another?thanks in advance...
ASIC Design Methodologies & Tools (Digital) :: 27 Jun 2006 2:49 :: rajesh9999 :: Replies: 2 :: Views: 249
c-2c ladder network rather than r-2r (dac question)
hi there,for building a digital to analog converter (dac) how do we use capacitive rather than resistive voltage dividers? i have found many r-2r structures but failed to find any c-2c structure. any source, idea?...
Analog Circuit Design :: 07 Jun 2006 20:47 :: zeeshanzia84 :: Replies: 5 :: Views: 966
pwb design outsource
i have a small, quick turn pcb design house. been in business for approx 7 years. specializing in hi-speed, multi layer design. i take on all types of tasks....from simple 2 layer artwork duplication, to 20 plus layer ic test/verification boards.my t...
EDA Jobs, Promotions, Advertising :: 07 May 2006 2:58 :: PWBMAN :: Replies: 0 :: Views: 210
guyz , i need a job ?
guyz, i need a job to become ic design engineer. i can do design circuit, layout, testing and evaluation.im stuck..i need to go somewhere else as my country only have few companies in ic design. im from malaysia.any tips......
EDA Jobs, Promotions, Advertising :: 02 May 2006 8:11 :: satheea :: Replies: 14 :: Views: 3594
differences between lateral and vertical bjts
what are the differences in performance of lateral and vertical bipolar transistors?...
Analog IC Design & Layout :: 18 Apr 2006 16:48 :: krashkealoha :: Replies: 9 :: Views: 738
basic mos question
whats the main reason for using polysilicon instead of metals for gates?i remember reading somewhere its because of the alignment problems of source/drain wrt metal? i am not sure self-aligment process available now also have this problem with metals...
Analog Circuit Design :: 12 Apr 2006 8:43 :: mdcui :: Replies: 12 :: Views: 609
things about smartspice, hspice...
hi,can any one give me a comparison between hspice, smartspice and tanner t-spice? how do they compare with respect to accuracy, speed, convergency, ease of use, etc?thanks...
Software Problems, Hints and Reviews :: 10 Apr 2006 8:42 :: xwcwc1234 :: Replies: 21 :: Views: 4323
the external capacitor value
we are developing one ic product to replace the commercial one. when the design completed, i found all the perforamnce meet the spec, except that the exteranl capcitor of mine is 8uf than that of the 0.1uf of commercial one. i want to know, is it any...
Analog IC Design & Layout :: 05 Apr 2006 7:20 :: suria3 :: Replies: 4 :: Views: 144
sige technology
i am asking about is working on sige tech. differ than si only process and what is the considration i have take when i m working on tech. like .25µ sige thanx...
Analog IC Design & Layout :: 04 Apr 2006 10:39 :: maddy :: Replies: 3 :: Views: 153
cmos technology
i am a novice in analog circuit design. i usually heard of people saying that they are using like 0.13 micron technology...what does that mean?...
Analog Circuit Design :: 08 Mar 2006 15:39 :: nazmee :: Replies: 18 :: Views: 1413
memulator
himemulator™memulator™ is a new software product for process emulation and virtual prototyping of mems and other semiconductor devices fabricated with ic-style manufacturing techniques. memulator is built on patented “voxel” (volume element) technolo...
Software Links :: 10 Feb 2006 1:25 :: Vasily :: Replies: 3 :: Views: 1281
a semiconductor giant invites field apps professionals
hi,want to join a 2 billion $ us based semiconductor company who has recently started their operations in india?move your talents to our company and get ready to advance.start by working on the most advanced technologies around.then, help our custome...
EDA Jobs, Promotions, Advertising :: 23 Jan 2006 11:38 :: veluv :: Replies: 1 :: Views: 372
ic manufacturing
can the hobbiest design an ic and manufacture it in a tolarable price and small amounts?...
Electronic Elementary Questions :: 23 Jan 2006 10:56 :: gayu :: Replies: 2 :: Views: 465
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