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Does anyone have Folding and interpolating adc behavior model in simulink or give me some suggestion?Thanks for your help!!
Hi In a typical folding & interpolating architecture, there are two main parts: the Coarse Quantizer and the Fine Quantizer. In all the papers that i have seen the Coarse Quantizer is of 2Bits and the rest of bits(4 up to 6) are related with the Fine Quantizer. In this way, adcs with bit numbers up to 8 are implemented. My question is why the Co
Hello friends If anyone has information regarding the design of Folding and Interpolation adc please upload the documents. Especially if anyone has Thesis related to Folding and interpolating adc.. Plz upload it. Advanced Thanks Shady205
Hi, I have just discovered something strange with my 8-bit Folding and interpolating adc when the sampling rate is higher than 30 MHz. As you can see in attachment, when the input signal (V(vin)) 0 V (just ignore 1 V because it is the DC offset) the output of my adc showed '00111111'. It must be '00000000'. Does anyone experience this (...)
sir i am doing 8 Bit folding 8 interpolating adc in cadence. plz tell me how to calculate INL,DNL factor using calculator option of cadence tool. is there any other way to calculate INL,DNL factor. How to calculate noise margin and SFDR ?
hello, I'm finishing with my thesis soon. My thesis is design of folding and interpolating adc. does someone has the eBook as guide to write my thesis?
Hello, I have just simulated my folding and interpolating adc. The resolution of that adc is 8 bit with 1.4v full scale input. 1 LSB is about 5.5mV. After i simulated it staticaly(without frequency). The digital output only changed when Vin is 6.9mV or more. Theoritically it will changed at 5.5mV or more. Somehow i found that the (...)
Hi, I've just simulated a folding & interpolating adc and found a glitch around 0.5 V after an EX-OR logic in my digital part. In the attachment, V(c07) and V(c23) are the input and V(out_07_23) is the output of EX-OR. As you can see in waveform, there is a glitch of 0.5 V(at time 0.3 us) of the output of EX-OR.I'm wondering how this happened be
i'm simulating a 8-bit Folding and interpolating adc and just found out that its SFDR is at 60dB at sampling rate of 25MHz. When i increase the sampling rate to 40MHz the SFDR of my adc degrades to 30dB. Does anyone have the idea which main factors cause this? Thanks in advanced
Hi, i have just finished my diplom(Dipl. Ing(FH)) study in electrical engineering in germany. I have a good knowledge of CMOS IC analog design and my final thesis was design of folding and interpolating adc. I am fresh graduate and i found it tough to get the job in Ic design since all positions require at least 3 yr experience. Can someone give
I have a different view for the above question.... In some architecture odd no of bits are possible (like simple flash, 2step flash, Folding-interpolating etc.).....even some times while doing the design....people may find that the resolution coming is 7bit or 9 bit...but they specify one bit lower ...with better spec..... What I think is that...
Dear Friends, Recently, I studied about Folding & interpolating adcs. I didn't undrestand how they actually quantize the analog signal? can anybody give me a clear guidance about how it works, any example or good paper that would explain the exact operation of it? I do appreciate you. Regards, Samaneh
Anyone designed a circuit for CCD array to adc? Looking for advice or ref design. I am using a sony ILX5xx series 5k pixel CCD, need to do an A/D conversion and get the digital data out. thanks Ahgu
Anyone having experience using this adc especially in dasy-chained serial mode?
I could't find a good and fast video adc for my project and I have to use my graphic card adc but I don't know how.if anybody knows how to use video adc on the video is not important which card it is.I can find most cards.
hai, anybody have idea about microcontroller with 16 bit adc and sampling rate of 8Khz+uart please mail me by
Hi! I need 24bit adc with built-in microcontroller with 32-64 Kbyte flash. This device should low cost. Thanks Bye!
Hello I have worked with analog device AD77 series(like as AD7714,15,19,30) But I have problem with them in noisy environment and in sensors that connected to it with long cables ,Sometimes they hang or lock, if I power off the card then power on it ,it works,I do not know what to do with them, They are good adcs ,because they have low pass
Hi there, I need to build an interface that has 8 ch adc connected to pc.I want to measure voltage between 0-5V with this circuit.I saw one guy built this device with pic14f000.I can't copy device because its mcu is code i need to build my own device.I need a similar project (schematic, source code of mcu (asm), source code of contr
Hi all, I have a current transformer, and I whant to read the value using the adc of a 16F873. Problem is, for 20A in primary, I get 20mA on secondary, an with a resistor of 100Ohm I get a sine wave of 2.828 peak. I have tinked to put a rectifier bridge of schottky diodes, but any way, when I get 1mA, the voltage are all droped on diode
Does anyone knows a Microcontroller with adc (16bit,30kHz sampling rate) and USB interface? Something similar to TI-BurrBrown Msc1210 but with previously specified features. Optionally can work a separate adc with SPI and uController with SPI and USB. Many thanks to
this is a 4-order cascading adc, a simple 4-order adc with matlab i find a problem . first the input of the second stage is too large (see the pic) second the last output is in the arrang of -1 and +1,but it should be in 0-1 why ? what wrong? thanks a lot!
any good cheap 16bit adc , higher than 10K sample rate single channel out there that you recommend? thanks ahgu
Hi, Does anybody have a good book for adc (preferably high-speed)? Bye.
Any good design adc/DAC using adc0804 and DAC084 chips?
I was building a PC based oscilloscope based on a parallel port and a tda8703 plus some glue logic. However i was having terrible problems with noise (in form of some spikes). Hardware is simple. Just a 74als244 connected to parallel port for data in(in epp mode). In one extreme and tda8703 in the other. adc clock is 24MHz. Some example circuits
Hi, I'm in trouble with adc function of 16F877A.I am using port A0,A1,A5,E0,E1,E2.When i measure voltage between ports and GND they are usually at 1 milivolt or 2 milivolts.But when i log them adc function returns 100-120 values equals to 2.0V - 2.5V.When i measure E2 it gives 50 milivolt when i dont apply voltage on it(when idle i mean)!! My devi
any idea? please help
What is the basic requirement of equipment for measuring a 14-bit resolution of a sigma-delta adc, in particular to measure the Signal to Noise ratio ?
How to simulation SNDR on hspice ?? someone said use .Four Fin and will find THD , SNDR=THD
Any article about High Speed adc modelling?. I'm looking for AD9070 model. Analog Devices doen't provide it. Is it possible to model some of this effects ENOB, S/N, AC linearity, Error Rate, Aperture jitter How reliable could be such model?
I am reading value from adc of PIC16F870 and transform in to another value by using the equation (y-y1)=m(x-x1) where m=(y2-y1)/(x2-x1). I also including the code where the value temp2 is the y of the equation. This value is to be displayed on 4 digit 7 segment display. What I am doing I am not getting the result. Is there anyone can help me.
i have access to a zilog encore F64 eval board. after reading through the manual...i'm still clueless as to how fast can the onchip adc sample incoming signal i asked tech answer anybody can help me?
In my design ,an ads7844 is used, the /cs(chip select pin) is connected directly to gnd(i have only one serial adc,so i think no chip select is needed ) and the logic operations are controlled by an altera cpld EPM3256a the problem is that when the power is on,the chip's Busy output signal keeps high, that means the chip is busy all the time wit
Hi all For a new project I need to use a uC + lcd (50 segment driver min) an 3 ch adc converter (8 bit and up on board the uC) + 3 timer's Price under 5$ @1000 Can any one recomend me for one ? Best regards Bobi :?:
Hi, You can only put +ve signals to the input of AVRs and PICs Analog to digital convertors. :( Any Idea to get -ve input. I have two ideas 1. Inverting the input (but how to stop +ve signal to get invert?) 2. Shift the input voltage i.e 0V gives 2.048V at adc (how to shift? and we will loose one bit also) What is your idea, need help.
HI, Need your comments on my atmega64 board, specially on the adc supply and refrence.
I want to interface adc with PIC microcontroller using SPI protocol.and i want to know how SPI works .wat is the protocol ???? i want a detailed explanation about the protocol can any body please help me.
who can tell me the application of 10bit 100Msps adc in detail? can it use in 802.11a/b/g? :idea:
hi, can someone help me by giving a method or code( :D ) in c for converting a hex o/p of the 12bit adc on the msp to a decimal number ?? i need to do some mul. and div etc. on that data before displaying it on the LCD. any help will be appreciated. :) thank you sam
I am in the process of designing a circuit with a 24-bit adc on it. I am wondering if i should devide the ground plane (4 layer with sig-5V-GND-sig) up into digital and analogue. This particular adc (texas ADS1251) does not have a digital supply input. So should i just have one unborken ground plane, at present there will be no digital component
Hello i am looking for a micro to interface with a adc board. I am hoping to find something cheap that will read in data from the micro at 480kbits/sec serially. We were going to use one of the 64180 variants that we use for other products but it doesnt seem fast enough. The adc ( ADS1251) itself will assert a data ready line then
I have CS5550 adc from cirrus logic. The output register is of the form -(2^0) (2^-1) (2^-2) .......... (2^-23) This is a 24-bit register. It is given in the datasheet that : These register contain the last value of the measured results of AIN1 and AIN2. The results will be within the range of -1.0 <= AIN1, AIN2 < 1.0. The value is repres
Hi, Can any body out there tell me or any schematic how can I interface the Bi-polar signal (+/-1.5v ) signal to my 3.3 v adc working in unidirectional conversion(0-3v) Signal. :)
Hi, I need some suggestions on improving the resolution of adc by software processing.
Hiall, I would like to hear some opinions about high speed 8 bit adc (betw. 200 and 1000 Msps). I intend to use it in a DSO, and I still don't know yet which one is the best (performance, price, easy integration....). Thanks.
Hi,every one! Where can i find the adc,which is 300MHz SPS,and 10 bit resolution?
I have read this from some material: without trimming or calibration, the resolution of pipelined adcs is limited to 10bit. the main reason is mismatching. what I want to know is how to make this conclusion with derivation? does any materials about this on web? thanks
Hi, can any one give me the link for the simulink model of Pipeline adc with all the nonlinearties like thermal noise, offset, mismatch, coupling, jitter etc included in it. Or some paper which talks about the modeling of same. Amit
Hi good friends, I've a question about a circuit that I'm debugging: this is an adc board (the adc is LT1400). If I acquire 1000 samples of the same signal, and plot the results, I see missing codes in the output, which sounds strange to me. There are many missing codes, typically large one to two channels but I do not see a logic like a mis