7 Threads found on edaboard.com: Jk Flip Flip Counters
What are the advantages/drawback of JK flip-flop when compared to D flip flop ?
Why D flip flop is prefered for circuits implementation ?
Electronic Elementary Questions :: 25.06.2010 11:37 :: AdvaRes :: Replies: 2 :: Views: 8105
Hi, I want the procedure to Design of counters using JK flip flops. I have seen question like, some input & output equations will be given & we should provide the state diagram, state table, state equation & logic (circuit) diagram.
I don't know if its a synchronous or asynchronous?
PLD, SPLD, GAL, CPLD, FPGA Design :: 31.05.2008 11:27 :: pravardhan :: Replies: 8 :: Views: 5262
what r the applications of flip flops(sr, jk) ring counter and johnson counter
Do you want to know a COOL application of flip-Flops? Spread-Spectrum (pseudo)noise camouflage generation in Stealth Aircrafts.
Well it is a long way to get there but just not to get you bored in time, I know how it is. So you always will like
Electronic Elementary Questions :: 13.09.2004 07:19 :: djalli :: Replies: 3 :: Views: 2622
Truth table for JK FF:
J K Q
0 0 Store
0 1 0
1 0 1
1 1 Toggle
It is a decade counter. Counting sequence is given below:
Electronic Elementary Questions :: 17.04.2011 08:47 :: yadavvlsi :: Replies: 2 :: Views: 541
I would like to modify a timer's design I have built, but do not have electronics workbench any more sad.gif
I do not know that much about electronics, I've built a few velleman kits, made radio's as a kid. Kinda basic working knowledge.but with gaps. When I was at uni part of the computer course involved using Electronics workbench. T
Hobby Circuits and Small Projects Problems :: 27.02.2005 08:15 :: cliffclivin :: Replies: 0 :: Views: 1000
Sorry, I don't know how to make a /3 divider with only DFF and no gates. I can do it with JK-FF or T-FF, or with gates + DFF. Maybe this will help you:
I would be very interested to see how one can use a Karnaugh Map to make a clock divider.
ASIC Design Methodologies and Tools (Digital) :: 01.07.2010 21:24 :: randyest :: Replies: 5 :: Views: 4946
I am trying to simulate a BCD counter in Hspice, as you know BCD counters are consisted of flip-flops such as JK-FF. In my circuit there are four JK-FFs, the flip-flop subckt is working properly, I mean when I simulate a single JKFF individually in a netlist it works properly, but when I connect the (...)
Electronic Elementary Questions :: 06.02.2012 08:35 :: mazdak :: Replies: 1 :: Views: 404