Search Engine

Keep Out

Add Question

227 Threads found on Keep Out
hello PIC Eeprom or external I2C eeprom ? Both can keep all datas when Power Off occurs.. even it is better to manage Brown out Reset Volatge or use a dedicated IC to survey power supply and be able to save data into eeprom,just before MCU reseting. you need to store an index , the last position (adresse) used to store data in to the eeprom, i
Makes you wonder if there are data breaches that don't make the news, doesn't it? Businesses would rather keep breaches a secret. If they do announce a breach, they don't want to give details how it was possible. Perhaps a hacker can find entry to the database, with or without a password. Or perhaps it was an inside job, and then they certainly d
A current limiting resistor or voltage clamping means will be needed to keep the STM32 maximum injected current specification for negative input voltages. Most simple clamping means would be a single supply 3.3V R2R amplifier. A RC low pass can be generally useful to filter out-off-band noise and interferences. Although source impedance up to 50
Your LT1634-5 shunt regulator is not doing anything because the 5V reference feeds the opamp without it. If the 5V reference voltage increases then the shunt regulator will keep the input voltage to the opamp at 5V. If the 5V reference voltage drops then the input voltage to the opamp will also drop.
Sorry, no photograph is visible. Please try again. (The 'Add an Image' button is a reliable and straightforward method for including an image in a post.) A burnt component might be identified by our experienced members. keep in mind that the burnt component may not be the only faulty component. The instruction manual (pdf) comes through okay. It
Bit of a generalisation, as it is not always the case, but historically for eurocard rack mounted cards it was because of the lack of number of layers, often on a 2 layer board you would have power on one layer ground on the opposite... To prevent components near card guards keep out areas are better option as the outline of a component (...)
yes just keep sensing them. When its out of range, turn off.
Many PDKs still fail to model accurately any breakdown behavior, depending on rules (ERC, or design manual) or flags (SOA, IMAX, or breakdown warnings) to keep the designer on the path. Garbage in, garbage out - as true today as when it was punchcards and fanfold paper.
why do people keep posting these horrible ideas. NOBODY uses discrete transistors anymore for amps. Go to mini circuits, pick out an amplifier integrated circuit, and use THAT instead. I mean this is not 1990
dielectric layers are handy between a microstrip line and the ground plane, as they keep the microstrip line from falling down onto the metal ground plane and shorting out. :roll:
My guess is that it might be possible to tweak the voltage up - but it might not be capable to keep the voltage under load. Also be sure that there isn't components that is rated for lower voltage than you tries to get out of the power supply. Warning: Most probably there is safety circuits - but don't trust that. It might start to smoke/burn if t
r3 is probably there to keep the rf diodes from blowing out. like maybe they are driving R3 with a digital gate, and they do not want the full 5 Volt spike to get thru the capacitor to the diodes as the gate changes output state. R2 is probably not needed, but might help discharging the capacitor in time for the next bit of data to get (...)
The problem with requesting a best book is it's so subjective. I would recommend certain practices, like ... 1. Writing out text files that keep a record of the Test Results. 2. Writing control files that direct the model to function in a certain way so you can configure testing conditions. 3. Have models that represent external IC's to the fpga/a
I hope there is no facility available in altium to mention the depth of the V-groove. Normally these things are taken care by the manucaturer & if need to specify the depth you can write a string outside the PCB design & it goes along with the gerber file. For this option you can use keep out layer. Udhay
keep out margin is attached to cell/inst, which means if you move cell/inst the keepout marign also moves along with the cell. Blockage is depends on its coordinate, hence it stays in the same place.
You can not lay out any ideal sources right!!. Ideal source is ideal, not practical. Layout will have only what can be fabricated. During back annotation(post layout) sims, the block is usually considered as a black box. You will not have access to the internal nodes of the circuit, unlike in the case of schematic simulations. So, (...)
In my opinion this is a very specific ISE software error. The Xilinx forums might be the only place where you may find something......keep trying! In parallel did you try to simulate your design using WebPACK Edition of the Vivado Design Suite (try it out if not done)?
keep in mind old electrolytics can dry out and these are brute force bridge linear supplies with Class A or A-B Amps with an overall power efficiency of 2~15% or so but high linearity. If you have specs on gain, IP3 , BW , noise level, etc , that would be a good start for must haves.
You would need to check with the design rules, normally at chip corner there is a keep out area, 0.18 tsmc is 50u for example. Metals at the corner edge normally go edge to edge using a 45 degree path.
There's essentially no information in the datasheet about the implemented locking and out-of-sync detection. I don't see how you would use the device with an external power stage and still keep this feature. At worst case, the BLDC driver doesn't work at all with an external driver. You probably need to chose a more versatile BLDC driver IC.
I keep seeing this on PCBs. It is less then a cm long and a few mm wide. Can someone tell me what is it and what its function is? I can't seem to find out. 119947
Yes, you are right. The switch voltage transient problem is brought up by the current-switching toplogy. It needs additional means to keep the voltage during switch-off within transistor safe operation area. My consideration about the resonant circuit that loads the switch is only valid for the fundamental frequency. I didn't notice before th
To change the net change of a conductor, there must be current flow into or out of it. That's possible for B but not for C. So if C has intially zero charge, it will keep it forwever. Instead the potential of C will change according to the surrounding field. It would be better to have a simple problem sketch.
I seem to recall some versions of MIG adding a row bit and for implementation convenience forcing the minimum number of row bits to 1 in the case of single rank RAM. 8CE/ACE makes me think of a timing error on a data or mask line. 8CE is 1 bit different than ACE. From what I recall, this version of MIG was a bit mor
my guess, without looking at your code, is that the gates are getting optimized out. You need to use some attribute like keep to prevent the synthesis tool from optimizing out the gates. BTW, I am always a little leery of opening an attachment from someone I don't know. You might be better off just posting your code (...)
I have connected my DS89c450 up and finally have begun to get somewhere! now though, I keep receiving the following error when attempting to connect with MTK2. Has anyone hit it before and how would I fix it? Debug out put is below. <0D><0A> <0D><0A> <0D><0A> > > R<0D><0A> Loader not responding Unable to establish communication wit
The real limitations of boost converters is not just the power relationships for VI in vs out but the requirements for impedance ratio being much lower than load than simply /N? , where N is the voltage boost ratio. this is because due to input load regulation requirements to keep USB charger within 10% , its source impedance must be 1/10 of expe
At 50m, a 20mm offset means the error angle is 0.00039 radians (or 0.022918 degrees). Quite hard to keep long time on spot, without using a lot of kind of compensations.
DO NOT have any PCB tracks or fills in those areas, follow the SIM900 hardware document for the keep out area sizes. Cheers
Hi, When i log into say,gmail & i keep it open on one tab & keep doing other stuff for hours on other tabs,i am still logged into gmail during this period of inactivity. But i am logged out of edaboard after 5-10 mins of inactivity.Does this happen with everyone ? If so,can this be resolved ?
In such situations I would suggest the following things: 1. Increase the decoupling capacitors of Atmega32 VCC pins - put if possible tantalium capacitors 47 to 100uF/6V 2. Enable the brown out detection on power up - it's important to keep the processor in reset state when voltage is low 3. At the beginning of the program put 100-200ms delay befor
2 ways to connect.. pin2 is connected to 5v, pin3 is connected to output of AND gate(cntrler ckt)through series resistor. or Pin 2 is connected to out of and gate and pin3 is connected to grnd through series resistor. 6N137 has its output inverted. If you want to keep your uC signal non inverted, use the first (...)
Hi, I am trying to control a CFL light through a Micro-controller but the gate resistor of SCR is burning out. I have tried many things but could not solve it. I have also tried by cut short the circuit by just giving supply at the input of opto-isolator but still the gate resistor R1 burning out. Can you tell where I am making mistake? I have
Usually stainless steel construction to keep out nasty acidic lithium salts. If just the cold welded tabs, OK to grind down 50%. but at your own risk of shorting, for which they need internal fuse. Some dont. Sounds like Chinese tolerances. Unless someone changed the spec, that I do not know well. 18.6 × 65.2 = 18650 or is it [/COLO
What is your motor Rs winding resistance and supply voltage? Amp rating or stall current? This will determine the start/stop surge current which your switches must control and is usually 5~8x average rated current. Then duration depends on load or acceleration/brake time you need. keep in mind it will coast to a stop with with an open switch and s
This scope uses average persistence Phosphor and uses a 15kV flyback transformer to scan the beam. Since the problem is thermal, check that the fan works. Then vacuum/ replace fan or add one externally to the rear. keep in mind 15kV hurts. When beam current is high due to some reason, it gets out of focus hurling those electrons at the screen
Due to the radical drop on Ic and hFE as Vc approaches V+, my simple design rule of thumb is keep out of the zone 2V below V+.
I note that you are calling the function RunCountdown() from the interrupt service routine which is not recommended - you should keep your interrupt service routines as short as possible because you may be missing interrupts - this could give the effect of timers appearing to stretch out the interrupt service (...)
How much space are you modeling between the monopole and the absorbing boundaries? I'm not sure about the rules of thumb for HFSS, but sometimes with 3D field solvers you need to have enough space to the absorbing boundaries to keep them out of the near field reactive zone, or you can get some funny results at some angles. Try making the (...)
The Service Manual is on the web with schematic. If you know how to keep out of the high voltage section and poke around FM section then ask a better question. Maybe you can inject some noise or affect signal with finger on board. Make sure FM mute is not due to low signal from missing antenna.
In hardware terms, signal count isn't but an alias of port output. According to classical VHDL syntax rules, you can't read an out port signal unless you define it as buffer instead of out. The restriction has been removed in VHDL 2008. But you may prefer to keep an internal signal that is assigned to the (...)
Good luck with your endeavor...I would seriously consider a redesign instead. If it's some kind of field return (why would you even keep supporting something like that!?) then make sure you charge $$$$$$ (i.e. more than the current product cost) so the customer will seriously consider upgrading and you can get out of fixing t
the BID is for write response, so you can keep the BID value as same as that of AWID or simply WID. Anyway after the WLAST of each transaction slave have to send the Write response with BID, BVALID and BRESP, so the MASTER will fetch it by asserting the BREADY. So if there is out-of-order transaction then you need to send the BID by keeping (...)
you should keep the diode reverse.
hiii all, I have a problem in Altium PCB doc. In my project some footprints designed by me only. Problem is a transparent keep-out area is visible (while clicking above that footprint) around that footprints,because of that I can't place components near to that footprint,but I can route in that area. How can I solve this problem?? (...)
One junction has zero bias if Vbs=0. You left that bit out. You refer to the body not at all. The body should always be biased such that neither of the junctions goes forward-conducting. That's not a "how?". That's an application rule, to keep Bad Things from happening.
Hello, There are some annoying advertizing companies that keep calling my friend's home phone rudely. Hopefully their calling numbers are known and are always the same. His phone provider cannot block specific incomming call numbers, so I was thinking of a local way. Is there any microcontroller project out there that will be able to identify t
in general floating point operations take longer to carry out than integer in particular where processors do not have floating point coprocessors and use software to do the caluclations (also in such cases the code can be very large) in general if reading integer data, e.g. from an ADC, keep it as integer data as long as possible. if there is d
RF MOSFETs (integrated) tend to design / constrain the gate width because Rg is a key term in fmax. You will see short stubby fingers, heavier silicidation, maybe even a "muffin top" gate structure. The heavily contacted body ring is for noise control, to keep busy body activity out of the substrate as far as practical. RF LDMOS, discretes, play
32X7=224 Use 4 of those leds. Let me try it out... will keep you posted... :) The LED according to the datasheet requires 600ma per piece... i thought of putting 6 LEDs in series and 2 100E resistor 20W in parallel