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Hi, just thought I'd add my $0.02 :) I've used manchester (similar to biphase) coding in a PIC16F818 to test the BER of an RF link. I did it by splitting my input byte into two 4-bit nibbles, and used a LUT of 16 entries (1 for every possible 4-bit combination). I think its only used a total of 10 lines of code, plus the LUT. Pseudocode: M
s_tfcell veriusertfs = { {usertask, 0, 0, 0, counter_monitor, 0, "$counter_monitor" }, {0} // last entry must be 0 }; Does you c head file have the pli function struct like above ? you should add you function to the head file.
Checkout the following code ..... filename: testme.c #include "vpi_user.h" #include #include #include void myrandom() { time_t *nowtime; time(nowtime); srand((*nowtime)); io_printf("The time is %d\nthe random is %d\n", (*nowtime), rand()%128); } // Associate C Function with a New System Task
Hi, Danda821: 1. On IE3D 11.20, there is an information at the bottom. If you don't see it, please check it in VIEW->INFORMATION BAR. On the Geometry tab of Information bar, you can check an edge's information by pointing the mouse to an edge, or a polygon's information by pointing the mouse to a polygon. 2. If you want to measure the distan
Hi, Chest: There are 2 ways: 1. If you want to know the distance between 2 vertices or linking a series of vertices, you can just enter the vertices snapped to these vertices as if you are entering a polygon. Then, select INPUT->INFO ON last entry to see the information. You can find the total path length and the absolute and relative locatio
Hi, From the link you provided, its full of feedback from users who have built the unit, last entry Dec 2009 so think you would be better posting there. The pics adc input can only handle 0 - 5v dc and needs a suitable network for other voltages. Resistor R3 is 5 ohm for the backlight . It seems to be a neat little project but be aware
Ok, it is true we can't search inside FIFO. But in order to find out the 2 identical entries in FIFO, we have to read out the entire content of the FIFO before we do the search. Let's say the first entry and the last entry are the identical pair we are looking for. It is obvious that we have to buffer all the entries. If the question (...)
CST Studio error: The history list is not positioned at the very last entry. In this case, no parametric structure editing is possible. Please complete the structure update before editing shapes. I don't know what is the problem, anyone could show me the error? Thanks in advance.
Hi, I was not so much refering you to that posts project, but more the last entry advising how you can get started coding for yourself. You start off with the proverbial flashing led and build up your experience with the goal of making your thermometer and voltmeter work. You will find some ready made code for the ds18b20 sensor in this or
Hi, Yes you can do it with Assembly and you can use your Pk2 Usart Tool to act as the PC terminal. You first have to know what frequency crystal you are using the the 877A, this is because the Usart has to be set up based on that. You can learn how to use the Usart in this tutorial , the last entry 7.7 is based on the 876/877A chip so it s
Hi, I am an hardware engineer, and using smith chart from time to time. I build this using Javascript and HTML5, so it's easy to use in any latest browser and easy for update. If you would like to try it, please goto: I would like to add more features if anyone interested in i
Hi all, As a fresh VLSI design engineer..I am finding it very difficult in getting calls for entry level positons from companies..People say that usually guys are called for written tests only through referrals!! After applying for the last 2-3 months I am also feeling the same..Guys from india can help me in getting me some referals for
Now it should be fine. I'm not sure why it wasn't shown as moderated anywhere apart from small icon next to the post. I also don't understand why it was visible, a moderated post is invisible until it is approved. - - - Updated - - - can you put the link here ? Check the blogs link, it
I think the most VHDL-Tools runs under Linux! In the history the VHDL tools are Designed for Unix, in the last years mor developer of VHDL Software are switching to the windows platform. Mostly you can download from the developer homepage a windows also a unix / Linux Version of the Software! For what tools are you looking?? Then I can say you wh
What entry tool you recomeds or use? I'm not interesting about advantages or disadvantages in 1st or 2nd case!!! I'm interesting how much ppl are using VHDL or Verilog, and how much - Schematic entry tool... be well, Wazard Dreamer
hi fox, what is the last ver name of specman, & how can be dwd? hawk.
Hi friends, I need a source for boards without having any copper on either side. I am not sure if the so called : Drill entry / Exit Board is what I need?? FR4 without copper would be perfect. Any help appreciated. Thanks. :roll: :roll:
Hi all, I've got a copy of Hspice 2003 but is only netlist entry, is there is simple to use schematic entry add on for this simulator ?? cheers Ody
I would not count on a fix very soon. I think protel have completely lost the sense of direction. To spend so much development time on design entry & capture is nuts :P when they have so many other things broken. The DXP tool could have been so much more for the PCB design market, now it seems they have looked at design capture market f
There are eight sets of notes on Fermet's last theorem prepared by A. J. van der Poorten - Centre for Number Theory Research , Macquarie University
hello i know verilog well and have xilinx foundation on my pc at home. i am searching for entry level job in asic design. pls. suggest me a project in networking domain and some info regarding it so that i can do it on my own and include it in my biodata. thanks
Please if you have (or have link to download) last version I'm urgently looking for it. Thanks
The critical details you're missing is the flash memory address space decoder circuit. It's most likely a PAL/GAL type device that logically AND's the higher order STi5500 address lines to create the OE# signal (and possilbly others signals too). These extra circuits are shown only on the Pansat 300A schematics. From the STi datasheet: 8
Hi, I am currently working on a software+hardware laboratory for electrical engineering undergraduate students in our university. Students know a little C and Matlab on entry level (C is a core course but i dont think they pay enough attention and Matlab is given by seminaries (by me!)). We have 10 TI TMS320F2812 32 bit fixed point DSPs for use
Hi, all My up arrow key, down arrow key won't repeat the last command I typed, anyone know how to set them under cshell for Cadence. the OS is Solaris 8 SUN machine. thanks.
As the title.If must use the mode of schematic entry to design digital circuit, Which books are better for refenrence? Thanks in advance
Hi everybody, Recently, I have been learning Cadence SKILL. I experience the followiing problem. If you happen to know this, would you please give me a hint. Thank you. 1.How to delete thoes varaibles created by the procedure from last run? During debug period, the same but modified procedure will be reloaded because of the modification.
HI, last 128 bytes cannot be accessed directly ayan Never accessibility! Because last 128bytes in directly mode is located all of register area. And so on, you only access last 128bytes general purpose RAM with indirectly mode (the same as pointer).
Can somebody advice me on schematic entry tools they use in their ASIC flow? Thnx! S.
PCB design means schematic entry, assigning part properties etc. Layout has to do with placement, routing and other issues such as gnd ans power planes, high speed design, signal integrity etc. The last one of cource can be another specializer area. I feel you should know and be aware of both and specialize in any one. This will automatically
Hey all, I have one last quick question for IC5033. I have it installed and "working". Only I can't get lmgrd running to get my license working. I run lmgrd -c license.dat (a legit license that expires in 1 year + 1 month) and lmgrd says "connection refused to localhost". I'm running IC in SUSE. Firstly: The actual message I get when running
I am using IC50 for LINUX. When I start ICFB and use 8bit display, I got this strange error message in CIW window: Warning: Cannot allocate colormap entry for "#e0e0e0" Warning: Cannot allocate colormap entry for "#800000" Warning: Cannot allocate colormap entry for "#999999" The color is distorted in any WINDOW (IC50) I open. (...)
Hi. As you know, error and noise of this last stage will be divided by the whole gain of previous stages to have the input-referred error or noise. Hence, its design would be very relax. Conventionally we assume that this stage contains no error at all. But if this assumption does not hold true, there would be an error in LSB of the final output n
Besides Electronics Workbench, pls recommend other software with schematic entry that is good for digital logic simulation. Thanks.
Hi elexhobby, Bear in mind that your display has 40 chars in one line (first 16 visible and others 24 hiden to the right) You start writing from address 10H (your 90H means : Set DD RAM address to 10H) The length of your string is 30 chars (Hello, How r u? I am fine here), which means that "n" from 'fine" is in fact the 40th , the last char on
Hi, this may not help much, but have you thought about capacitors? I mean the 1-5F ones. Their capacity rivals that of batteries, but you can charge them very quickly. Memory backup caps are cheap now, and last for about 3 years from full charge. Hope this helps. The cap in the link is
Regarding COSMOS SE what means dead end tool? I did not see any new schematic entry development the last 12 years! What dead ends should mean? Are all entry tools are dead ends? I found ECS or SCS or Laker AMS most useful because it allows grid based entry with all features for EDA and can export in vector MS (...)
Hi all! I need to design and simulate Keyless-entry-Transmitter on 433.92MHz. I found nice design description: I am looking for examples files for this notes. Has anybody? or symilar examples. I am also searching SAW oscillator examples for Ansof_T D_esigner (300MHz to 1GHz). I would be great
Hello, I am using Design entry HDL to design my schematics. But when I place OFFPAGE, INPORT, OUTPORT symbols, there are errors as shown below: Error 168: Schematic has port but port does not exist in the symbol. Either delete this port from the schematic or add this port in the symbol. However, sometimes, when I restart my co
hello i am designing a CML output buffer ,,,concerning the last stage of CML line driver,i must have the resistances values equal to 50 ohm cause of matching ,,,and i want a certain swing ,,so , the current in the last stage is determined,,,,also ,,depending on the CM input level,,the sizes also determined,,,,now ,,if i have a large load capaci
Does anyone have the last edition of Taflove s book please
Juniper Research 12 May 2006 Introduction to fixed WiMAX Ther are primarily two application areas where Fixed WiMAX has an opportunity. The first is the area of backhaul for cellular, WiFi hotspots and WiFi mesh networks. The second, which is a more prominent market, is the area of last mile wireless broadband access. Read Juniper's white
Here's an extremely simple, lightning fast, multitasking kernel that will run up to four threads. This can be used as a foundation for a real-time os. ; EXEC is the kernel entry for tasks. The kernel assumes exclusive use ; of registers R6 and R7 in each task register bank. Up to 4 tasks are ; supported by the kernel, as the 8051 has
I have observed an interesting behavior by the good old 555 timer. A simple test in a monostable mode reveals that the timer works as expected :) what a surprise However I noticed that the internal latch somehow remembers its last state even when power is removed. So for example if you trigger the IC so that time cycle begins and then you cut-of
what is the last mnemonic in the ISR for an interrupt in 8085. is it RET. how will the processor differentiate a return from a subroutine and an interrupt. thanks
$type = ( -d "$path\\$entry" ) ? "dir" : "file"; It is a part of a script. What the script does is it will serch the specified directory and list the all the contents of it including files and directories with type specified whether it is directory or file. The above line of script is intented to set the type as "dir" or "file". My doubt is
I got master dgree,but I switched to IC layout industry for somereason, I am about to graduate in this month from a very famous IC Mask design school and I am top 3 student in the class. I started job hunting from last month, but realized that no company post their such kind of entry level job online or in newspapers. I am a little bit discourag
I am thinking of a Finite State Machine subject application project, it must be an FPGA based using verilog/Xilinx, can anybody give a good suggestion for an entry level project? Thanks.
yes i'm looking for the nontrivial solution. how can i create a matrix with A columns and the last column being all zeros? thanks
Anyone know how to control a tiny motor with a garage door opener or keyless entry remote. tiny motor would need to be battery operated, a motor in a mini RC car is what i have in mind. I only need it to move one direction. There was a post on here previously that I didn't understand. I know very little about this subject. ANY helpers would be gr