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Ldo High Voltage

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52 Threads found on Ldo High Voltage
Hi, I want to measure the output voltage of ldo voltage regulator circuit. However, the output ripple is very sharp, so I think it has high frequency components. My oscilloscope only supports up to 200MHz bandwidth, so I am worried about distortion from measurement. I can borrow high bandwidth (...)
100 mA is slightly beyond the capability of analog switch ICs, I would use a MOSFET H-bridge. Gate drive solution depends on the ldo voltage range.
The only way it could work is if I can find a diode that has a very stable Vf over that current range. You wouldn't find any - it's physically impossible. I did come across this as well in my searches...not sure how this works, but it seems like that circuit keeps a stable voltage up
Hi Guys, I've this question. I'm using a HDMI converter chip which convert from another display format to HDMI. For the core voltage which run at 1.2V , they specify quite a tight requirement on core power supply: 1.1-.13. I plan to use a fast transient ldo for this power supply since it's going to power the core cput which would have plenty o
I have a circuit that require 15Vdc, I used LMR62014 (1.6MHz) initially. The circuit run okay, except the noise a little high. so I put a LT1761 after LMR62014. Changed the LMR62014 Vout to 16vdc, and LT1761-byp to 15v. I notice the LT1761 Voutput has ripple triangular voltage, several hundred hertz, magnitude about several hundred millivolts
zeners are not efficient nor stable compared to bandgap reference diodes used in all ldo's (LM317 type and many others) Zeners must draw more than the worst case load to ensure when loaded there is still enough current to get past the knee in the zener. Then when no load, that current * voltage can lead to thermal problems for high (...)
Hi all: I am design a current mirror, and this circuit is used in a ldo, so the quiescent current needs to small. But I found the W/L of the high voltage MOS(NM5 and NM7) is big (20u/1.6u), so the NM5 and NM7 can't into the sat. region when the current is small (< 5uA). Could you give me some suggestion? (other structure or (...)
At first, let me say that it is always a bit "problematic" to explain in detail the working principle (and the dimensioning) of a circuit designed by somebody else. Nevertheless, here are some explanations: The ldo consists of two parts: A regulated amplifier Ar (FET & CFA) and a control loop (error amplifier Ae). * The amplifier Ar is
You can build a PMOS ldo that works within the input rails entirely, so long as you have enough negative Vgs (wrt VIN) to get the on resistance you need. A NMOS ldo requires a supply above output voltage (by a fair bit) so when dropout is actually low, you need a supply above VIN. There are NMOS ldos now, especially for the (...)
Hi all: I wish a OPA for a ldo and the OPA operation voltage is 5~20V. For high voltage, I use LDMOS to design the OPA, but I found there isn't have vdsat parameter in my pdk. Do you have any suggestion or solution to know the LDMOS is in saturation region or not? Thanks for your reply. mpig
Hi, My question is regarding charge-pump which is used to salvage current from RF signal to power an RFID circuit. My understanding is, because the current must continue to be available even when there is a small gap in the RF signal, the charge pump must charge its load capacitor up to a voltage which is higher than the normal VDD used for the r
If you are lazy, use a 3.3V ldo.
I presume that by ldo, you mean low dropout regulator? i would preceed it with a resistor with a decoupling capacitor to earth. Say 10 ohms and 470 MF. As a vehicle battery is extremely low impedance you have huge currents and induced voltages running wild to give such a large voltage spike. I would totally re-evaluate the connection of (...)
can any buddy tell me what is the role of load current specification in case of ldo, as ldo output is connected to another cmos block in mostly case to the gate of MOS so what the use of load current then as i guess prime requirement is only the voltage not current...any suggestion...please help me out
use a LC filter... close to ldo use decoupling caps near the pins as per the fpga vendor suggestion...
Hello I need to get ldo output voltage (Vout) high accuracy, how can I do? for example, the reference is bandgap voltage (vbg). 1, if vbg temperature coefficient(Ts) and accuracy are both poor, do I need to trim vbg accuracy? or the other? or both? then trim Vout ? 2, if vbg Ts is good, but accuracy is poor, do I (...)
Hi, all, I'm designing a ldo with high PSR of 75dB up to 100KHz. The input voltage is 3.5 and output is 3.3 with a max current of 300mA. Any suggestion on the topology of the ldo is welcomed. Thanks. Best Regards,
HI, I am new to ldo design. How to setup PSRR simulation in cadence for ldo? What are the general methods to improve PSRR of ldo ?
The idea that an ldo is high-efficient is false .. It can just tolerate low voltage difference between input and output .. Otherwise it behaves as any other linear voltage regulator .. One of the simplest options is to drop 2V by using 3 silicone diodes connected in series, but it can be done in one-hundred-and-one (...)
as long as it is a linear regulator , no difference in power consumption equation between an ldo and Non-ldo regs. ldos have an advantage of minimum input voltage requirement. srizbf 1stmay2010
Hello, a ldo is used for VCO, for example if VCO's frequency range is 120MHz~330 MHz, how to pick up the bandewidth for ldo? Thank you in advance.
Hi Can anyone share high voltage ldo (low drop out) architecture?? Thanks & Regards Amit Singh
Your forward gain in the amplifier, is only one part of the story (and perhaps not the significant part). Look at your bias racks and other supply-to-output paths which "should" be supply voltage independent, but can never -entirely- be. Preregulating with a crude ldo is one way to bump up PSRR, if you have the headroom. This regulator
What's the current load. Mission impossible for fully integrated (including the output cap), I think. You can imagine 3.2MHz is out of ldo's bandwidth. At that frequency, PSRR depends on voltage dividing between parasite cap and output cap. Added after 3 seconds: What's the current load? Mission impossibl
Hi, FvM, Thanks. Is it possible to use ldo for this situation?
*For transient : You can imagine the pass-element for very fast changes seen as a current source (as before EA catch-up the EA output voltage is constant ) & so varying the load can be seen by two points of views : 1) Varied resistance :for ex. load resistance varied from high resistance to low resistance,&
I am using 0.13um process,high voltage transistor (to be a pass device for a ldo) When I increasing the no. of fingers the current decreases ,why ??
Are you refering to ldo structure ?
Please recommend !! Dear all : Recently, I need to modify a regulator which is the "ldo" topology. In the output-part, using the resistor for voltage divider , then the divided voltage will be compared with the reference voltage by a comparator. But now, if I would like to change this huge resistor by the capacitor (...)
Hi gays: I have a question about ldo over current protection. the question is following: When the current of output transistor is to high, the protection transistor (PMOS) will pull up the gate of the power transistor to high voltage and close the power transistor. but the current flows through the protection transistor (...)
Dear all In the high voltage dc-dc regulator, typically using internal low voltage regulator(Typ. 5V) to supply the high side NMOS driver with the help of external bootstrap capacitor. My question: How to implement the internal 5V power typically? ( Using ldo? Too wide input voltage, (...)
It depends on your ldo loading condition and supply voltage.
What's max current output for your ldo? If it is not too high, you can try series a resistor and some voltage clamp to realize it. Otherwise, I think it is mission impossible.
perhaps the bandgap voltage is not enough accurate with high supply process. I don't know whether there is low supply process in this process. If it comprises , you can create a ldo. You can create a bandgap with low supply process.
In ldo,we require large resistors about 100k~200K ohm,can we use n-well resistor? How about the matching ?Thanks the resistor look quite large, will contribute high termal noise at high temperature.
OTA is voltage-in and current-out, so it drives capacitive loads only as it's without a output buffer. Pass gate is a large cap PMOS or NMOS, so OTA is a good choice. However, OTA has high input and output impedance, so buffering the OTA output is commonly seen. One of the beauty to change the transconductance of OTA is to change the bias current
Dear all, Please advise on these topics. 1. ldo design issue we should pay attention to. 2. Classic paper or thesis about ldo design 3. high efficiency charge pump design issue we should pay attention to 4. Classic paper or thesis about charge pump design All these material is for DC-DC design, any advice please supplied. (...)
you should know that if your ldo want to go into dropout region, the dirve voltage of the NMOS should higher than vin and vout than a VTH ,how can you boost such high drive voltage?? but if the pass element is PMOS ,the drive voltage is zero will case the ldo went into (...)
There are many 5v to 1.8v/3.3v IP, but I don't know how to design. 5v tolerant digital I/Os use floating Nwell. But, for ldo input, I don't know. I have also seen that IP : ldo with 5Vinput for 1.8/3.3v process.
I need help in designing the ldo with NMOS as passtransistor.. The gate voltage of the NMOS should be higher than the input voltage.. I need to use a chargepump to get this high voltage.. Anybody has any experience in this.. Any material is appreciated.. Thank u
Hi , everyone : I draw a circuit of buffer for ldo. It is insert between the pass device and the err amplifier to increase the pole to high frequency .The buffer is coposed of T1 to T4 and Is1 Is2 . T5 is used to increase the speed of increaseing the gate voltage of the pass device . It is like class-AB output stage of operational (...)
DMOS is high voltage CMOS device , it is different with LDD structure cmos device .. by the way , CMOS ldo , you can use OPA + nmos or pmos nmos response is fast , but use for small output (nmos have Vth drop )
TPS71533, 50-mA, 3.3-V high Input-voltage ldo voltage Regulator in SC-70 Low 3.2-?A Quiescent Current at 50 mA
i have an op-amp which is used for ldo. the Vref is about 1.16V. At that point, my op-amp's offset is ~6mV will this a problem for my ldo? How to lower the op-amp offset? my op-amp is only one stage op-amp which using high swing cascode current mirror as load current. thanks in advance :)
hello can you tell me why in many publications (each one i read) ldo dropout condidions are treated for TEMP=125 and the lowest Vin? I did simulations and worst case is for ss and TEMP=-40 and the lowest Vin In this case Vth is the highest so voltage headroom is the worst. regards
hello i need a current source for ldo's opamp. Vin changes from 1.3 to 3.3 so i need something voltage independent. simple use of resistor to create a reference current is very inacurrate. what can i use with so high voltage change?
I have designed ldo with 0.3V dropout. But in trasient voltage variation my ckt works fine for rising load current but during falling load current ! O/P is not settling for lower cap values (giving oscillations) and with higher cap values the fall time is very high then rise time ? why ? what is going wrong ?
Hi, I have designed an ldo with output voltage of 5V. The regulation seems fine till i decrease the load resistance below 100 ohms. The ldo should be capable of driving 150mA. But with low resistance to drive that high current my ldo is going out of regulation. Can someone explain me the reason. thanx in (...)
Power Electronic is using a Power transistor to work under high current or voltage, there are a lot of Power Electronic product in the world, such as ldo, LED drivers , audio amp & moto drivers etc. I don't know what you mean " close to electronic than Power". But the most diff product I think is audio amp, such Class D,T etc. If you are (...)