86 Threads found on edaboard.com: Mirror Current Op Amp
To Analog IC helper :
I recently design OP-amp , and got very big issue with current mirror in OP-amp circuit. Please download the circuit ( that is attachment) , Within the white square, that is the simple current mirror to provider current for different (...)
Analog IC Design and Layout :: 20.04.2005 04:44 :: wesspower :: Replies: 1 :: Views: 732
the only way is reduce the mirror's current.using high gain stage .
Analog IC Design and Layout :: 05.02.2005 21:04 :: cetc1525 :: Replies: 3 :: Views: 951
The Bandgap circuit can generate the internal PTAT current. Using current mirror architecture, this PTAT current can mirror to any value for biasing.
In most of application, designers will add a external Op-amp and resistor to convert voltage to current (as the image) (...)
Analog Circuit Design :: 11.05.2005 05:39 :: Question :: Replies: 5 :: Views: 2765
it is true that Q10 mirror Q8, but Q8 mirror what? why not only use Q7's common source output drive Q10?
Analog Circuit Design :: 02.12.2005 01:38 :: mists :: Replies: 11 :: Views: 695
hi, i have a few questions here please help, thanks in advance.
Please check this 1 stage op-amp:
1) simulation gives differential voltage gain Av=36dB which is too far away from hand-calculation 58dB, why ?
NOTE : with current mirror load, Av=gm (Ron || Rop), gm depends on Ic (≈56uA) which is gm=0.00215 ; Ron & Rop depands (...)
Analog Circuit Design :: 20.01.2006 07:21 :: chu :: Replies: 2 :: Views: 887
is there any possibility of improving Slew rate of a op-amp IC 741
By Using operational mirror amplifier, thhe slew rate is almost null. You can ask your analog teacher for this. It is not taught commonly but is very esay to implement.
Operational mirror amplifier is technique so you can use the same IC 741.
Electronic Elementary Questions :: 12.04.2006 22:15 :: jiveshgovil :: Replies: 6 :: Views: 2783
Hi, i'm a Italian student on electronic engineering.With other two friend,we are making a project that it consists in a op-amp with current mirror wide-swing cascode.This project is my first project.The particularitity of thi project is that we must use the gm/id methodologieand we don't known the first pass to starting this project!!
Analog Circuit Design :: 13.07.2006 09:46 :: cretu :: Replies: 10 :: Views: 1729
Your cmfb will make your output node stable. In your simple CMFB, the output voltage will depend on you adjustment on the size of transistor. It may get the Vdd/2, but it needs time and patience.
A better way to get a certain output common voltage, you'd better use a feedback network to amplifer the difference between your current Voc and the V
Analog IC Design and Layout :: 12.07.2006 22:57 :: Material :: Replies: 1 :: Views: 513
i have an op-amp which is used for LDO. the Vref is about 1.16V.
At that point, my op-amp's offset is ~6mV will this a problem for my LDO?
How to lower the op-amp offset? my op-amp is only one stage op-amp which using high swing cascode current mirror as load (...)
Analog Circuit Design :: 06.09.2006 22:08 :: alicia8283 :: Replies: 3 :: Views: 2427
For differential output opamps you need cmfb circuit to set the output common mode. For single ended opamps its set by the current mirror load.
About designing opamps to get rail to rail output .... its simply not possible. The best output dynamic range you can get from an output stage is by using an (...)
Analog Circuit Design :: 13.05.2007 14:46 :: fredflinstone :: Replies: 1 :: Views: 586
So i am wondering the current flows into Mb1 equals the current coming out of M9 since Mb1 and M9 forms a current mirror. however, the book says that when designing this op-amp, allows 330ua flows into Mb1 and 3mA flows into M9. my question is how can you have 330 ua flows into Mb1 while having 3mA flows (...)
Analog Circuit Design :: 11.08.2007 01:52 :: firsttimedesigning :: Replies: 5 :: Views: 853
If you use current mirror, then change the W/L of the current mirror in the sencond stage. The current bias circuit should not change. I think.
Analog Circuit Design :: 25.08.2007 03:16 :: RDRyan :: Replies: 4 :: Views: 445
Do u mean increase the bias current?
Or, u increase the bias voltage from your nmos based current mirror?
Analog Circuit Design :: 02.11.2007 22:48 :: firstname.lastname@example.org :: Replies: 4 :: Views: 616
How to improve the linearity of an op-amp.I think there should be
many methods,but I don't know it clearly.
Anyone can show me the methods used commonly?
Or some paper about it.
i think 2 ways can help:
1. Through negative feedback, it provide more linearity to the opamp.
2. Make sure when design
Analog Circuit Design :: 29.11.2007 19:26 :: surianova :: Replies: 4 :: Views: 1055
I want to design a low voltage current mode class AB amplifier. I need some papers about this topic. Would you please help me?
Please useing folded cascode floating current mirror classAB op amp.
Analog Circuit Design :: 08.05.2008 23:18 :: northeast1 :: Replies: 2 :: Views: 675
the most convential two stage op amp can do, first stage is with current mirror, and the second stage is common source with current mirror load.
Analog Circuit Design :: 17.05.2008 02:29 :: tia_design :: Replies: 13 :: Views: 1127
Good day everybody,
I'm using National Instrument's Multisim 10 to design and simulate a fully differntial telescopic op amp. The design picture, design details and simulation files are associated.
The problem is that I can't get the NMOS telesdcopic transistors to work in saturation, the entire biasing voltage is distributed on the PMOS trans
Analog Circuit Design :: 16.06.2009 06:39 :: aliloooz :: Replies: 1 :: Views: 1104
One thing is, to bypass current-mirror gate nodes to their
reference rail (vV+ or V-) to ensure that the bias is as
supply-rejecting as practical. V+ pulls directly on the
front end and common-mode current deviation on the
diff pair pushes through the whole rest of the part.
Analog Circuit Design :: 04.11.2010 17:20 :: dick_freebird :: Replies: 2 :: Views: 987
Yes. It's very odd.
Given Vcc is 12V. Then, voltage over R800 would be around 10.5V.
Also you got Ib>Ic is obvious - assuming you're talking about Q800. I'll guess you could solve this by adding a resistor in between vcc and Q850.
I haven't seen a current mirror like that before.
Software Problems, Hints and Reviews :: 30.05.2011 15:04 :: Prototyp_V1.0 :: Replies: 6 :: Views: 574
i am trying to design an op amp with subthreshold operation. May i know which MOS are allowed operates in subthreshold region? the input pair? the active load? what about folded cascode configuration? As far as i know, the current mirror must be in saturation to ensure accurate copying.
Analog IC Design and Layout :: 06.06.2011 08:06 :: erikl :: Replies: 5 :: Views: 1361
can anyone enlighten me what kind of op-amp I can use to set a node with a specific voltage? Like the pic below, I want node 5 to be 0.9V, and P1, P2 are current mirror, but general opamp with no feed back can not give me a satisfied voltage for node 4 and is not stable sometimes also. 62088
Analog Circuit Design :: 29.09.2011 16:55 :: malden :: Replies: 2 :: Views: 297
1. What is the function of the circuit as I circled in red? mirror current generation.
As far as I know, we need to provide a constant gm at the rail to rail input stage but I really have no idea why this circuit can make it.
R2R inputs usually -- i.e. without additional circui
Analog Circuit Design :: 22.11.2011 08:58 :: erikl :: Replies: 3 :: Views: 505
yes I want to simiulate the internal circuit of 741 op amp. but I don't know which specifications for transistors shoulde be used?
I use some kinde of transistor which is in pspice simulator, but the bias point of op amp doesn't work properly.for example current mirrror dosen't mirror (...)
Software Problems, Hints and Reviews :: 09.07.2012 12:20 :: mohadese.nozari :: Replies: 3 :: Views: 1343
for the attached traditional op-amp, I am simulating the output maximum levels from the DC simulation by sweeping one one of the inputs. I have found that the minimum output is zero and the maximum is VDD.
Here is my question, for the output it is ok to approach VDD when the current in M6 is zero. but for M7 the current is (...)
Analog IC Design and Layout :: 17.01.2013 10:38 :: Junus2012 :: Replies: 3 :: Views: 298
The buffer of d2a circuit need to provide swing capability. The buffer was actually a 2 stage OP-amp, with unity gain feedback.
The first stage was very typical differential N-pair with Pmos current mirror load. The 2nd stage was a little wierd.
It is consists of one push-pull stage with a current source. The circuit (...)
Analog IC Design and Layout :: 11.01.2004 20:13 :: mike_bihan :: Replies: 8 :: Views: 2401
The current sources are just like those used in op amp design. One way is to use a mirror circuit to drive the capacitor and make the variable current source driving the mirror. This will change the slope of the voltage on the capacitor. You can use a comparator to detect when the capacitor reaches the (...)
Hobby Circuits and Small Projects Problems :: 01.11.2004 22:15 :: flatulent :: Replies: 6 :: Views: 2974
First of all your schematic is wrong. You should mirror 2 NMOS an resistor of current reference. The NMOS of start up circuit should very long-channel transistor, the W/L of this transistor is defined by specs on Icc of this current reference (especially for highest Vcc value). W/L start up PMOS transistors is not so important.
Analog Circuit Design :: 12.11.2004 21:46 :: Fom :: Replies: 7 :: Views: 1154
low power opamp or current mirror you have to bias the mos in weak region than strong region.
Analog Circuit Design :: 16.09.2005 05:27 :: schwang1970 :: Replies: 7 :: Views: 1707
Hi jiachang ,
It is very good to use to have cascode mirror for this precise replication .even though it is a feeble difference due to diff in VDS between actual and mirrored (or finite op impedance ) it may be noteworthy in some cases. I think cascode with more stacks(>2) can multiply the op. resistance thereby bringing down the differenc
Analog Circuit Design :: 12.01.2006 00:14 :: venkateshr :: Replies: 3 :: Views: 1016
what's the role of the current mirror in the amplifier?
it converts differential output to single-ended and allows to achieve higher gain in one stage opamp. what else?
current mirror is used to supply current (or mirror current) to all (...)
Analog IC Design and Layout :: 20.04.2006 18:16 :: ahmad_abdulghany :: Replies: 4 :: Views: 1420
I think that the closed loop gain would be equal 2. This doesn't mean that Opamp's gain is 2.
Also, a 1G Gain Bandwidth product is weigh too high. Most probably it will be impossible ( but can't be 100% sure of that ).
I think for the given speed and input range, the telescopic is not a very good candidate ( very limited i/p range ). Perhaps
Analog Circuit Design :: 26.06.2006 17:21 :: elbadry :: Replies: 16 :: Views: 1316
The current mirror is the most simple current amplifier.
Analog Circuit Design :: 06.07.2006 03:03 :: jerryzhao :: Replies: 2 :: Views: 720
well thank you all for replying...
Vdd = 2V and Vss = -2V
thank you for the suggestion, currently, i am trying to design a two stage op-amp.
first stage is a differentail amplifier with PMOS current mirror load. second stage is a common source amplifier. (...)
Analog Circuit Design :: 30.09.2007 22:52 :: firsttimedesigning :: Replies: 11 :: Views: 2867
If the differential amp is completely balanced and no offset, the currents through T3 and T4 are the same and it is supposed that the drain voltage of T3 is equal to that of T4, which is also it's gate voltage. The gate of T5 is connected to the drain of T3 which is virtually the gate of T4 - something like a current mirror (...)
Analog Circuit Design :: 02.01.2009 01:56 :: sutapanaki :: Replies: 5 :: Views: 1994
Question 1: The impedance seen in N towards M7 is approx. 1/gm7. If M6 and M7 are identical, the gain from the gate of M6 to the drain of M7 is -gm6/gm7 which is considered to be close to -1.
Question 2: On page 357 the author describes the effect of the pole(s) of the current mirror as an overall zero in the input-output transfer
Analog IC Design and Layout :: 07.02.2009 00:44 :: ict_eda :: Replies: 1 :: Views: 887
If not then how can i acheive a stable current source? current mirror?
Analog Circuit Design :: 05.06.2009 12:42 :: Hitotsu :: Replies: 4 :: Views: 1019
"nmos input why do we always use pmos input in the second stage or vice-versa" the second input mirror the current of the first stage's output in DC point.
"Can't we use nmos or pmos input in both the stages." I never do it. maybe it work, but DC point setup is not easy. The input and output range may be limited. you can try and simulate it.
Analog Circuit Design :: 02.07.2009 07:09 :: jerryzhao :: Replies: 1 :: Views: 1424
i m making the layout of op-amp in which there is a current sour ce... can someone tell me is there anyway exept using current mirror ckt to implement it on layout... thanks..
Electronic Elementary Questions :: 26.01.2010 06:43 :: lokesh garg :: Replies: 0 :: Views: 361
The circuit is attached below. It is a common current sense amplifier architecture.
For example if a want my output range to be 0-3.3V (the voltage across R2), the circuit will stop working for input voltages (I mean the rail voltage on which I'm measuring current) lower than 3.5V since there is no more Vds for the (...)
Analog Circuit Design :: 31.05.2010 21:27 :: Mad I.D. :: Replies: 2 :: Views: 648
Ok, let's get more focused on your needs. With the technology, supply and specs you have, your main problem is with the input common mode voltage. For the input stage you've chosen, when the input CM voltage is 0.5, you'll most probably put the tail current source into ohmic region which will reduce the tail current and worsen the common-mode reje
Analog Circuit Design :: 20.08.2011 15:27 :: sutapanaki :: Replies: 10 :: Views: 780
I measured the node voltage of A and got 1.08V(50mv difference from
1.13v due to process variation?!). So I think this curcuit's operating point
50mV error is on the very high side. I would assume either the bandgap is poorly designed or the opamp has a huge offset.
The "Output voltage"
Analog IC Design and Layout :: 28.12.2011 02:39 :: checkmate :: Replies: 8 :: Views: 681
I do not see why you want to constrain the L a priori,
when it is the easiest way to get decent Zout in a current
With high Zout your gain will depend hugely on Zload.
Analog Circuit Design :: 22.02.2012 15:25 :: dick_freebird :: Replies: 5 :: Views: 675
I don't think that current mirrors are suitable to amplify or buffer a small photo current, if noise is critical.
Analog Circuit Design :: 15.03.2012 16:04 :: FvM :: Replies: 4 :: Views: 538
There's no reasonable purpose of a pull-up resistor at LD. I guess, you didn't think about it thoroughly. A pull-down resistor without concurrent current sources will allow an LM358 output voltage effectively down to zero (< 1 mV).
P.S.: Your output resistance calculations are missing the point. The datasheet clearly shows about 800 mV residual
Analog Circuit Design :: 26.10.2012 10:26 :: FvM :: Replies: 9 :: Views: 275
Could you please help me with this circuit. it is current mirror fully differential amplifier. I would ask your suggestion about the CMFB and how to connect it with this circuit, ist possible to connect the control from the CMFB to IBias ?
Analog IC Design and Layout :: 15.11.2012 11:52 :: Junus2012 :: Replies: 8 :: Views: 747
You can cancel input current offset (for BJT amplif) with a simple current mirror
Analog IC Design and Layout :: 14.05.2004 06:39 :: mrm :: Replies: 6 :: Views: 1646
i m final yr student and doing a 2 stage cmos opamp design. i have completed the design of the individual stages of the opamp like the current mirror, diffamp etc, i want to know how to join/interface these two stages .i.e the op amp uses the amplifiers which r (...)
Analog Circuit Design :: 01.07.2005 14:04 :: shankar :: Replies: 1 :: Views: 565
would like to ask if anyone has links/references to basic of ota, especially current-mirror ota used in the bioamplifier (like the one used by harrison in his paper for neural amplifier)
one of the thing i want to know is the gain bandwidth equation, which i was told as gm/CL. but when it is compared to two stage op (...)
Analog Circuit Design :: 16.02.2006 12:15 :: puyeng :: Replies: 1 :: Views: 552
Here I think the classic thinks applies well. For MOS, do it by current mirror (definitely mismatch comes into picture). For BJT/HBT-> a bit confusing, better is an one ended output....can get some idea from "Grey...Meyer..." book (four author. This is available in this EDABoard...
hope would help you....
Analog Circuit Design :: 24.02.2006 09:21 :: sankudey :: Replies: 8 :: Views: 1228
One significant implementation could be use with a CMOS current mirror Opamp with the output stage being a regulated cascode current mirror. Gains of about 100 dB have been achieved with this configuration.
Analog Circuit Design :: 01.05.2006 07:26 :: Vamsi Mocherla :: Replies: 3 :: Views: 2453