1000 Threads found on edaboard.com: Mirror Current Op Amp
To Analog IC helper :
I recently design OP-amp , and got very big issue with current mirror in OP-amp circuit. Please download the circuit ( that is attachment) , Within the white square, that is the simple current mirror to provider current for different (...)
Analog IC Design and Layout :: 04-20-2005 04:44 :: wesspower :: Replies: 1 :: Views: 829
Hi, i'm a Italian student on electronic engineering.With other two friend,we are making a project that it consists in a op-amp with current mirror wide-swing cascode.This project is my first project.The particularitity of thi project is that we must use the gm/id methodologieand we don't known the first pass to starting this project!!
Analog Circuit Design :: 07-13-2006 09:46 :: cretu :: Replies: 10 :: Views: 1870
the only way is reduce the mirror's current.using high gain stage .
Analog IC Design and Layout :: 02-05-2005 21:04 :: cetc1525 :: Replies: 3 :: Views: 1056
The Bandgap circuit can generate the internal PTAT current. Using current mirror architecture, this PTAT current can mirror to any value for biasing.
In most of application, designers will add a external Op-amp and resistor to convert voltage to current (as the image) (...)
Analog Circuit Design :: 05-11-2005 05:39 :: Question :: Replies: 5 :: Views: 2871
So i am wondering the current flows into Mb1 equals the current coming out of M9 since Mb1 and M9 forms a current mirror. however, the book says that when designing this op-amp, allows 330ua flows into Mb1 and 3mA flows into M9. my question is how can you have 330 ua flows into Mb1 while having 3mA flows (...)
Analog Circuit Design :: 08-11-2007 01:52 :: firsttimedesigning :: Replies: 5 :: Views: 924
which would be the best way to simulate a current to voltage op-amp using Pspice. Any one have any ideals that could help or web sites that give good information ao this subject. thanks
Analog Circuit Design :: 03-16-2005 11:07 :: clansman :: Replies: 1 :: Views: 1234
it is true that Q10 mirror Q8, but Q8 mirror what? why not only use Q7's common source output drive Q10?
Analog Circuit Design :: 12-02-2005 01:38 :: mists :: Replies: 11 :: Views: 755
hi, i have a few questions here please help, thanks in advance.
Please check this 1 stage op-amp:
1) simulation gives differential voltage gain Av=36dB which is too far away from hand-calculation 58dB, why ?
NOTE : with current mirror load, Av=gm (Ron || Rop), gm depends on Ic (≈56uA) which is gm=0.00215 ; Ron & Rop depands (...)
Analog Circuit Design :: 01-20-2006 07:21 :: chu :: Replies: 2 :: Views: 1009
How the Op-amp can be designed as a current amplifier?
For ex. i have an Op-amp OP213 whose max short circuit current Isc=30mA. If I want to draw 300mA from this Op-amp, what sort of configuration should I use?
Firstly it is possible or not? If yes then pls explain how .....If no then (...)
Analog Circuit Design :: 02-23-2006 14:24 :: somf0872 :: Replies: 1 :: Views: 5717
is there any possibility of improving Slew rate of a op-amp IC 741
By Using operational mirror amplifier, thhe slew rate is almost null. You can ask your analog teacher for this. It is not taught commonly but is very esay to implement.
Operational mirror amplifier is technique so you can use the same IC 741.
Electronic Elementary Questions :: 04-12-2006 22:15 :: jiveshgovil :: Replies: 6 :: Views: 3191
Your cmfb will make your output node stable. In your simple CMFB, the output voltage will depend on you adjustment on the size of transistor. It may get the Vdd/2, but it needs time and patience.
A better way to get a certain output common voltage, you'd better use a feedback network to amplifer the difference between your current Voc and the V
Analog IC Design and Layout :: 07-12-2006 22:57 :: Material :: Replies: 1 :: Views: 580
i have an op-amp which is used for LDO. the Vref is about 1.16V.
At that point, my op-amp's offset is ~6mV will this a problem for my LDO?
How to lower the op-amp offset? my op-amp is only one stage op-amp which using high swing cascode current mirror as load (...)
Analog Circuit Design :: 09-06-2006 22:08 :: alicia8283 :: Replies: 3 :: Views: 2793
hi i am a beginner here.
My op amp design involved 2 current source. How can i apply that current source when i do the layout and fabrication?
Analog Circuit Design :: 01-18-2007 22:57 :: dewabantura :: Replies: 4 :: Views: 1217
Hi, does anyone has suggetions on the op-amp ICs to use if I required it to have a output current drive of 0.1 A with a dual input rail-to-rail supply of +/- 5V?
I tried looking for one to fit my specs but to no valid.
Analog Circuit Design :: 05-03-2007 14:29 :: awsikar :: Replies: 6 :: Views: 1355
For differential output opamps you need cmfb circuit to set the output common mode. For single ended opamps its set by the current mirror load.
About designing opamps to get rail to rail output .... its simply not possible. The best output dynamic range you can get from an output stage is by using an (...)
Analog Circuit Design :: 05-13-2007 14:46 :: fredflinstone :: Replies: 1 :: Views: 655
If you use current mirror, then change the W/L of the current mirror in the sencond stage. The current bias circuit should not change. I think.
Analog Circuit Design :: 08-25-2007 03:16 :: RDRyan :: Replies: 4 :: Views: 534
Do u mean increase the bias current?
Or, u increase the bias voltage from your nmos based current mirror?
Analog Circuit Design :: 11-02-2007 22:48 :: email@example.com :: Replies: 4 :: Views: 714
How to improve the linearity of an op-amp.I think there should be
many methods,but I don't know it clearly.
Anyone can show me the methods used commonly?
Or some paper about it.
i think 2 ways can help:
1. Through negative feedback, it provide more linearity to the opamp.
2. Make sure when design
Analog Circuit Design :: 11-29-2007 19:26 :: surianova :: Replies: 4 :: Views: 1448
the most convential two stage op amp can do, first stage is with current mirror, and the second stage is common source with current mirror load.
Analog Circuit Design :: 05-17-2008 02:29 :: tia_design :: Replies: 13 :: Views: 1213
In basic opamp structure,i am having some trouble understanding the current direction.
I have attached an image, where both current flows from GND to the inverting and non-inverting terminal.
My question is why? for the non-inverting terminal, the current should flow towards gnd(lower potential).
Electronic Elementary Questions :: 11-21-2008 16:07 :: INS-ANI :: Replies: 6 :: Views: 1139
Good day everybody,
I'm using National Instrument's Multisim 10 to design and simulate a fully differntial telescopic op amp. The design picture, design details and simulation files are associated.
The problem is that I can't get the NMOS telesdcopic transistors to work in saturation, the entire biasing voltage is distributed on the PMOS trans
Analog Circuit Design :: 06-16-2009 06:39 :: aliloooz :: Replies: 1 :: Views: 1240
the problem is : how to raise 30 % direct current (DC) gain in op-amp circuit ?
Do we need to do something at R9 & R10 to improve it?
or depend on the Vcc?
Analog IC Design and Layout :: 07-30-2009 23:36 :: fendyfazeli :: Replies: 5 :: Views: 2259
I am using current feedback op amp to realize voltage limiter.
why the output is only -10mv to -80mv?
Analog Circuit Design :: 10-19-2009 22:24 :: EDA_hg81 :: Replies: 6 :: Views: 5347
I have a problem with this schematic:
I want to measure the current through a conductor with TALEMA AC1015 sensor. The signal from the sensor is amplified with op amp MC1458 in an inversor configuration.
The schematic works like this:
current: 3.8A a.c. 50Hz output: 1.93V a.c.
current: 7.4A a.c. 50Hz (...)
Electronic Elementary Questions :: 01-31-2010 14:57 :: rares.tohanean :: Replies: 3 :: Views: 3282
I need Op-amp to be a current source of around 1ma-20mA. from the net found some LMC6462, unfortunately i do not have the parts, any possible replacement?
also if it will be digitally controlled, any basic suggestion on how to do this? maybe PWM?
Analog Circuit Design :: 03-29-2010 06:34 :: leoren_tm :: Replies: 6 :: Views: 1925
One thing is, to bypass current-mirror gate nodes to their
reference rail (vV+ or V-) to ensure that the bias is as
supply-rejecting as practical. V+ pulls directly on the
front end and common-mode current deviation on the
diff pair pushes through the whole rest of the part.
Analog Circuit Design :: 11-04-2010 17:20 :: dick_freebird :: Replies: 2 :: Views: 1138
I need help with my design of single rail op-amp to detect current.
With input range of 1V to 12V into the op-amp to detect current not exceeding 3V.
As I know that I require higher voltage than 12V to power up the op-amp if the input to the op-amp is 12V. How am I able to operate the
Microcontrollers :: 01-17-2011 02:12 :: JazzRei :: Replies: 9 :: Views: 1652
I would want to understand why my input current of the minus input of my op amp vary with the resistor MCT sensor... ? For me input current of the op amp is composed of an offset current and a bias current : I-=Ibias-Ioffset/2, and this current should be a (...)
Analog Circuit Design :: 02-04-2011 04:48 :: glias :: Replies: 1 :: Views: 751
Yes. It's very odd.
Given Vcc is 12V. Then, voltage over R800 would be around 10.5V.
Also you got Ib>Ic is obvious - assuming you're talking about Q800. I'll guess you could solve this by adding a resistor in between vcc and Q850.
I haven't seen a current mirror like that before.
Software Problems, Hints and Reviews :: 05-30-2011 15:04 :: Prototyp_V1.0 :: Replies: 6 :: Views: 644
i am trying to design an op amp with subthreshold operation. May i know which MOS are allowed operates in subthreshold region? the input pair? the active load? what about folded cascode configuration? As far as i know, the current mirror must be in saturation to ensure accurate copying.
Analog IC Design and Layout :: 06-06-2011 08:06 :: erikl :: Replies: 5 :: Views: 1636
Hi, i am working with a simple IC741 and determining its current drive capability (o/p current) with a resistive load..provided (inverting ampr, negativ feedback with a gain of 10).between the op-amp output and the load (resistor) there is a series resistance (Rs). can anybody explain me by what way of altering the load and (...)
Analog Circuit Design :: 09-25-2011 09:31 :: cjron :: Replies: 4 :: Views: 471
can anyone enlighten me what kind of op-amp I can use to set a node with a specific voltage? Like the pic below, I want node 5 to be 0.9V, and P1, P2 are current mirror, but general opamp with no feed back can not give me a satisfied voltage for node 4 and is not stable sometimes also. 62088
Analog Circuit Design :: 09-29-2011 16:55 :: malden :: Replies: 2 :: Views: 360
i am trying to understand the basics of operational amplifier.
I`m a little confused with the concept of bias it the current need to active the inverting and the non-inverting terminals of the op-amp ????
or the current which is present when op-amp has zero biasing (currents which (...)
Electronic Elementary Questions :: 01-29-2012 08:01 :: kdg007 :: Replies: 5 :: Views: 822
Can any one help me out in understanding the difference between Supply current (ICC) and Bias current(IIB+ , IIB-) of Op amp?
On What factors Supply current of Op amp depends? Can Supply current can be called as Bias current?
Electronic Elementary Questions :: 05-22-2012 05:23 :: baig_anora :: Replies: 2 :: Views: 387
I need Ic number of op amp like in the image
but the input current up to 3A. I know LM324 but the input current is not enough. thanks in advance.
Analog Circuit Design :: 05-31-2012 15:16 :: #MAAM# :: Replies: 4 :: Views: 352
I m designing a 2-stage miller op-amp. here in this op-amp M3-M4 are working as a current buffer. what is the effect of this current buffer on the amplifier gain? how does it affects the current distibution in the circuit? say if an o/p current of I8=800nA is flowing in the (...)
Analog IC Design and Layout :: 06-18-2012 12:03 :: priyanka.aj :: Replies: 1 :: Views: 513
yes I want to simiulate the internal circuit of 741 op amp. but I don't know which specifications for transistors shoulde be used?
I use some kinde of transistor which is in pspice simulator, but the bias point of op amp doesn't work properly.for example current mirrror dosen't mirror (...)
Software Problems, Hints and Reviews :: 07-09-2012 12:20 :: mohadese.nozari :: Replies: 3 :: Views: 1628
Below is the current source ckt for thermistor( RL).
I am using the current source(approx 0.1mA) to excite the thermistor(RL). RL = 100 Ohm .When I check (+) terminal of opamp with oscilloscope ,the waveform found oscillating (Saw tooth like waveform, mean value 2.5V DC but pk value 4.0V ).
Analog Circuit Design :: 08-11-2012 05:53 :: arup :: Replies: 7 :: Views: 668
Anyone has the experience of measuring maximum output current of an op amp? Thanks in advance
Analog Circuit Design :: 09-20-2012 02:27 :: spinner12 :: Replies: 2 :: Views: 473
An ideal op-amp is voltage controlled voltage source or Voltage controlled current source?
Thanks a lot.
Analog Circuit Design :: 09-29-2012 03:12 :: SherlockBenedict :: Replies: 1 :: Views: 1968
I see many experienced analog designers that impedance match the non-inverting and the inverting pins when an op-amp is internally compensated. Do most of you guys do this too? If not, what are Rules of Thumb for handling op-amps that compensate bias currents internally?
Analog Circuit Design :: 12-15-2012 13:28 :: lasteem1 :: Replies: 2 :: Views: 377
for the attached traditional op-amp, I am simulating the output maximum levels from the DC simulation by sweeping one one of the inputs. I have found that the minimum output is zero and the maximum is VDD.
Here is my question, for the output it is ok to approach VDD when the current in M6 is zero. but for M7 the current is (...)
Analog IC Design and Layout :: 01-17-2013 10:38 :: Junus2012 :: Replies: 3 :: Views: 457
I need to convert a little schematic for a current source with an op amp and a BJT to a block diagram in order to study the stability.
My concern is that I don't know how to model the transistor in the feedback loop.
Does someone know how I can do ?
Analog Circuit Design :: 02-26-2013 05:48 :: Sebastie :: Replies: 0 :: Views: 242
And also Every technology has a Appropriate length for exact current mirroring.. for example tsmc40 has minimum length of "700nm" to mirror exact current....(i dont know for this pdk)..
Hi there, can you explain more in details about the sentence I quote from your reply? I'm very interested. (...)
Analog IC Design and Layout :: 10-29-2013 16:25 :: mirrobbs :: Replies: 7 :: Views: 365
how to analyze this circuit Op amp?
1-op amp 2 stage with CASCODE COMPENSATION.
2-first stage : telescopic cascode.
3-next stage : class AB current mirror.
Analog Circuit Design :: 11-15-2013 15:38 :: foxlab :: Replies: 1 :: Views: 447
Howdo I figure out how to make one of these work? I know the basics and formula, but things like Offset Voltage and voltage drops across various places confuse me. How do I know how to choose the bias voltage and the sense resistor value? How do I know what kind of op-amp to use in the first place? What are the tolerances? What happens i
Electronic Elementary Questions :: 11-20-2013 13:05 :: MD68 :: Replies: 1 :: Views: 211
I am going to use a common Op-amp configured as a differential op-amp high-side and low side current sensing to measure an AC load. The output of the op-amp go into the ADC of a MCU.
I would like to ask is the offset voltage rating of the Op-amp important when selecting the Op-amp? Can I (...)
Analog Circuit Design :: 04-16-2014 00:22 :: Gary Poon :: Replies: 0 :: Views: 223
I have little problem in our practical examination. Its about the OP-amp input bais current.
In our collage they connect capacitor in shunt with resistor. SO what is use of that capacitor
Electronic Elementary Questions :: 04-21-2014 06:35 :: shubham varne :: Replies: 0 :: Views: 159
I need to use an op amp in transimpedance configuration to detect an current pulse in photodiode.
The current pulse has a pulse width of 2us and period of 100us, how should I choose a proper op amp, and how to design the feedback resistor and capacitor？
Analog Circuit Design :: 07-06-2014 02:08 :: simbaliya :: Replies: 3 :: Views: 334
Its a 'current mirror' , look at this pdf for a description.
Analog IC Design and Layout :: 07-11-2014 13:35 :: esp1 :: Replies: 3 :: Views: 301