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26 Threads found on edaboard.com: **Monte Carlo Mean**

hi guys
im looking forward a way for doing **monte** **carlo** simulation for current steering DACs . does any body know any way for doing it in cadence .

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 02-27-2017 11:39 :: mehdibn :: Replies: **3** :: Views: **959**

Hi guys,
After running some **monte** **carlo** simulations in a current mirror, I would like to compute the amount of mismatch in percentage.
To compute the mismatch in percentage I should do it taking into account the (3 sigma * std. deviation) or just the std. deviation?
For example I see people saying that the current mirror has 5% of mismatc

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 10-04-2016 18:51 :: CAMALEAO :: Replies: **4** :: Views: **672**

I have designed a low pass filter in cadence with cutoff frequency 50Hz.
However when I do a **monte** **carlo** analysis it gives **mean** cutoff frequency as 80Hz.
How is this possible.??
All the parameters are same??
Please help me to understand this.
Thanks

Analog Circuit Design :: 03-17-2016 11:16 :: richaphy :: Replies: **10** :: Views: **758**

When I run **monte** **carlo** simulation it shows,
Warning 369: COMMAND ignored: No LOT or DEV specification found
ERROR 26: No analysis specified
what does it **mean**?

Analog Circuit Design :: 05-27-2015 09:50 :: jayapraksh :: Replies: **2** :: Views: **770**

Be neither obsessive nor a procrastinator, so to speak. Rather, be timely. Do it ATAP. So soon or late also has factors of probability of being wrong from tolerances and exceptions to **mean**, thus the precise algorithm must consider all potential variances and the probabilities to yield an optimal schedule. **monte** **carlo** simuations often test (...)

PLD, SPLD, GAL, CPLD, FPGA Design :: 05-11-2015 15:57 :: SunnySkyguy :: Replies: **2** :: Views: **1007**

Hi everyone,
I want to do **monte** **carlo** analysis of a circuit by varying its device width . I am writing the syntax as given below :
.param W1=gauss(2.072u,0.2,1)
and the using sweep **monte**=30 in ac analysis. Everything is fine upto this point but when I rewrite the syntax as below
.param W1=gauss(2.072u,0.0667,3)
then the (...)

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 10-01-2014 19:11 :: zulqar :: Replies: **4** :: Views: **1240**

--- > What is sigma value ?
See here.
The sigma value (σ) corresponds to the standard deviation of a distribution (or the square root of the variance). In **monte** **carlo** simulations the σ value often

Analog Circuit Design :: 09-22-2014 15:05 :: erikl :: Replies: **3** :: Views: **1747**

Can anyone please help me explain the **monte** **carlo** results for a SPDT switch?

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 05-02-2014 01:28 :: arifsobhan :: Replies: **3** :: Views: **993**

I guess you've seen the Cādence **monte** **carlo** simulation tutorial?
Try the method described with nmos_rgfac on pp. 9..13 with nmos_toxfac and pmos_toxfac as multipliers for toxe.
BTW: toxp is the physical gate oxide thickness, toxe the electrical gate oxide thickness, adapted to best

Analog Circuit Design :: 07-23-2013 13:15 :: erikl :: Replies: **8** :: Views: **1660**

When performing **monte** **carlo** using HSPICE, does the order in which transistor devices are listed in the netlist, matter?
I am working with certain 90nm design kit where changing the ordering of transistor instances is showing different results. But if that's true,
is it a fault/feature of HSPICE or design kit??
Thanks
-Niranjan

ASIC Design Methodologies and Tools (Digital) :: 05-25-2013 22:55 :: nirankul2003 :: Replies: **2** :: Views: **1308**

AA, all
how can i make **monte** **carlo** to get mismatch in capacitor , i need to know standard deviation and **mean** from histogram or from where?

Analog Circuit Design :: 01-21-2013 22:51 :: amr hema :: Replies: **2** :: Views: **551**

Hello all,
I am in the process of designing a new DAC and am having trouble with determining the transistor sizes for a specific matching. I need to size them to have a 7bit linearity with only a 4bit DAC. Now normally at the end I would do a transient simulation and look at the FFT but this takes to long everytime when trying to find the corre

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 01-09-2013 12:43 :: jgk2004 :: Replies: **8** :: Views: **1203**

Hello everyone,
I wish to perform a **monte** **carlo** analysis on my circuit. I have set up the simulator and it works as long as I give it, in ADE, the variables´ **mean** and std.devs.
Still I do not understand how to make the simulator take the parameters that are given by the foundry (TSMC) and are in the design kit.
I want to simulate the (...)

Analog Circuit Design :: 06-01-2012 09:32 :: giangriff :: Replies: **1** :: Views: **614**

Hi all,
I want to find the complexity of problems with no closed form solution. Is it possible?
For example, finding the intersection area of N circles has a non closed form solution. It is solved using **monte** **carlo** methods.
Is possible to find the complexity of solution. With complexity i **mean** O(N) expression.
I can run different (...)

Mathematics and Physics :: 08-16-2011 00:30 :: wajahat :: Replies: **0** :: Views: **634**

Hi all,
How many the number of **monte** **carlo** iteration need perform to have result exactly?
.TRAN 1n 10n SWEEP **monte**=val
That **mean** val = ?
Can anybody answer ?
Thanks,
Val=100 is ok if you don't need high accuracy

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 12-30-2010 09:38 :: pfd001 :: Replies: **2** :: Views: **835**

hello everybody ,
i want to run **monte** **carlo** simulation manually
so what i **mean** is just use the simulator for generating the random parameters value , and i will run the simulation myself
can somebody tell me if it's possible
many thanks in advance

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 09-01-2010 21:16 :: MohEllayali :: Replies: **4** :: Views: **799**

Corners determine the **mean** value, while **monte**-**carlo** gives the standard deviation.
There are 3 main types of corners, mainly PVT as you mentioned, of which you can trim only for process corners. So an example of a corner is NMOS FAST, PMOS SLOW, VDD=VDD(nom)*0.9 and T=-40C. To get the worst corner, you will need up to 2^N, or 16 corner (...)

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 08-08-2010 05:57 :: checkmate :: Replies: **6** :: Views: **3528**

Dear all,
I am designing trimming bandgap reference. The trimming range, or trimming bit is identified from the 6-sigma **monte** **carlo** simulation. What I **mean** is, the worst case of **monte** **carlo** simulation results can be trimming fallen within the spec.
but how can I guarantee the tempco meet the spec (...)

Analog Circuit Design :: 07-06-2010 01:24 :: hk2004 :: Replies: **1** :: Views: **754**

Hello THUNDERRr,
You **mean** to say Regression analysis of Circuit in AWR Microwave Office (MWO)...
Then Yes, it possible to do Regression Analysis using Parameter sweeps of variables or Statistical analysis using **monte** **carlo** Simulations (Yield Analysis)...
There are couple of Examples on Swept Variable analysis & Yield analysis using (...)

RF, Microwave, Antennas and Optics :: 12-19-2009 05:23 :: Manjunatha_hv :: Replies: **2** :: Views: **902**

hi guys,
what 's the op for an AC simulation?
I **mean**, when using spectre for ac simulation,
different op **mean**s different gm etc. so before ac, simulator must know exact DC right?
then
another question, if I use **monte**-**carlo** ac simulation,
will the dc varies as **monte**-**carlo** ac runs? (...)

Software Problems, Hints and Reviews :: 07-21-2009 08:44 :: bigworm :: Replies: **2** :: Views: **1204**

You can simulate with **monte** **carlo**.

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 04-04-2009 03:28 :: leo_o2 :: Replies: **4** :: Views: **2076**

Hey guys,
Can anyone tell me as to how we can simulate the following equation: C = log (1+KP/N)
Where P/N = SNR = 0db.
The graphs should look something like this (only for Rayleigh fading):

Digital communication :: 11-14-2007 16:17 :: prince_capri :: Replies: **4** :: Views: **3216**

Dear all,
In the figure, I have some questions about **monte** **carlo**.
In the figure 1,
(1)param L=gauss(8u,0.01,2)
Is σ 0.01*8u? Is L at red region?
In the figure 2,
(2)param dvtn=gauss(0,0.01,2) *nmos VTHO=0.5455576+dvtn
If **mean** is zero, is σ 0*0.01 or 1*0.01?

Analog Circuit Design :: 07-12-2006 03:39 :: ilter :: Replies: **3** :: Views: **1160**

I would like to find the taps weights of a dfe adaptive equalizer. I would like to use **monte** **carlo** simulation of the least **mean** square algorithm to estimate equalizer tap weights.
Do you have any code to do that?

Digital Signal Processing :: 05-23-2006 09:30 :: iopa :: Replies: **0** :: Views: **1091**

Hi ALL,
I want to know how the **monte** **carlo** analysis work, is there any document which illustrate this topic ??
Thanks in advance

Analog Circuit Design :: 10-25-2005 13:58 :: eng_Semi :: Replies: **5** :: Views: **2829**

Well **monte** **carlo** analysis is not for switching waveforms. One very good technique is to do a parametric sweep of one of the inputs at the **mean** level and then run a transient solution. Another good technique is to use the .NODESET/.FORCE option and run a DC analysis. By using the NODESET option, you can always maintain whatever voltage you (...)

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 04-19-2005 06:43 :: Vamsi Mocherla :: Replies: **3** :: Views: **2167**

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ring generator | gsm ics | pll fpga | semiconductor simulation | sim antenna | arm usb lcd | amplifier model | spectre current | opc server | pic software program