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I'm trying to see the logic utilization in spartan3 for building a 4-input comparator.
for case A>B, if the input is 2bit, the logic utilization is one 4-input LUT. Pretty obvious.
A0,A1,B0,B1 inputs and one Y output.
But for 4-input comparator, the logic utilization is three 4-input LUTs and mux. But Why???????????????
PLD, SPLD, GAL, CPLD, FPGA Design :: 06-17-2012 09:16 :: hithesh123 :: Replies: 12 :: Views: 1637
I have made a good 4:1 mux it can take to 2 bits of opcode input. The opcodes are 00,01,10 and 11. I call it the No Failure Multiplexor or NF mux for short. If you want it and cannot copy and paste it email me at
NOTE : THIS IS NOT A JOKE. IT IS A REAL
Miscellaneous Engineering :: 08-26-2009 17:54 :: forest201 :: Replies: 0 :: Views: 966