15 Threads found on edaboard.com: Opamp Power Dissipation
I am designing an 10 Bit 200 MSPS Pipeline ADC in TSMC 65nm process.
Just finished the design of first stage opamp. It uses the "Folded Cascode Gain Boosted opamp" architecture. The supply voltage is 3.3V. The total current drawn from the supply is around 90mA. Therefore, the first stage opamp itself dissipating around 300mW (3.3 *
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 06-16-2014 05:39 :: jebaspaul :: Replies: 0 :: Views: 385
Can someone suggest opamps that can provide 100mA continuously at 5 volt or more? Slew rate is not a concern.
Analog Circuit Design :: 11-07-2013 10:33 :: asp87 :: Replies: 3 :: Views: 312
The maximum supply current is 4.5mA per opamp. There are two opamps. The total supply is 30V.
Then the dissipation with no load is 4.5mA x 30V x 2= 0.27W.
The thermal resistance of the tiny surface-mount case is 190 degrees C per W so if the ambient is 30 degrees then the chip is at 81.3 degrees C which is warm but not too hot. A load makes (...)
Analog Circuit Design :: 02-28-2013 19:07 :: Audioguru :: Replies: 28 :: Views: 3105
I have to design a CMOS opamp at 135 nm Technology.........
I have the circuit diagrams and parameters at 180 nm . I have to simulate it on TANNER EDA.
I have model file for 135nm :
* MOSIS WAFER ACCEPTANCE TESTS
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 01-17-2012 04:46 :: Karandeep :: Replies: 17 :: Views: 1519
I have a 6v 1.3A battery and I want an opamp that works with it. I want the opamp tp draw as much current as it can from the battery.
My question is, which part of an opamp datasheet should i be looking at in order to meet my needs. I think i understand the the voltage part but i don't understand how you can tell how much current will be (...)
Elementary Electronic Questions :: 01-12-2011 21:09 :: kavkav :: Replies: 15 :: Views: 618
I need to design an output stage (third stage) for a two-stage compensated opamp. I have gone through some related papers and text. After reading them, I have built-up some interpretations:
1. The main design specifications whilst designing the o/p stage are a) output swing, b) power dissipation (or efficiency), c) linearity (or
Analog Circuit Design :: 05-24-2010 08:17 :: samiran_dam :: Replies: 0 :: Views: 537
I would need some help in a power dissipation issue.
I have a power opamp that works in a non-inverting topology.
Here some data:
- Single Supply = 12V
- Output voltage = 6+3*sin(wt) V
- Output current = 100*sin(wt + alfa) mA
w = angular frequency
t = time
alfa = angle between current and (...)
Analog Circuit Design :: 10-04-2009 02:49 :: berni80 :: Replies: 1 :: Views: 977
Suppose I am using an opamp as an amplifier with +12V as pos and _12 as neg supply. Consider supply current as 3mA at no load.How will i calculate the power dissipation. Next is the opamp configuration as precision rectifier with same supply and current. Will there be any change in power (...)
Analog Circuit Design :: 07-07-2010 08:26 :: akhilmukund :: Replies: 3 :: Views: 2194
In a conventional two stage opamp operating in weak inversion for ultra low power dissipation, does all transistors operate in weak inversion OR only differential pair transistor and tail transistor operate in weak inversion.
Plz, Need help!
Analog Circuit Design :: 01-25-2008 01:34 :: amitjagtap :: Replies: 7 :: Views: 3123
The gain, BW and o/p swing u refer is for opamp or integrator??
You need to know the specifications such as the power supply voltage rail, power dissipation for determine the opamp structure. :D
Analog Circuit Design :: 06-07-2007 01:37 :: YingChow :: Replies: 3 :: Views: 2602
"PMOS body connected to drain..."
why not connected to power or source?
can anybody share to me a CMOS opamp net list roughly meeting the following specifications.
DC gain >75dB
Unity-gain frequency > 150MHz
Phase margin at unity-gain frequency > 65o
Slew rate > 50V/μsec
PMOS body connected to drain and
Analog Circuit Design :: 04-08-2006 05:26 :: swicap :: Replies: 4 :: Views: 3625
Put a zero-volt voltage source in series with all the op-amp stages and then measure the currents through them.
This will give you power per stage - by V*I (of course) and is more useful, than just finding the total power for the opamp.
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 05-27-2005 17:11 :: uncle_urfi :: Replies: 3 :: Views: 1061
I have designed an two stage opamp with following performance
open loop gain: 87.1dB
unity gain frequency :35.3MHz
Phase Margin: 64
Is there any other test i have missed?
By the way, the slew rate is quite low, how can i improved it?
Analog Circuit Design :: 01-21-2005 22:05 :: sisching :: Replies: 3 :: Views: 1625
Due the application of dc feedback, I think a typical differential stage opamp would serve the purpose. If the frequency of application is high, a cascode stage differential opamp would serve the purpose
Analog Circuit Design :: 11-23-2004 02:30 :: hrkhari :: Replies: 12 :: Views: 2601
It all depend on the specification that you are looking for. Most of the time the process we use to design a opamp will be the crucial point as it will limit the design parameters and the rest as others mentioned in the post.
Analog Circuit Design :: 04-23-2007 10:02 :: suria3 :: Replies: 8 :: Views: 1989