Search Engine

94 Threads found on Opamp Suggestion
Hi, I am interested in designing a low power low voltage opamp, can anybody give me any suggestion? Thank in advance.
Look they have something. How they call them: opamp evaluation boards I think. See their application notes which have schematics in them.
Any suggestion on papers or links on designing op-amp for sallen-key filter to be used on baseband. Also papers and links on designing programmable gain amplifiers and limiters for RSSI. Thanks
I have completed a 2 stage opamp with GBW of 330MHz, DCgain=60dB, GM=20dB and PM=54 degree. I found that i can't go beyond 3rd order unity gain 200MHz SallenKey LowPassFilter since the o/p signal is out of phase. Can anyone give any comment/suggestion/solution? I see 300MHz bandwidth. What opamp did you use?
I have a circuit like in the attachment. What i want to do is adding 2.5V offset to the input signal. But the rms value of the output is a bit lower than input but there is no clamping on the signal. What may be the problem? My 2.5V reference? or other thing. I use this opamp:
How to layout the cascode opamp on RAZAVI'S book ,figure 9.48? Any suggestion? In figure 9.48, (1) put the M1,M2 ,M1P,M2P in the middle of M9 ,M10 ,M3, M4, M5, M6, M7, M8 (2)put the M1, M2 ,M1P,M2P just in the left or right of M3 to M10 which one will be better?
find the document ,which my give u come idea hot to characterise the opamp regards, vijay
Anybody done before & any good suggestion or related documents?
Dear all, I need you guys suggestion. What kind of circuit need the higher CMRR or PSRR of an opamp? Plz tell me if you know, thanks!!!
Hwo to bias opamp which is used to force two nodes voltage eaual? If we use PTAT current generated by bandgap core itself, another loop is created. The stability is also a problem? How to bias this opamp?
So I have designed an Op-Amp that has a gain of 80dB and its phase margin is about 45 degrees so it is stable. the problem is that when i hooked it up with a capacitor and resistor to make it operate as an integrator, it always has this small bump at the beginning. When the input voltage is changed at 500ns it also has another bump (please see atta
Hi friends, i have to design an opamp in 130nm umc foundry process.This is going to be used in a dual slope adc for the integrator and comparator part .The inputs to this opamp will be biomedical signals like eeg or ecg which have frequencies like from few hertz to 100-200 hz. The supply voltage is 1.2v and i require a opamp with atleast (...)
Hi, please find below a small example : *Non-Inverting Amplifier .param voffset=0.1 lot=50% r1 5 3 100k r2 5 0 1k c1 3 0 1p yopa opamp2 pin : 2 5 3 0 param: p1=1e3 p2=5e8 gain=5000 voff=voffset vin1 2 0 sin (0 1 100) .tran 0 7 .plot tran v(2) v(3) .option display_carlo .end
Does anybody know how to do the AC simulation for fully-differential OTA with sc-cmfb? This is what I have heard: 1) use vcvs to model the sc-cmfb; however, what should I put the gain for the vcvs? A very large value? Please look at the attachment for the schematic. 2) Use the pac (in spectre) Thanks a lot.
Hi, In an opamp, I want to increase the bandwidth without increasing the current. I think I should increase the gm of the output transistors whose drain constitutes the high impedance node of the circuit and the dominant pole. I do so but the bandwidth does not increase. What is wrong with the procedure? Any suggestion? Thanks.
Hi this bandgap the startup circuit works fine untill I apply an offset (vos) to the opamp. With a positive offset, all it's ok but witha negative one the loop becomes open! Why does it happen? Any suggestion to avoid this bad behavior, please? TIA, CBs
hi,friends: I'm a new to analog IC design. anyone can tell me: what is the basic of about the analog IC design? before someone told me the opamp is the baisc in analog IC like the CPU in digital IC, is it ture for you??????
Hi I'm designing a telescopic opamp for wimax adc aplication. Important Spec Bandwidth : >> 40Mhz Gain : 50dB PM : 60 70 degree I have no problem getting the gain and the PM...but to get the 40MHz bandwidth quite a problem. All calculation are done user 1st order formula....Can help me with more accurate calculation. My model use Bs
In most applications which use any popular Op-Amp IC, the currents In and Ip will be very small currents. These are input currents and the designer might not even bother to calculate any terms which include these currents. They would probably use a low or zero value for Rp and maybe a low value for R1 so that these current
Hi, I ve created a Pspice schematics of a 3 opamp instrumentation amplifier. I need to plot the CMRR for the there any direct way to plot the same ie CMRR Versus Frequency.?
Dear ALL, My question is centered on ADC's of microprocessors connected to sensors via ADC's. When do we need an opamp? and Why do we need it, is it a buffer? let's say I have a PIC or 8051 microcontroller ADC connected to a sensor that needs opamp, what opamps are suitable? Best Regards, Basel
Hello, I was wondering if it is feasible to build a 741 opamp out of discrete components. The internal schematic is clear and no double emitter transistors used. What I need is a suggestion for the transistors that could be used. (this will be used in a sweep circuit)
The gain of an OP-amp is very high so can be set to any reasonable value with external components, so ANY op-amp would do. If you are after some very special parameters such as low noise, very low drift, high frequency response funny DC supplies, then a specific device would need to be bought. I like these for general purpose :- [
What is the high level of step impulse for testing slew rate of an opamp? Unity gain topology, supply 1.8V. May I put step from 0V to 1.8V with rise edge of 1ps, or there is some way to exactly calculate levels?
I want to calculate the gain In your circuit, gain=1 , due to full negative feedback. If you want to measure gain & phase vs. frequency, use your opamp in open loop configuration. There are a lot of threads about this in the forum. E.g. search for "Middlebrook" .
Anytime I read something like the header "opamp behaves strangely" I first look at the power supply - and very often single supply is used without knowing the consequences (proper biasing).
Hey guys, I have a three-stage LDO. The simulation result is in attached (without compensation). Looks like the dominant pole is only about 19 Hz, the second pole is around 90 kHz. UGB freq = 640 kHz. The dominant pole is too low. And the DC gain is too high. I tried to do a miller compensation. It turns out the dominant pole moves t
Hello, I will check the dac and opamps today. In my little project user will use always these 9 switches like that first switch group will push the user to select one of these 3D, 4D, 5D second switch group will push the user to select one of these 8Kv- 14Kv- 16Kv and so on totally there will be 9 switch and operator will use these switches to
Hi, What things should be considered when design audio codec with sigma delta ADC ? What is the requirement of the opamp for example ? thanks vita
hi , thanks for ur reply. i'm using hspice and i still don get from ur answer that how can i actually configure the opamp in order to ge the CMRR vs Freq? hmm...maybe u can show me in netlist or a diagram. thanks in advance. regards smart
suggestion of VVV is good. U can use a power opamp if you need more current. Some power opamps are LM675, L465A, OPA547T/F.
There is no such a thing like "minimum input voltage". opamps are linear devices and will amplify any input voltage. However, because of temperature drifts, bla, bla ,bla .. with opamps like 741 one should avoid using them with voltages below "certain" level. I wouldn't use 741 for amplifying signals below,say, 1mV. Try to employ more contemporary
What a lot of people do when they need a single ended to differential swing is that, they use another opamp with gain =-1 in addition to your main amp. This would generate an equal and opposite swing.
First of all, check that the opamp does not actually short or overload the negative rail. Check there is no mistake in the wiring. Also, do you have good decoupling on the 555? Other than, that, the circuit should work.
my suggestion, 1. check the ideal opamp first, run AC , TRAN with step response and feedback including. 2. check the opamp u designed carefully, do (1) again 3. check ur non-overlapped clock, especially the sequence of clocks
For basic design understanding, can refer to: Analog IC design - Johns/Martin To further more on opamp, can refer to: Introduction to CMOS OP-AMPs and comparators - Roubik Gregorian
For the SC gain stage(*2) in pipeline ADC,I used ideal switch and ideal opamp.But if input is 1v peak sin wave, the SNR of output is just 60dB.But if input sin wave is 0.5V, the ouput is above 90dB. Is that correct?I used this SC gain stage in pipeline stage,I can't get expected SNR.But I can't increase SNR for this circuit.Anyone can give me sugg
hi, im aware of simulating inductor using opamp. do capacitors can be done same way?
I'm using Miller capacitance sample and hold cirucit. For an 8-bit resolution my sample circuit must be able to detect and hold at least 12mV. Right now I'm only able to make the resolution to 0.2V @ 200mV. Can I get ant suggestion of how can i achive my targeted resolution. Thanks in Advance. Best Regards Syukri[/quo
Hi all, Can anyone please give some suggestion on what type of opamp is suitable to be build following these specifications: 1) VCC=3 to 5V 2) Rail to rail input and output stage. D-range is about VCC-0.4V for input and output. 3) THD < 0.1% for 20Hz, 1kHZ and 25kHz. 4.) GBW > 1MHz 5.) Open loop gain , 50~80dB Thx. Regards, CW
well, that's really helpfull but unfortunately my application need the stability measurement, since i want to measure a 1uV change in the input from 10 ton load cell. I'm using Sigma delta ltc2440 now and it's quite unstabil, and i look at the same circuit that can handle the sensor. It only uses dual slope adc with 2 opamp and 1 cmos multiplexer
why you need that opamp with such spec? if no high gain, it means that it should have very high bandwidth? i think it is very hard to design such a opamp with 0.18 tech. regards!
I am designing a 10bit pipeline ADC. The schematic simulation shows that the odd harmonics are too large(especially,the third harmonic is 55dB). Can anybody give me some suggestion on how to find the reason? Thanks. sampling swith opamp (settling time) reference (settling time)
Depending on how your integrator is build up! I suggest it is built with an opamp. Then simple short with a switch between the cap instead of the output.
Hi Guys, I'm desigining an high gain opamp for a application in a feedback loop like in common mode feedback circuit. Since, this opamp is in the feedback loop, which is a low frequency application, my question is what is the value in dB I should design for both the CMRR and PSRR of this opamp. Is it the PSRR need to be at least 50dB at (...)
the opamp in the bandgap circuit just fixes two voltages the same , it will have little effect on the TC of output voltage. so, I think the large TC comes from your res ratio, it is no well setted. the ratio of the res have large effect of TC.
Dear all, I have some problem on high speed buffer design, in which a big cap is used to get a low impedance at high frequency. what bother me is that there is a drift in transient simulation from DC value of reference output. I try to minimize the output impedance of opamp to reduce the drift,but there is still some difference between dynami
My suggestion is to use PWM technique, are you familiar with some kind of a micro controller, or you want a design with simple analog components like opamp, comparator? The pwm modulator frequency should be about 20kHz, the output will have a LC filter to filter the carrier (20Khz) frequency out.
are you obliged to use the pic? no,but i cnt use opamp because i can't use -ve input voltage...u got other suggestion? Added after 2 minutes: Dear Desertkids, well to use PIC for to conversion of analog signals, you'll have to use a PIC with the capability of
Hi ricopt, I also need to measure slew rate, output swing, cmrr, psrr, offset of opamp in Mentor Graphics. Can u give me any suggestion?