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12 Threads found on edaboard.com: Open Collector Protection
Hello! I am using microcontroller to collect data from car. I have input channels for digital and analog sensors and I would need to protect those channels in some way. Digital channels should accept both, DHE and inductive sensor outputs, so the input circuit should be capable to trigger approx 100Vpp sine-wave with +2V offset and with no modi
Hello! I am using microcontroller to collect data from car. I have input channels for digital and analog sensors and I would need to protect those channels in some way. Digital channels should accept both, DHE and inductive sensor outputs, so the input circuit should be capable to trigger approx 100Vpp sine-wave with +2V offset and with no modi
Hello! I have spent last couple of days using Multisim and Google and trying to design input circuit to microcontroller (AVR) with following requirements: 1. Incoming signals: TTL-level pulse sensor, open-collector Hall-sensor and automotive switch-type input (+13,6V - open circuit) 2. Frequency range would be from discrete input (...)
One clamp diode can use for the open drain structure pin. And the ESD current path of this pin to VDD is first from pin to vss, then from vss to vdd.
The caliper uses a very small battery. I would try to avoid using the battery power to run the rest of the circuitry if at all possible. Check if caliper put out power on line (1.55 Volt = silver oxide battey ?) via (MOS) transistor or pullup or have simple open collector output. If caliper feeds power out to datalin
If you use an old computer, parallel data line will have something like TTL 374 latch with ≈2.5mA sourcing and ≈20mA sinking capabilities; controll lines inputs will be of TTL 244 type and outputs TTL 05 OC (open collector) with ≈4.7kΩ pullups .. In the above case I can't see any reason why you should add any pullups at all
Hello In some pull up configurations (open collector/drain), if you connect more than one of these configurations to the same supply, you connect capacitor between collector/drain (signal line) and GND (aka Wired AND/OR). This is mainly for signal integrity and higher noise immunity. lets say it is easy and cheap way of (...)
Assuming you are using a 3V3 Micro, these chips normally have an open collector output pin? Feed your pwm output into an unused input pin, then translate those levels to your open collector pin, which you have pulled up to 10 Volts. Job Done!
I dont understand the data sheet is the OC alarm output goes 1 when collector current reach 27A?(when N1 and N2 open) if so why my circuit gives alarm when it reach 1A? pls help Thx for advance Data sheet=> 64623
The best test circuit to use is the one in the data sheet in Figure 2. Are you running a parametric test of just trying to find a use for it? Parametric testing requires sampling equipment fast enough to measure the signal rise and fall times and possibly a special testing jig to ensure the input and output impedance are known and matched. If y
Clamp diodes on CMOS are connected to all inputs and to Vdd & Vss. The Schottky diode drop protects the CMOS inputs from see a voltage outside the rails by this diode drop. The only risk is that ESD has been known to be in the order of pico seconds and if the ESD rise time is faster than that of the diode, the diode will not protect. Th
hello, Do you think the below implementation of a NAND latch is OK? .....or will the circuit blow up if the "forbiddden" condition ever occurs? NAND latch giving latching overvoltage shutdown protection ...the open collector comparator "MCP65R" comparator feeds into the latch, and the comparator trip