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Hi guys, Looking for good document/book on how to decide a good pcb stackup. -kib
Do you have any impedance controlled traces ??? If you do (DDR, Diff pair, SDR, PCIe etc) then you will need to specify the size of prepreg layers to set the distance from your reference plane or ask the pcb company for the best fit for your application and then set your track widths to match the desired impedance. A pcb company will general
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How do I choose which layers will be core or prepreg in my pcb stackup? I'm going to use 6 copper layers.
I would need advice in deciding what pcb stackup to use for my project. I have two voltages (5V and 3.3V) and some LVDS (differential signals). Is this a good stackup? Layer 1: Components, small routing near ICs. I have also some signals that need to be 100 ohm (differential impedance). These I would like to route on the top layer (...)
Hi all, As far i know, balanced pcb stackup follows 1. signal layer should have adjacent power/ground layers 2. from center of the board(cross-sectional) top and bottom should have same amount or weight of copper and the di-electrics. If i am deviated from the correct concept please guide me ***In my case, we are going for the 2 dif
Hello friends, I've designed a lot of pcbs over years, including some simple multilayer (4-6 layers), but never faced problems to dig deep into stacking fabric (let manufacturer handle). But now we have to make a pcb with some diff. sensitive traces @100...200Mbps, so we need to calculate impedances involved. I'll summarize the questions for kin
try tool from saturn Saturn pcb Design - pcb Design Service | Electronic Engineering it wont give you fulll layer stackup analysis but help you to calculate impedance,spacing etc.
You need to ask your pcb manufacturer.
I'm Looking For You'r Opinion About The Ideal pcb stackup Layers For Multilayer High Speed Design. i Would like To use At Least Half Of The Layers For Signals, But I Would Also Would Like To Keep Clock Layer Isolated, I also Would Preffer To Locate Voltage Plane Near To GND Layer. I'll Apretiate You'r Contribution !
Hi, The things which should concern you in high speed pcb design are signal integrity, EMI, EMC. A lot of books are available for download in e-books upload/download section. Here is one , look for other related stuff. /pisoiu
Hello All, I have small Project and I need some help from you guys My project is to design High speed pcb to connect CPU to couple of external memories. If you were me how could you defines: - pcb stackup (2,4,6,8 layers!!!). - Trace design based on I/O driver!!! how!! what!!. - pcb terminations for these signals: (...)
Hello, Recently I received a pcb stackup design from my client that I feel the design is very odd, but I'm not sure whether the design can be fabricated or not? please refer in the following enquiries: 1) Client intended to use 3 layers(1 copper foil +1 core with 1oz of copper at top and bottom) to form a lamination prior to generate the buri
You can see the details from the following link:
Hi, im using a roger material RO4350B for pcb design.Can someone tell me how to properly specify the pcb material in ADS 2009. Thanks
How to select impedance during pcb stackup? Thanks!
Can LVDS be used for say traveling 1 foot across a cable to another pcb or should it only be used within a signal pcb or pcb stackup?
Hi everyone, I was wondering which tool is best for model pcb stack up and able to do simulation on the model. We are talking about multiple layer. I would like to be able to change the dielectric constant and dissipate factor for core a on each layer. An example of layout is: Plane Gnd Core Signal Cu pre-preg plane Gnd I want to f
Hi Michael, I would suggest you to read following topics on pcb Stack Design: In pcb design you use even numbers of pcb layers. Although you can use separate layer for every voltage and ground but this approach will increase cost of the pcb manufacturing. These days embedded processo
According to the small board size, a thinner pcb stackup like 1 mm has the advantage of allowing smaller via drills. Check the available technology of your pcb manufacturer.
The current is only flowing at the via outside due to the skin effect Vias are of course acting as a discontinuity for a transmission line. Depending on the pcb stackup and design rules, they act either capacitive or inductive. The via dimensions can be tuned to minimum reflection factor, at least i
I added all the layer's thickness together and found it is less than 0.06 inch Yes, thats's reasonable, it's a pretty standard pcb stackup. What's your question with it? For tolerances, the manufaturer will refer to IPC standards. You can expect a tolerance of about 10% for finished thickness. If you need higher accuracy, e.g.
hello guys, Is there any effect of chip footprint on pcb with Impedance? What i means is, if the chip footprint is changes, in term of dimension (length), is this changes will affect the impedance performance? Or, the impedance is based on trace design only? please advice, thanks. :-)
Hi all, In what cases I need to make an antipad by myself? As I understood, it appears automatically on unrelated layers of pcb stackup. Am I right? Veronika
Is it essential having your engineers know about the cost first then to run the designs? They should know about costs. Firstly they need to know the specification and product requirements. If you know the requirements, a pcb manufacturer can suggest a suitable pcb stackup. E.g. 5 mil pcb structure size is moderate industry
Hello, I'm working with Altium Designer 10. In my pcb stackup I added a GND plane. I would like to edit the shape of this GND plane but I didn't found any option in Altium to help me make this, whereas, I could make this easly when I use a polygon plane? Does someone manage to edit the shape of a GND plane with AD10? Regards,
If I have a six layer LED driver pcb of 6 layers, 2 oz copper on every layer.......... what is the approx. cost difference of having different inter layer thicknesses as follows... 0.4mm thickness interleaving board sections 0.3mm thickness interleaving board sections 0.2mm thickness interleaving board sections
What's the pcb stackup? Basic microstrip (double side plated Rogers)? Do you actually see losses or might it be mismatch? (Consistency of S11 and S21 measurements)
Iam very new to pcb design & i want to know, is there any rule for pcb layer stackup, like, is it necessary for a signal layers need an adjacent plane layer etc.
Hi, What is the difference between a Core & PrePreg in pcb layer stackup. Any application note on this will be highly helpful. Thanks
How to set the board stackup thickness and layer in allegro pcb editor. Regards, vignesh.G
I'm looking to find a way or any info to do a 24 layers pcb with a thickness of 0.065" (65mil). Any tools or software to confirm if it's possible to acheive this ?
The pcb designer's bible ... Coombs' Printed Circuits Handbook Try Amazon Good starting point for material etc.
The number of layers in a pcb design depends on the design complexity and also maximum thickness you can have .
you can mesure your own pcb dielectric using this way: 1-obtain the 2 layer pcbof area A 2- connect two wire in two side of pcb 3-using LCR meter and mesure the value of capacitance 4- using the formula of parrallel plate capasitor C=e0erA/d
Hello I would like some recommendation from users on an econimical RF simulator for pcb layout. I have a requirement to simulate / optimise / match a F or SMA connector input to the input of MOPLL device for satellite 900-2200MHz but I have not ever done this before. The mechanical constraints will mean a distance from centre pin of conne
i am using 62 mil pcb thickness and 1 oz copper on each layer can u tell me what should be the thickness of substrate inbetween the layers. thanks in advance
Do you have an Idea on how pcb design company charge their customers? what are the basis? example, board size, number of components, density of components with respect to size, SMT...
HIGH SPEED pcb DESIGN by Lee W. Ritchey & James C. Blankenhorn ISBN: 1-882812 04-2 (Sorry I do not have a pdf to send you.)
Dear all, If a pcb board, 2 mils of core with 1oz copper at the top and bottom, is it a good board to be fabricated? will it be caused warpage during etching for inner layer process? if yes, what is the real factor caused to warpage? How to solve this problems? For my understanding, if the thickness of copper is greater than thickness of core
Hi Does anyone have any idea of the cost of using blind vias on a pcb? cheers Jon
Hi I am designing an 8 layer board with the following stackup 1 signal 2 ground 3 signal 4 power 5 power 6 signal 7 ground 8 signal I need to have the signal layer as 50 ohmn impedance. How do I find out what the pcb manufacturer will use for the thickness of the layers so that I can calculate my track widths and spacing to give
In general, keep your stackup symmetrical from the middle of the stackup, this will reduce bow and twist. If possible put a power and ground plane together, this will act as a capacitor. For stackup dimensions you have to contact the pcb manufacturer, he can tell you wich materials (and thicknesses) are on stock. You (...)
Hi, I also wanted to ask a question about core/prepreg stuff. If I design a several layer pcb can I define the stack in whatever way I want? I mean, is the order: top-prepreg-mid1-core-mid2-prepreg-bottom equivalent to: top-core-mid1-prepreg-mid2-core-bottom ? Can the controlled impedance tracks be made between the copper layers with cor
Hi Friends, Please guide me to understanding of EMI / EMC issues related to pcb layout design. what are the measures need to take care of in the layout. Thanks in Advance. Manikandan
pcb SI is initiated from inside the pcb editor program. Its' a pule down, but it doesn't actually say "pcb SI". From the pcb editor, you have to set up all the nets, power/grounds, stackup, components, etc, then initiate the program, and it will then launch sig explorer with the extracted topology (...)
Hi pcb Friends, What are the guideline we have to implement in this pcb. In this board i used Blackfin532 IC 176pTQFP, Sdram,Flash,ethernet controller ,audio codec,USb host ,Magnetics,Lan and some more Pheripherals. I planned to do in 6 layer can any one suggest spacing rules for this and also good stackup. impedance 90 ohms and (...)
Hi pcb newbie`s, To become a professional in pcb one should have Good knowledge on the following points : 1.Drawing Schematics in different tools/pkgs (ALtium,PADS, Allegro,..etc) 2.Understanding the errors and procedure of rectifications 3.Board Details understanding 4.Datasheet understanding for footprint creation 5.Footprint Cr
Hi there, I need SATA pcb layouts in GERBER, PDF or any CAD software. I am intending to add SATA HDD support to my OMAP via USB 2.0 interface. I am planning to use JM20339, but the manufacturer lacks of the pcb guidelines. I would be thankful if you send/point to me any source of information about the specifics of the SATA design. Than
Hi Bert, Every layouter has exact to calculate the cooper with for hes pcb, but in accordance of the pcb producer to know what kind of cores & so stuckups are possible for you. Than, if you can have i.e. 0.25mm core, you will calculate a cooper width of some tenth of mm for 100Ohm/ca.2x of that for 50ohm, & with these width have you to route all