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pci and ahb , ahb vhdl , amba ahb , verilog ahb
5 Threads found on edaboard.com: Pci Ahb
Hi I have a question about opencores pci to wishbone bridge. In the test bench, the designers have set the pci clock period to 30ns (33 MHz) and similarly set the clock period of wishbone clock to 10ns (100 MHz) to test it. From this it makes sense because pci bus has a frequency of 33 MHz and wishbone bus has a frequency of 100 MHz. (...)
hi all i want to interface pci with ahb bus....help me out in finding a verilog code for ahb to pci bridge
Hi Guys I am familiar with AMBA ahb ,wishbone etc(On chip buses) buses and now for my project I am going to use pci. Can you please give me comparison of both (pci and AMBA) ie Can we use pci as on chip bus if not whats reason +++ Thanks Tassadaq Hussain
This question is related to pci protocol. Now I meet a question about pci-ahb IP system integration application. One of the pci-ahb IP feature is supporting multifunction device up to 8 functions. In the IP RTL code, if the IP supports different number of functions, it generate different number of (...)
hi, Although i've used pci monitor before (written by Phoenix), and i've searched the web for long time, i'm still rather confused about how to write a qualified ahb Monitor to be embedded in the current SoC system based on ahb bus. First i've little experience of using OVL(OpenVErilog library) and of using systemVerilog to perform the (...)