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18 Threads found on edaboard.com: Pci Dma
In my design, I want to send the data from pci Express to AXI dma IP core provided by xilinx. Can I directly take the stream out of the pci Express and feed it to the stream input of AXI dma IP? I ask this because, in the kintex 7 board, there are special clock and reset pins for pciE and the system clock (...)
can any one explain what is the difference between dma and Central dma. In the PC world, I believe "central" dma refers to a single dma controller chip (8237 I seem to recall) that is used for all dma transfers on the bus not performed by the CPU. In a pci system, due to the bandwidth of (...)
Hi, I have implemented pci express core with dma engine (XAPP1052) in a Virtex-6 FPGA. Everything in transmit section (FPGA to PC) is ok and I receive all of the transmitted data in PC software correctly. But there is a problem in receive engine of FPGA while doing dma from computer to FPGA. After a lot of experiments finally I realized (...)
is there someone know how to program dma operations in linux on x86 platform? few days ago ,i got a mission to finish a pci device driver in linux,the destination board is x86.now,i've already finish the basic pci register read & write and it works well.i get the BAR0 physical address through APIs (...)
Hi I have designed a new pci card and I can transfer my data to RAM using dma burst transfer but I have a bigger problem I need to write my data directly to HDD without using CPU time. On the other hand I need to send packets with the destination address of SATA to wirte to SATA interface. I want to know if North bridge on motherboard have a deco
hi , can anyone explain me in what way either axi stream protocol or axi 4 is preferable?. Also is there any bandwidth improvement if using axi stream protocol or just reducing interconnects?? regards venkatesh
sir it is my final year project to implement single lane pci express core and to design fpga board for this, I have idea of vhdl programming. I want to know from where should i start to understand pci express protocol and to run its core successfully in fpga board and perform communinication between Host pc and FPGA. Please provide relevant materia
Hi all, I need a data capturing card with a sampling rate of atleast one mega samples per second and pci bus. It should be possible to store the data acquired to hard disk by dma. I need 30 signals to be processed simultaneously and all the channels at 1 MHz simultaneously. Has anyone used such a DAS except NI make? Any recommendations? T
Can anybody give me suggestion? about the dma on the pci core and linux driver functions used to access the pci device also plz. Thanks in advance
Dear friends, In an AMBA bus system pci is a device attached on the bus.I read that few people are using single channel dma as a part of the pci component for master memory transaction.Why is this single Channel dma is used as a part of the pci.One end of the pci is connected to the host (...)
it's the question puzzled me ,what's the difference between pci dma and pci burst ? who can tell me?3x
plz tell me method to design a dma Added after 1 minutes: actully my situation is that i want to access a dma from a mpc which is on pci bus and i have to access a memory which is on local bus and i am usin a plb for this. Added after 48 seconds: hi
There are no masters or slaves with pcie. pcie is a point to point protocol, where transmits and receives can occur at the same time. "dma" occurs when the downstream device transmits read or write cycles to the upstream port, i.e. without initiation from the host CPU. Usually there is a "dma" queue structure in (...)
The fast solution is use a pci controller like PLX 9054. It support dma transfer. It's about 20 E/piece. A good book from pci is :"pci system architecture" by Tom Shanley defer
Hi I need to know where i could found, information about the max speed that i could adquire by interrupt method or dma i dont know who is best. Using a ISA card or pci for realtime adquitition under W2K or NT with 1Msample or less. thxs
Hi, You can find lots of instant pci-> isa converters inside of old 486dx ibm machines.Computer repair services have many bridges like this. Cheers, Analyzer.
Hi ALL! ------------- pci CORE - v6.2: the next generation pci IP Core from PLDA! Features: Compliant with pci specification rev. 2.3 Added 66MHz support for STRATIX and CYCLONE devices from ALTERA Redesigned 4-channel dma engine with dma chaining capability and interleaved operation Enhanced (...)
Hi yechen, 1)If your design includes popular components like pci, dma, DSP, RISC etc. you better buy them. There are many availabe cores you can choose from, and they are tested by suckers who bought these cores before you did! Using IP cores will dramatically reduce your verification effort (and design of course). You can ask your ASIC vendor