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20 Threads found on edaboard.com: Pin Plan
1. Can we connect one of the internal signal layer pcb track (or internal plane) to a though-hole component pin (let's a pin of a 2.54 mm pitch pin header) without using vias to transfer the inner routing track to top or bottom layers ? At first sight there should not have any impediment on doing this, but in layout e
That comparator does appear to have a push-pull output. You need a new plan. ;-) You can't connect the comparator common to the ground that you are disconnecting from the battery negative terminal. If you want the battery to power the comparators then you need to connect pin 4 directly to the negative terminal of the battery.
I now want to place the input/output signals perfectly into a particular pin as described in my circuit plan. I am using Spartan-3 XC3S400, XIlinx ISE 14.7. As shown in figures below, I need the pin 67, 65, 64 to be assigned for particular scalar ports. 104987 However, when I use my planahead 14.7 is shows me a layout
My plan is modifying a Xbox 360 console(phat), to add a extra SATA port by desoldering the internal Hdd connector, i have the pin out of voltages but i would like to solder headers from the pin out on the motherboard (the right side as that is the pin out for SATA data) and solder a header socket to a small circuit board and (...)
How about a 14 pin DIL plug (like an IC) with two pins cut off. Frank
Where should I connect those connectors? Could I just remove them? You can just delete the "J" connectors, unless you plan to use connectors... then they might be ok to keep. Example, keep the two pin J3 connector so you can quickly connect/disconnect the battery pack to your microcontroller circuit (in case yo
Make sure it is not hidden: If you plan to use a ground plane, you can hide ratsnest lines for the GND net by selecting View → Connections → Hide Net and then clicking a pin connected to GND.
You can do this in pin package. Goto assign pin package or IO plan ahead.... Each pins can be directed to the required IO standard, but not sure about clock standards....
can I directly connect max232 Tx pin to transmitter and receive the data at pic end using a receiver,or I need a Pic at PC end also. To establish communications from a PIC to a PC using the RS-232 PORT on PC. You must correctly connect a MAX232 to the PIC, then the RS-232 TX, RX and GND pins can be connected to an RS-
You should locate it on a package pin that is intended for a global clock. These pins are annotated with "GC", I beleive, in planAhead. r.b.
I am thinking about using an 18F46k20 microchip. This is a low voltage pic, and it does mention that the voltage on any pin is to be -0.3V to (VDD + 0.3V). I would plan on using a 3.3V power supply for this application. I also have a MPXV7002GP pressure sensor I would like to use. The output voltage on this is from 0.5 to 4.5V, which seems t
The average forward drop of a Red/Gren LED is 1.2 Volts. A Pic can source/sink ~20mA from an I/O pin. So, if you plan to drive a standard led from a 3V supply at ~20mA, your series resistor would be: (3 - 1.2) / 0.02 = 90. So a 91R or 100R would be the value to use.
You CAN use IR without a carrier but your range and reliability will be very much reduced. The idea of the carrier is that you can treat the signal as bursts of AC rather than DC so it become much easier to filter out unwanted frequencies the detector will pick up. To 'nand' the signal, if that's what you really want to do, set up an output with
Hi guys. I have 8 bicolor LEDs that I plan to drive from 8x2 ports of the micro. The LEDs are common cathode. Basic idea is to ground the cathode and connect a NPN transistor before every anode and connect the base of the transistor to the micro IO pin. No, this will of course work, if the collectors of the NPNs are connected to VCC (5v) via some r
Hi i am a 8th sem student and working on a project where i need to communicate wirelessly between 2 mcs. i plan on connecting the txd pin of Atmel 89c51 to one of the data pin of HT12E encoder. i want to know what do i do with the other 3 data pins and the address pins of HT12E. also whether at the (...)
Hello, I have several VHDL modules, which i will synthesize in Mentor Graphic Precision Synthesis.Later i plan to programm the synthesized design in Altera Cyclone FPGA.Now my question is about the assignment of the ports with pin in Altera Cyclone.How to do the pin assignment in Mentor Graphic HDL Designer FPGAdv?? Help will be (...)
I would like to build a circuit which can turn ON or OFF 4X4 LED array by using only 1 I/O pin of 16F877A. Can anyone guide me in this?
two options: 1. plan the power at top level before partition 2. plan the power for every partition and make the power stripes as a power pin. And connect those power pins at top level
Dear Sir, I am defining the pin assignment and total pins are 304. I have to adopt PBGA-304 package for my application. Does anyone be able to tell me what I should care? How about the plan in power pin? Thanks a lot.
The largest Xilinx Virtex II FPGA chip is available in a 1704 pin BGA. I wouln't like to route it, but anything is routable given enough layers. Git