Search Engine **www.edaboard.com**

14 Threads found on edaboard.com: **Pspice Abm**

Implementing an analog behavior model with TIME variable dependency means to include an independent source to the model. Although the option is provided by the **pspice** **abm** syntax, it's not genuine behavior modeling. I didn't yet experience a simulation case where a similar combination seemed useful. If there's a time dependency to be modeled, it can

Analog Circuit Design :: 10-25-2016 21:31 :: FvM :: Replies: **3** :: Views: **633**

Hi all,
i am trying to design a sigma delta modulator in **pspice** by **abm** library , here it is my schematic , nut it dont work!
first block subtract the input from output , then the result goes to integrator and then if the result is positive the output becomes 5 , else the output becomes zero and this output goes to 74175 that its clock rate is 10k

Analog Circuit Design :: 04-02-2015 05:41 :: zizi110 :: Replies: **2** :: Views: **670**

hi any body can help me to know about the equations of brushless dc motor
i want to model it in **pspice** with **abm**
please help me i'm in urgent

PCB Routing Schematic Layout software and Simulation :: 07-24-2013 07:01 :: alielectric :: Replies: **0** :: Views: **821**

You didn't specify the problem clearly. Nonlinear (e.g. voltage dependant) is different from time varying.
Nonlinearity is provided in **pspice** by a linear and quadratic voltage coefficient. Piecewise linear would need your own implementantion. It can be found e.g. in power MOSFET models, see below example of a nonlinear Csd capacitance (copied fr

Analog Circuit Design :: 11-06-2012 06:55 :: FvM :: Replies: **7** :: Views: **968**

Use the ZX subcircuit from the MISC.LIB (s. the MicroSIM **pspice** Application Notes, pp. 159-160).

Analog Circuit Design :: 10-10-2012 12:02 :: erikl :: Replies: **1** :: Views: **651**

In **pspice**, a square root circuit can be easily "designed" by using **abm** (analog behaviour modelling).
For a real hardware circuit, you can refer to analog multipliers, see an example in the AD633 datasheet
Or use a suitable combination of log/antilog circuits. The basic conce

Microcontrollers :: 09-16-2012 17:50 :: FvM :: Replies: **1** :: Views: **1306**

Hi,
I've been working on a power device macromodel based on **abm**, but I got stuck in convergence issues (transient analysis) when Vdd goes over 100V
I changed RELTOL, ABSTOL, VNTOL, etc., but I wasn't yet able to have it working with higher voltages.
The model is in the attached pdf. I am using **pspice** from Cadence SPB v16.3
Any ideas?
T

Power Electronics :: 06-13-2012 17:35 :: Regnum :: Replies: **1** :: Views: **670**

It is still showing transconductance of 1S
Looks like. But it's surely not a general **pspice** problem. You may want to inspect the generated netlist. Or post the project files.

Analog Circuit Design :: 02-06-2012 13:12 :: FvM :: Replies: **9** :: Views: **2239**

2nd Tutorial on **pspice**

Analog Circuit Design :: 07-22-2011 11:52 :: LvW :: Replies: **3** :: Views: **2959**

Hello all,
İ want to plot my bandpass filter's transfer fucntion which is in s-domain.For example i have Vo/Vi=(0.03s/s^2+3s+5) how can i plot it in orcad **pspice**(v16.3)?

Analog Circuit Design :: 06-01-2011 13:42 :: elohab :: Replies: **2** :: Views: **4328**

Hi guys,
Right now I've a Laplace **abm**-Filter(PI Filter) in my **pspice** Simulation. I want to replace the Laplace **abm**-Filter with a real OP-Amp. My question is, will the Vcc+ and Vcc- of the Op-Amp influence my result?

Hobby Circuits and Small Projects Problems :: 03-31-2011 11:19 :: capital_zach :: Replies: **2** :: Views: **1733**

I want to circuit modeling rate equation using **pspice**.
For example :
c1*dv1/dt = v1/a - v2/b + c*v1*v2
that each term refer to a current and v1 and v2 refer as node voltage.
c1*dv1/dt ====> current of a capacitor
v1/a====> current of a resistor
v2/a====> current of a resistor
and my question:
how can I model the last term?
can we use a VC

Analog Circuit Design :: 03-06-2011 13:16 :: hakhamanesh :: Replies: **3** :: Views: **2391**

How do I create a analogue behavioural model of a comparitor with hysterisis in **pspice**.
I need upper and lower thresholds of 1.25 and 3V.
Thks

Analog Circuit Design :: 06-05-2009 09:46 :: sound_man :: Replies: **0** :: Views: **1262**

Hi!
When I simulate power electronic circuits in **pspice** I got large *.dat file as a result (<=2GB). Circuit is very big with **abm**, digital and analog parts and with large values of voltage, current and requency.
Is there any way how can I change deafult max value for this in **pspice** which is 2GB (I need bigger) or how can I change some (...)

Elementary Electronic Questions :: 02-06-2005 11:47 :: epp :: Replies: **4** :: Views: **2334**

Previous
1
Next

Last searching phrases:

nevertheless | zero appear | cant get | three five | near far | seven | nor not | less than zero | mean well | nor not

nevertheless | zero appear | cant get | three five | near far | seven | nor not | less than zero | mean well | nor not