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Hi, In band-gap reference circuit.Why there is 1:n ration of BJT? Regards Shrikant In order to create ptat current source.This current will be used to compensate VBE vs. Temp value.( remember that VBE drops down approx. -2mV/deg )
I doubt that a fully differentially amplifier is right in this place. Unfortunately the circuit can't be analyzed without knowing the ptat/CTAT output characteristic. To work in the shown circuit, ptat and CTAT output node must be bidirectional current sources but they most likely aren't.
Please refer to the attached circuit. 117083 It's obvious that MP1-3, R1&R2, Q1&Q2 work as a bandgap reference circuit itself. With appropriate combination of the ptat current and the CTAT Veb voltage drop, a desire bandgap voltage reference can be produced. However, what about the middle part? It seems like there's a
Hai In 65nm technology if we have to design current references(4mA, 10mA---) what type of circuit we have to choose either a simple betamultipler or a ptat from a BANDGAP reference. Thank you satya
Hi All, I am using the circuit from this paper in designing a ptat circuit "A Novel Wide-Temperature-Range, 3.9 ppm/C CMOS Bandgap Reference circuit",by changing the input transistor of opamp from MOSFET to BJT. This is the ptat circuit and the detailed schematic of Opamp. Startup (...)
You have a ptat voltage across R1. Vptat = (KT/q)ln(m) This would fix the current in the PMOS current mirrors as a ptat current, Iptat = Vptat/R1 Your Output Voltage Vref = (IptatR2) + VBE,q3 Now adjust R2 to get Vref as constant across
I suspect the best play is to put large shunt C between op amp output and the PMOS-pair gate node in the ptat section. This will help HF PSRR as well. Miller comp in the op amp that keeps its output stable wrt Gnd, will make the PMOS pair amplify supply noise. Of course simple shunt comp tends to want more area than Miller comp, and this may not
Usually, please some one correct me if I am wrong, there are two stable states for this kind of circuits. Depending on the initial conditions the circuit could go to a state where the current is zero, so for this reason some sort of start up circuitry is needed. There can be a third stable state, if you close the
Hi all, I need to implement a temperature sensor based on the circuit shown in the attached schematic. Unfortunately, the current flowing thru M1/M2 is not ptat. So then how can I implement a temperature sensor based on this architecture? Any guidance will be helpful. Thanks.
dear all I have designed a biasing reference current by adding ptat and CTAT currents together. the result is a biasing current with small temperature coefficient. However, since both the PTA and CTAT has R in their equations, the total current still depending on the process variation. not like the bandgap reference voltage where no R in the
You could start with just what "didn't work" means. A result you didn't like, or failure to produce a result at all? bandgap / ptat loops without explicit startup mechanisms, can easily converge in one testbench and fail in another, because when they start up they're doing so on "numerical noise" which depends on the circuit matrix and algorithm
Hi All, I need to design a voltage reference circuit 1. The output should be a constant voltage below room temperature 2. Output should act like a ptat voltage above room temperature. This should be a single voltage reference satisfying both conditions. Please share your ideas.
hi all, i got PATA current from Razavi at chapter there is no more detailed start-up for this circuit. whether the circuit needn't start-up circuit? if start-up circuit must have, can anyone recommend or what document i can r
The attachment is a CTAT and ptat current generator circuit for low voltage operation. My understanding is that as temperature increases, the Vbe(Q1) decreases and Id5 decreases since Vbe / R2 has decreases. This generates the CTAT current. Combination of the CTAT and ptat currents makes a ZTAT current which is quite good. However, my (...)
i would agree with you...but the formula is derived exactly starting from this formula v_R=delta_vgs and ends up in this ln form .... theory on ptat current source confuses me obviously :P
razavi, chapter "bandgap reference",section ptat, or just google "ptat"
Hi palmeiras, here are some new outcomes from my side: 1) When you wrote: “the resistor leading to a reduction in VGS2=VGS1”. Do you mean VGS2 minus VGS1, right? Because VGS1 is always different from VGS2, never equal. Sorry, this was a typo: Of course it must be Vgs1=Vgs2+Ids2*Rs=Vgo2 (referred to ground). A last thing:
... which one should be chosen when desing a circut? what is the rule There's no rule; this depends on the circuit's requirement, as Jgk explained above. Occasionally I use a ptat source to counteract the speed deterioration at high temperatures (due to mobility degradation).
How to simulate a ptat circuit? Run a DC analysis and sweep the temperature. can someone show me how to set the parameter of the component for ptat circuit? Your question isn't clear to me: Which parameter of which component? How is your circuit? Schematic, Verilog-A, AHDL, functi
In bandgap, the ptat current is obtained by the delta_Vbe/R circuit. The implicit assumption is that the same current flows through both transistors! In Bandgap A, the opamp offset and mismatch will contribute to the current difference. In Bandgap B, if we ignore R2/R3 for the time being, the current difference depends only on the opamp offset m
You'd have to show the circuit, but I have personally seen ptat loops in bipolar technologies exhibit three stable states - "off", "setpoint" and "saturated" (current mirrors of some forms have a superlinear response (out/in) when their devices saturate, while others are sublinear and do not have such issues).
Acctually, I got a 1.18V bandgap voltage by wafer data, but in that case, the ptat is about 180nA. I think you can check your VBE. Is it equal to your hand calucation value?
I need bias voltage which changes with temperature, so a ptat circuit. at -40 C , the voltage will be 900mV and at 125 C voltage will be 960mV. that means, change is 0.36mV/C. I designed a circuit but its changin from 500mV to 1V for -40 to 125C. Can I designed such ptat which is change 0.36mV/C ?
Hi Yitch, First you need to understand the concept of ptat and CTAT in bandgap reference. if you dont understand the complete circuit of bandgap then just break it into several pieces. like opamp, current mirror, diode or bjt combination, role of two resistor if you are using first order circuit. it is not too difficult
Everything you need to know, is in the Zout of the final gain stage devices, I bet. If you run ptat bias, you increase the operating point current at high temp and push the FETs closer to linear region. Then Zout is degraded and gm*Rout DC gain can only follow. If your OP Vgs is going up at high temp (meanwhile VT (effective) is drop
I have used junction capacitors as startup circuits in bipolar ptat & bandgap designs and they work fine provided you ensure there is a discharge path for the capacitor. I cannot remember the exact mechanism in the designs I did but there was a distinct, predictable discharge path when the power was removed (possibly through one of the wells being
A ptat current reference circuit is based on the concept of adding (subtracting) vbe voltages. Typically you would use two vbe voltages with different areas and a resistor closing the loop to put the ptat voltage across it. Such a circuit has two stable Operating Points, one of them is with every voltage equal to zero, the (...)
... 1. To generate a bias current why is a ptat current generator used. The current will be proportional to absolute temperature so won't that affect the circuit performance. Instead shouldn't a bandgap reference voltage be generated and then use that voltage to generate the bias current? ... 3. ... Again I don't understa
Can anybody help me? how to connect the "+ -" input of the opa to form negative feedback in the ptat circuit?
Play with the resistor. The resistor sets the amplification of the ptat Voltage. Means you can move the maximum of the Bandgap refrence (Vbe-V_ptat=Vbg). Normal people set the maximum of the Vbg voltage to 27 C°. You can do a parametric simulation (with Rpn as paramtere) you should see the maximum move over temp
Dear all, Currently, I am doing a ptat circuit design using traditional pn junction. I found the linearity of output current will be different when I choose different material of resistor. experimentally, rpoly2 has a positive Temperature coefficient, rpolyh has a negative TC. I am thinking of mixing these two type of resistor to cancel the impa
Are you sure it is works? Yes, I think. In the expected condition, it generates a ptat currrent.
The equation you're writing is correct. What you have to take a look into is the following: The circuit shown is supposed to generate a ptat current by having the voltage that you called VR across the resistor R1. The reason this current is proportional to temperature is because the difference of two base-emitter voltages (Vbe1+Vbe2 and Vbe3+Vbe
as we know, an opamp is usually used in ptat circuit, and its DC gain should be large; but what is the DC gain requirement? how to determine the value of DC gain, and how much is enough? can anyone give me an explanation?thanks.
IIRC, The resistance you use to tune the current in your typical ptat circuit is doing this. the above equation you can see that the slope of I_ptat can be controlled by the resistor R, neglecting the tempco of the resistor.
This is basic circuit of ptat temperature sensor. Vptat=(k*T/q)*LN(N), where N is ratio of emmitter areas of two bipolar tansistors. I thing you make mistake whe define sensor sensetivity in uA/K, it is right to be V/K.
pls tell me how to calculate psrr of ptat reference(in theory)? and how to get the psrr expression from the circuit visually? thanks. is there any advice or papers?
Constant gm circuit is generally realized with ptat current sources to compansate approx. -2mV/°C drop in Vbe that results lowering current.
ptat+CTAT current will produce the small temp coefficient current source, but the corner variation is difficult to dealt with except for using external resistor
i designed a voltage reference,as the figure shows; but when i simulate, i find that the voltage vref which is generatd by ptat jittered with very large amplitude,and settles very slowly; figure2 is the wave,very strange;if vref settles slowly,then vcm settles more slowly,and the whole circuit doesn't work well; how to solve this problem
i have designed a voltage divider circuit with a buffer and a resistor divider, the input is from the ptat(about 1.24V),when the generated reference voltage Vcm (0.9V)is connected to the actual circuit(a pipelined adc in sample phase),the value of Vcm changes a little(about 16mV),so the circuit can't work properly; later (...)
i have designed a voltage regulator,the circuit is as follows: a opamp with the ouput 474mV when the input is 1.22391V(generated by ptat); vtop=vref(1+R2/R1);vref is 1.2391V;in general. vref is precise enough,so vtop should be precise,too;but in reality,it doesn't work;and vout is either close to 0(about 60mV) or vdd(about 1.756V);please help me.
hi! my bias tail current for opamp is from ptat. It is use pmos curent mirror from ptat to mirror other circuit. Plan to use interdigit for layout for the transistor of the tail but find out it very far from ptat block, if 2 transistor very far, Vth mismatch will occur. how to solve it?
Hwo to bias opamp which is used to force two nodes voltage eaual? If we use ptat current generated by bandgap core itself, another loop is created. The stability is also a problem? How to bias this opamp?
I know this is stupid question...but if I don't ask, I will be stupid not my question~~~ thank you first what I wanna ask is which circuit need a ptat current bias what circuit need bandgap I have seen that most rf lna use ptat why? (to compensate the bjt's negetive Vbe? this will increase the gm!!!) , but what (...)
comparing with the simulation result? All the block )LNA, mixer, IFVGA ,div2)have the same problem. Checked the dc bias for every device, looks OK, the layout for the current mirror device looks fine! Do you think it is possible the value of the resistor which set the ptat current in the bias_gen circuit change a lot due to the process vari
I think the ptat current comes from the common effect of MOS TC and res R1 TC, it should be simulated and choose proper size of MOS and R1 to get this ptat current!
Vbdg = Vgo + Vto(γ-×) and Vgo=1.205 , γ=3.2 ,×=1 ×=1 (in your circuit, this parameter is 1, as your VBDG setup PNP is biased by ptat current) γ=3.2 (look inside pspice model for XTI) Vgo (pspice uses EG, the fictitious Vbe at 0K, not quite measurable in practice) if u have done an almost ideal job on your bandgap circu
bandgap is the circuit which is used to generate the reference voltage....which is compensated by temperature ..using ptat..non bandgap may not be that accurate to give the constant reference voltage...
Who can help me the analysis this circuit? VDD=3V and 'I50A' should be about the current "I50A" in this bandgap circuit? Is it ptat current or temperature-independent? I think it is ptat but I was told that it work as a bandgap current source in a ADC circuit. 2.How