5 Threads found on edaboard.com: Readline Vhdl
This is what I wrote:
signal incoming_pixel : integer ;
signal pixel_out : integer ;
reading_from_file : process ( clock ) is
file text_file : text open read_mode is "C:\location\some_text_file.txt" ;
variable current_line : line ;
variable incoming_pixel : integer ;
if ( not endfile ( my_file ) ) then
PLD, SPLD, GAL, CPLD, FPGA Design :: 07-19-2016 06:10 :: shaiko :: Replies: 17 :: Views: 328
the readline(file, line) procedure reads an entire line from a text file. You then use read(dest, line) to extract elements from that line.
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Or, to make our lives a little easier, post the code that doesnt work and ask some good questions.
PLD, SPLD, GAL, CPLD, FPGA Design :: 01-02-2014 04:00 :: TrickyDicky :: Replies: 12 :: Views: 739
there is no way to do this easily in vhdl. vhdl is not set up to do File io nicely other than text.
What file are you trying to read? For every file you can use the ENDFILE() function to see if you have reached the end of a file:
while not ENDFILE(my_file) loop
You could use this lo
PLD, SPLD, GAL, CPLD, FPGA Design :: 06-17-2011 10:33 :: TrickyDicky :: Replies: 2 :: Views: 1696
Ill assume each value is stored on a seperate line:
type some_array_t is array(integer range <>) of integer;
signal ar : some_array_t(0 to 99); --could be a varaible
--inside a process
file f : text open read_mode is "my_file.txt";
variable inline : line;
for i in ar'range loop
PLD, SPLD, GAL, CPLD, FPGA Design :: 06-03-2011 09:08 :: TrickyDicky :: Replies: 13 :: Views: 3876
i think u have missed the "readline" function before read function...
Check the below link
PLD, SPLD, GAL, CPLD, FPGA Design :: 07-28-2009 01:56 :: shanmugaveld :: Replies: 12 :: Views: 13152