1000 Threads found on edaboard.com: Response Time Comparator
hi ,every one
now i have to design a comparator with 5mv offset and 40ns response time.what i want to ask to you is how i can measure the response time and offset with hspice.
as far as i know,the comparator's response have two ways that is linear and slew depending on the (...)
Analog Circuit Design :: 11-24-2005 10:08 :: gonewind :: Replies: 1 :: Views: 930
Any idea where I can know what's the response time of the analog comparator inside the AT89C2051?
It does not seem to be mentioned in the datasheet anywhere!
Microcontrollers :: 07-23-2010 04:57 :: KamalS :: Replies: 3 :: Views: 1093
The LTC1841 commparator has a propagation delay of up to 14us
How can this be?
...i thought comparators were supposed to be fast?
The LM393 has a response time of 1.4us
....The 14us seems ridiculo
Analog Circuit Design :: 10-13-2012 11:13 :: treez :: Replies: 1 :: Views: 228
I am really confused between two parameters in the comparator. The Propagation delay and the response time.
I understand that the Propagation delay is the delay from input to output of a digital gate switch and the response time is how quickly a comparator changes output (...)
Analog Circuit Design :: 04-07-2014 03:33 :: MouradR :: Replies: 4 :: Views: 251
For a NMOS open-drain comparator circuit,
how to reduce the ?response time High to Low?？
Analog IC Design and Layout :: 09-14-2005 06:10 :: holddreams :: Replies: 3 :: Views: 743
response time is a typical parameter to specify components with digital output, e.g. a comparator. It's no commonly used term for OPs.
Electronic Elementary Questions :: 09-13-2012 12:04 :: FvM :: Replies: 4 :: Views: 1122
I'm designing a UHF diode detector,the diode's output voltage's response time(rise/fall)time should be a few ns;I searched some functions,they said the Rv or Rl
of a diode should be decreased,but If Rv be decreased,then the Ib should be increased,but IBV has a limit. If we decrease the Rl,normally the Rl should be amout of (...)
RF, Microwave, Antennas and Optics :: 12-20-2008 10:08 :: l.j.zheng :: Replies: 0 :: Views: 734
I am quite new to PLL design and analysis and have what I hope is a simple question to somebody.
I am developing a system that will use a PLL to track the resonant frequency of a small micro-beam around 26 kHz. I would like retrieve the frequency to within 0.01 Hz resolution. Using canned formulas in the literature and text books, my "lock i
Analog Circuit Design :: 12-27-2008 08:49 :: rrumpf :: Replies: 2 :: Views: 1265
But t=2.2RC is a time constant which is not equal to response time of a filter
I think what biff44 said is based on a 1s order response (eg y = Aexp(-t/RC) )
response time = time1 - (...)
Analog Circuit Design :: 08-01-2009 04:55 :: wpchan05 :: Replies: 6 :: Views: 4242
Hello everyone! I want to build a continuous time comparator (one input seeing a threshold and the other an integrated current on a capacitor, so a rising voltage), without external clock. So the basic comparator used in ADC is useless, cause it needs the fast clock to reset it and make it take a quick desicion with the positive feedback. I (...)
Analog Circuit Design :: 02-09-2011 08:31 :: geozog86 :: Replies: 3 :: Views: 812
i am working on Class AB power amplifer, problem is that the Output Power at load settles constant after long time, how to improve that response time.
Analog IC Design and Layout :: 12-31-2011 08:26 :: coolsaurabhsonu :: Replies: 3 :: Views: 623
ASR ADC Segmantation
msb 6bit with CAP binary weighted, lsb 6bits thermometric resistor ladder
data rate 2Mbps, 28Mhz clock.
continuous-time comparator(signle stage opamp) with two cascade satges used autozeroing technique for offset cancellation(with i/p cap of 100f/500f)
when i run enob simulation only with real comparator and (...)
Analog Circuit Design :: 03-20-2012 07:55 :: nannapaneni :: Replies: 1 :: Views: 621
Consider a totem pole driven Class D and another one with out totem pole drive and ponder the following questions in my mind
1.Which of the two will have higher response time ?
This is my take in it The one with a totem pols drive has a higher levels of BJT so it will have higher response time
2. For a high speed (...)
Analog Circuit Design :: 11-16-2012 14:16 :: jeffrey samuel :: Replies: 3 :: Views: 336
The passive HPF has no effect on initial response time (to a step function from the sensor). The LPF is first order, and so it reaches 63% of its ultimate (gain=101) value in 68 msec. (which is 680K x 100nF). But by this time the HPF is starting to fall off too, so it starts heading back toward zero with a time constant of (...)
Electronic Elementary Questions :: 11-13-2013 18:14 :: Tunelabguy :: Replies: 9 :: Views: 293
Guys I found an led (visible range) with a response time of 20ns does it mean that it will support a switching speed of 25MHz. Also if true are there any leds with lower response time in range of 1-10ns.
RF, Microwave, Antennas and Optics :: 07-24-2014 04:04 :: Johnny101 :: Replies: 2 :: Views: 162
Sensors and Couplers
To measure a Step response time, you measure the time from the start of the rise until the output decays to 37%?
Step response time is to measure sensors and couplers?
Any of circuits or components uses step response time?
When would a tech (...)
Electronic Elementary Questions :: 10-16-2014 19:49 :: ParkerMike :: Replies: 2 :: Views: 92
Unless you have slowed down the op amp with capacitors. There is no way that a thermocouple will be faster than an op.
The time that the heater needs to warm the metal rods (when the heater is on) and the time in which the rods cool down (when the heater is off) produces a delayed response much slower than the op amp is capable to react.
Electronic Elementary Questions :: 04-06-2013 14:54 :: albert22 :: Replies: 1 :: Views: 214
Actually, I am using a latched comparator in my switching reg controller now. It has some very good points in its favor like a 30ns response time. But the main disadv I have noticed so far is its resolution/accuracy. It's not its strong point! More info on latched comparator: check following IEEE paper,
Analog Circuit Design :: 04-14-2005 07:17 :: kart339 :: Replies: 4 :: Views: 1337
response time can be understood inertial time
Analog IC Design and Layout :: 09-07-2005 08:30 :: nittinsharma80 :: Replies: 4 :: Views: 798
The following is a comparator datasheet:
How can simulate Ioh,Vol,Icc,tPLH,tPHL of this comparator?
Can anyone tell me how to add stimulus in the hspice netlist?
response-time measurement at low input signal levels can be greatly affected by the input offset vo
Analog Circuit Design :: 10-08-2005 04:51 :: holddreams :: Replies: 1 :: Views: 934
This is because normally opamp has compensation capacitor which will slow down response time of the output or the rising/ falling of the output. As comparator, you no need it because it is a open loop system.
Correct. The most popular OA, the 741, had a version without the compensation capacitor (if I'm not wrong, it was
Analog Circuit Design :: 11-09-2005 09:23 :: zorro :: Replies: 8 :: Views: 2995
I think response time is also extremely important (especially with faster switching speeds) and hysteresis to prevent multiple triggering caused by noise.
Analog IC Design and Layout :: 12-26-2005 05:27 :: johnsmith101 :: Replies: 5 :: Views: 1278
I know that traditionally, an op-amp connected as a comparator consistently underperformed dedicated comparators in most respects.
But that was when we were comparing a 741 and a 311.
Op-amp technology has progressed faster than comparator technology.
We have today op-amps with exceptional speed, which I would expect to (...)
Electronic Elementary Questions :: 01-23-2006 09:13 :: funberry :: Replies: 2 :: Views: 1543
To get the frequency response of a filter (or any linear time-invariant system), simply sibstitute jw for s in the transfer function.
To get the step response, multiply the transfer function by 1/s. Expand the resultant expression using partial fractions, and then obtain the time response using (...)
Analog Circuit Design :: 11-07-2006 08:46 :: Kral :: Replies: 5 :: Views: 986
I've just read Gregorians book "CMOS-Opamps and comparators". In chapter 8.3 he introduces to a sample design of a regenerative latch based comparator with hysteresis. On the last page of the chapter (p. 354) he adds that one might optimize the sizing of the W/L of the mosfets for transient response but he doesn't go into detail - to (...)
Analog IC Design and Layout :: 11-11-2007 09:44 :: avt :: Replies: 2 :: Views: 2196
I think , you should simulate the settling performance of the SHA first.
then you had better simulate the offset of the comparator. however, to simulate the offset of the comparator is very difficult task. I think you should design it and layout it carefully.
normally, the monte carlo simualtion can assist your analysis.
the response (...)
Analog Circuit Design :: 12-24-2007 00:02 :: renwl :: Replies: 9 :: Views: 3338
i built a peak detector circuit for an ultrasonic receiver circuit. few days a go the response for the output of the peak detector is fast enough that it really follows the up and down of the receiver.
now suddenly (no hardware or software change) the output of the peak detector's response is slower than before, it takes nearly 3 seconds for th
Analog Circuit Design :: 11-08-2008 05:16 :: miskol :: Replies: 2 :: Views: 1253
I believe you can increase the tail current to decrease the delay (what is your clock frequency?) of the output response or you could latch the output of the comparator with a delayed version of the sampling clock, say 160ps later. If neither is good for you, add a preamplifier or change the comparator topology.
Analog IC Design and Layout :: 03-14-2009 13:28 :: JoannesPaulus :: Replies: 2 :: Views: 1516
Does response time of a comparator in the datasheet means the time it takes the output to see the change of the input? and the slew rate is the time for the output to change its state?
if i am correct about the response time, is there a way to improve it?
Analog Circuit Design :: 05-18-2011 03:52 :: hayowazzup :: Replies: 8 :: Views: 710
does any one help me in designing the comparator?
what are all factor need to be checked in designing the comparator.how can i reduce the response time of the comparator.
Analog IC Design and Layout :: 06-30-2012 03:03 :: krishkannan :: Replies: 1 :: Views: 385
I am performing humidity measurement using the HS1101 sensor. The idea of measuring the humidity is charging anf decharging the sensor(capacitance). Please look at the link
As it is written in the link above, the solution is based on a timer which charges/decharges the cap
Analog Circuit Design :: 08-08-2012 00:22 :: lowpowermcu :: Replies: 1 :: Views: 381
It depends upon the load you want to drive and how fast you want a response.
You should keep the output sink current to no more than 8mA so the smallest resistor you can use is R = Vs / 8mA where Vs is the voltage to the resistor.
The largest value depends upon the load and the response time you need to drive the output load stray (...)
Analog Circuit Design :: 10-13-2013 12:30 :: crutschow :: Replies: 1 :: Views: 253
I simply do not share your optimism about response time
and whether that's fast enough to save the converter.
So I still recommend you dig until you find a threat model
for load dumb that some of these "authorities" have seen
fit to bless. They want compliance, to something. Bet on
that, and find it. Then you can set about proof.
What I see in a c
Electronic Elementary Questions :: 11-30-2013 21:53 :: dick_freebird :: Replies: 4 :: Views: 431
WIthout seeing the circuit, the problem with this design is that the photodiode appears to saturate with 3V across the current sense resistor and then the recovery time is extended, also as the current drops the RC time constant increases
The second problem is that the filter BW should match the signal content for optimum SNR to reject ripple. Som
Analog Circuit Design :: 07-13-2014 21:48 :: SunnySkyguy :: Replies: 19 :: Views: 590
BIST consists of
*)PRPG-> Psuedo random pattern generator
*)Memory for storing the expected results
PRPG pumps in random data to the DUT. DUT response is compacted and compared with expected response for corresponding to that particular input. The expected results will be (...)
ASIC Design Methodologies and Tools (Digital) :: 04-19-2004 09:48 :: eda_wiz :: Replies: 21 :: Views: 3469
Generally speakng 339 is not very precise comparator with average response time, so you can easily use 324 instead. The only difference will be that you can connect its output to larger voltages then its supply because of the OC output stage.
On the other hand, you can not replace 324 with 339 in linear applcations because 329 as (...)
Analog Circuit Design :: 01-28-2005 21:11 :: IanP :: Replies: 4 :: Views: 10387
Your need fast Si photodiode with 50 ohms oscilloscope load. If expected rise and fall time is in nanosecond range PiN photodiode is useful. If rise and fall time is in picosecond range ( laser sources) your need avalanche photodiode.
Look at Hamamatsu photodiode catalog and application notes- response time for fast (...)
RF, Microwave, Antennas and Optics :: 07-01-2005 06:32 :: khach :: Replies: 8 :: Views: 17228
Definition: A soft real-time system is one in which performance is degraded
but not destroyed by failure to meet response-time constraints.
Definition: A hard real-time system is one in which failure to meet a single
deadline may lead to complete and catastrophic system failure.
Electronic Elementary Questions :: 04-10-2006 03:40 :: ronyutp :: Replies: 1 :: Views: 749
It is usually not same. comparators can have internal positive feedback that can make faster switching and response time... and so on...
Here is what you are interested in:
Analog Circuit Design :: 07-07-2006 06:36 :: pixel :: Replies: 8 :: Views: 1056
All I know is that comparators are used to compare signals and they are very important therefore are used in many types of circuits.
So how are comparators used in these circuits?
What makes a good comparator in different application?
Is faster response time and larger output voltage always better? (...)
Analog Circuit Design :: 09-14-2006 05:09 :: renwl :: Replies: 3 :: Views: 1166
If I remove the inverter stage (in red), the output will be inverted. i.e +ve to -ve and -ve to +ve.
However, my transient time also suffers. why is that so?
I have tried to tune the remaining transistors to obtained a better transient time but was not successful.
Does any one known why?
Analog IC Design and Layout :: 01-09-2007 23:57 :: invent :: Replies: 4 :: Views: 1693
I found there is a specification of "response time" or "rise time" with the test condition of "100 mV Step with 100 mV Overdrive" in the datasheet of the comparator.
Anyone would pls. tell me what it mean?
Analog Circuit Design :: 05-16-2007 21:48 :: chang830 :: Replies: 1 :: Views: 1262
Hello guys, I want to design a comparator with the following restrictions:
total quiescent current is 10uA
and the propagation delay should be around 20ns
I do not want to use the dynamic comparator because there is no clock signal in the whole system where the comparator works.
Can anybody give me some suggenstions? (...)
Analog Circuit Design :: 05-30-2007 13:34 :: tottistone :: Replies: 7 :: Views: 1254
Maybe you need a large external Capacitor to imrpove tansient response!
Analog IC Design and Layout :: 09-14-2007 00:01 :: mark_nctu :: Replies: 34 :: Views: 7602
I am designing a latched comparator (dynamic type).
How can I set up the simulation to get the performance in offset and speed??
I also need Monte Carlo and Corner model verification. Thank you.
Analog Circuit Design :: 08-27-2007 17:47 :: leg1234 :: Replies: 7 :: Views: 1810
I'm going to design a continuous time comparator using non-compensated op amp. So, how to implemented hysteresis for this comparator. Remember the op amp itself will have some offset. Thanks!
Analog IC Design and Layout :: 09-27-2007 20:52 :: tia_design :: Replies: 3 :: Views: 1362
I've a question about comparator type,
In general, there are 2 types of comparator.opamp type vs latched type
Latched comparator is more power efficient, small size, fast slew time than opamp type.
Then what kind of application does need opamp-type comparator?
Analog Circuit Design :: 11-10-2007 10:19 :: ljy4468 :: Replies: 6 :: Views: 2509
Well first if you want to design 40 Msps-12 Bits SAR ADC, you need 480 MHz takt. That means your comparator, and your DAC need to have 2.1ns response time totally. That is quite a problem.
Second you need to design "12 bit good" comparator (regarding offset) and 12 bit good DAC (regarding matching) which is also very big (...)
Analog IC Design and Layout :: 01-10-2008 06:58 :: zajbanlik :: Replies: 2 :: Views: 838
In general, it is not possible to control the switching of an electromechanical relay so that it only switches at zero crossing because the response time of the relay is so slow. You can increase the life of a relay by using a relay that has a current rating much higher higher than the expected peak current.
Analog Circuit Design :: 11-08-2008 09:59 :: Kral :: Replies: 2 :: Views: 1391
how the effect of pole is observed through time domain plot ?
The pole position influences the response time of the step response.
A rising pole Q shortens the rise time and can create ringing - until the system oscillates when the pole has no real part.
Digital Signal Processing :: 12-01-2008 01:54 :: LvW :: Replies: 3 :: Views: 941