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Describe correctly This CTRL block is written in both Verilog-A and Verilog-D code. when I perform an spectre simulation The ADC_testbench simulation is running okay,It can't be true. cadence spectre can not treat Verilog-D. but when try to run it on AM
Hello, I'm trying to run dc and ac simulation for my layout,using cadence and TSMC65. The output performance are poor, and i'm not sure it's because a bad design, or simulating problem. while running the simulation, the following warnings pops on the spectre.out file: Notice from (...)
Apply a linear ramp to gate in a transient simulation, calculator Q=integral (i(gate)) C=Q*v(gate) plot C with x axis changed to v(gate) Or run a parametric analysis stepping gate and set C=op(cgg)
40 x 14-bit counters makes 560 bits. 2 to that power generates a number so large that my scientific calculator simply displays 'E'. No wonder the simulations need to run for such a long time. Instead, try starting with one or two IC's. See if the simulation works okay. Then add IC's, one at a time.
These are spectre simulator options for setting accuracy of the simulation. See page 142 from For normal circuit we can run in moderate mode but for circuits like ADC/DACs & PLLs where accuracy matters its advices to run in conservative even if its take more time to r
Hello! I cant plot waveform while simulating in cadence virtuoso IC 6.1.5 via spectre. When I initiate Netlist and run (green button), these are the results: Delete psf data in /home/eda/simulation/R_div/spectre/schematic/psf. generate netlist... Begin Incremental Netlisting Apr 6 23:23:36 (...)
When I run simulation in cadence spectre, I can run trans mode but cannot run pss. The error I attached. Please help me solve this problem.Thanks
Hi, I have a testbench-schematic for an If I start cadence and open this schematic and ADE GXL with the related adexl view and I run the simulation everything is alright. But if I subsequently "Check a
I am using cadence 5.1.41 with NCSU CDK 1.5.1, and I am new to cadence. I have created a simple schematic in Virtuoso. When I try to simulate the schematic using Analog Design Environment (ADE) and spectre simulator, I got the following error. *Error* Errors encountered during simulation. The simulator (...)
Hi everyone, I'm using cadence with the NCSU DK and when i run the DC simulation the software doesn't succed in creating the netlist. The error message is: ------------------------------------------------------------------------ Error found by spectre during circuit read-in. input.scs: M0 is an istance of an (...)
Hi, You can do it from dc analysis. In sweep parameters choose the "component parameter" position, like this: 88817 run simulation and now you can plot transconductance curve vs w or l of transistor.
When I use the cadence spectre to run the "hb" simulation for 1dB-compression point of a receiver front-end, an error is encounted. The simulation--output log gives the error information as follows: Fatal error found by spectre at time=201.784ns during periodic steady state analysis, (...)
Please Tell me can i run cadence Virrtuoso in windows environment?? No, you can't.
Normally a process variable should have a nominal value, a 3 sigma low value, a 3 sigma high value. MC simulation will use these values to find circuit response while process variables are statistically varied. If you process block doesn't have these definitions, MC won't run..
Hi I am using spectre for simulations. Would it possible for me to run transient analysis with initial condition chosen form "at some point" from previous transient analysis. To make it clear : I am trying to simulate a 60+GHz oscillator, its simulating fine but there is a phase shift of oscillations for each successive (...)
Are you saying that you will type-in the netlist in text editor? Or how do you make the netlist? I mean - did this before for smaller circuits but what is missing is the link between schematic and netlist and consequently layout. The fact they don't use it does not mean you can't (unless they do not have the license to run it). You could gain some
I run transient state simulation in cadence ADE with spectre. it generated the result in the folder of named : my_test/spectre/schematic/psf/(netlist in :my_test/spectre/schematic/netlist/) the result file is namded tran.tran.trn. and I activate the spice explore in the psf floder or (...)
Hi All, I am doing DC simulation in spectre for my amplifier.But I get this error,in spectre.out Internal error found in spectre. Please run 'getspectreFiles' etc... Error detected in file 'ipsm.c' at line 219 Assertion failed. Has anyone seen this issue?Please help. Thanks and (...)
Hi, I am trying to run ocean script using 65nm STmicro process. It seems to run fine till it encounters the simulation part and there it gives the following error ERROR (SFE-675): "/cadtools/cadence/PSG/DesignKits/STM/cmos065_522DK_cmos065lpgp_RF_7m4x0y2z_2V51V8_5.2.2/DATA/spectre/CORNERS/common_poly.scs" (...)
Once you have run a simulation (so all is loaded) look at the model libraries list. Your TFT model will be under one of the paths. You can edit it there or put a softlink from it, to some other location (if it's not all locked up by the CAD Police). cadence has a default $PROJECT_HOME/models/spectre search path that (...)
Halo, I am using cadence ELC to characterize a new standard cell library. When I run the tool, it completes up to the point where it is supposed to start simulating, then the problems start, as you can see from the log below: elc> db_spice -s spectre -keep_log License for paralled mode is not found. Entering non-parall
Hi friends, I have recently copied cadence from server in our college to my local machine. Everything works fine like starting ICFB, schematic editor and even ADE but when I run simulation, spectre stops at one particular file. Output is as like below: Command line: (...)
Yes you can still use loopgain simulation methodology in cadence. However before running "stb" analysis you have to run transients till your CM is settled. An easier way is to use ideal CMFB circuit and then do can skip the transient analysis part. My answer assumes you already have good background (...)
Dear I currently use spectre simulation in cadence. I am wondering if there is any method to run the spectre simulation with layout only. It's simple and no problem to run the layout simulation if based on its schematic or symbol. My question is to (...)
Hi. When I run spectre simulation in cadence, I get an error message. The error is for Schottky diodes. From NCSU CDK package (I am using AMI06, I bring Schottky diodes in Schematic and run) The error is that it requires to use of a model for Schottky diodes. I think I need a model file or at least (...)
Hello everyone, I am doing a full custom IC design using cadence Virtuoso tools. I have a problem with the calculator associated with spectre Simulator. It often happens that I run a simulation with spectre and i want to evaluate some parameters of the calculated waveform using the calculator. To do (...)
In my IC5.141 there is no Spice simulator. Only spectre and spectreS. I thought IC5.141 doesn't support Spice already. When you run simulation there were warning messages that some parameters are wrong and will be ignored in CIW (icfb window)? Did you used "simulator lang = spice" statement in your model file?
While trying to use the vpulse source in spectreRF, the simulation will run if all parameters are left blank. This is not a useful simulation. When i start to define any parameters i get the following error message and the simulation fails to run: "ERROR (CMI-2195): V0: Waveform type must (...)
Hi, I'm using the cadence IC analog design tools. In the Analog Design Environment, I want to make my transient simulations run for an amount of time determined by one of my simulation variables but if I put anything except a number into the "Stop Time" field of the transient setup window, I get an error that "String does (...)
Did you run MMSim?
Dear all, I run my simulation with spectre of cadence. One diode i wish to use is only .scs file and no symbol with it. You know the simulation flow is usually draw schematic first and add stimi, then evoke spectre and run simulation. (...)
There is perl script provide by cadence in converting the spice netlist to spectre netlist. By the way, TSMC always provide digital/analog library pdk to designers. So what you do is use include the spectre model inside tsmc pdk to run the simulation.
I am now simulating a pipeline ADC in cadence, I want to get INL/DNL from some programs run on matlab, how can I get the simulation data from cadence spectre,and to use it in matlab?
choose noise analysis and choose the output node (on which u need to measure the noise), then choose the input source of noise (which is noiseless), then run noise analysis
Do you really have the license to run spectre simulator?
I would like to run a parametric analysis in cadence, where the values of the sweep variable have no correlation between each other. I would like to have these values in a text file and import them in cadence for the simulation.
I would like to run a parametric analysis in cadence, where the values of the sweep variable have no correlation between each other. I would like to have these values in a text file and import them in cadence for the simulation.
I don't think spectre can do that. I think you can run your circuit twice and use the dc result from 1st temperature to simulte your circuit uner 2nd temp. and 1st dc.
If you use hspice simulator(you can choose simulator in cadence enviroment if you have such license), you can run simulation directly with hspice model. Otherwise you need spectre model, which is quite different format from hspice.
When i use simulation by spectre,there's an error. Error found by spectre during hierarchy flattening V1:Waveform type must be specified if any waveform parameters are given. It's seem as the Independence source,just like(Vsin,Vpluse and so on) How did you run spectre? Did you run (...)
I run dracula lpe extract and get spice netlist. Since I have never run this flow, I try to run simulation with spectre. But I met many syntax error, who may help to explain the steps of runing simulation with spectre or hspice? This is my (...)
a) do you really have 5 cpus in host 3? b) is it host 8 or host 3? c) I recommend to kill ANY CDS application - from my experience it does not work when any cds app runs - recommend kill -9 -1 d) I do not run it as a root. Despite what the documentations says and also to big surprise of cadence help line - you can run (...)
you can't run hspice directly with spectre. you should change hspice netlist to spectre netlist firstly you can directly extract RC netlist from layout on spectre mode with proper tool.
yes, you can run pss and pnoise. more example you can find the openbook of cadence: spectrerf
Hi, I have problem using spectre in cadence. when I choose the simulation environment as spectre, it says that first I need to convert spectre siminfo from spectreS (basically convert spectreS models to spectre models) using the conversion toolbox, but (...)
Hi, I have problem using spectre in cadence. when I choose the simulation environment as spectre, it says that first I need to convert spectre siminfo from spectreS (basically convert spectreS models to spectre models) using the conversion toolbox, but when (...)
Hi, cadence Analog Artist has an option "Corners" for a corner analysis. It works like a more complex parametric analysis. You need to defind a path for your corner models and run Corners Analysis. As a result you'll get a set of curves for different corners. Open "Analog Design Environment " window, choose "Tools", "Corners" and get "Co
You can run spectre from Analog Artist by selecting the spectre (not spectreS) simulator.
After running corner analysis with Single Model Library style got message: "Internal error found in spectre during altergroup "normal" .... please send the netlist, ... to Segmentation fault. How to solve this problem?