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# Sampling And Quantization

75 Threads found on edaboard.com: Sampling And Quantization

## sampling and quantization

i have one doubt. when A and B system are cascade, then if the system is linear time invariant system even A and B are interchanged, no change in result. quantizer is a nonlinear system. but even the sampling and quantization is interchanged the entire result is unchanged and same result (...)

## sampling or quantization????

hii frends..... I still can't be able to make a difference between sampling and quantization..i mean i have read a lot on both of them....i mean books says that sampling's only time discrete and quantization's both(time-amplitude discrete)....but still m confused.... plzz (...)

## Relation between sampling frequency and quantization

Hello , i'm newbie here :D . Just a simple question , is there a relation between sampling frequency and quantization ? I implement a quantization script under MATLAB 7.0.14 for quantizating signals. Theorically the quantized signal must be like stairs , not a line ! These are my results : For fs(frequency (...)

## 3 bit flash adc circuit and its corresponding waveform

I think you need some basic understanding of ADC. First sampling and quantization then switch to concrete ADC architecture

## Ideas on digital downconversion topic

Hi, I hope you are not looking for DIRECT digital down conversion. I had used digital downconversion for a GPS receiver. It is fairly easy. you follow in digital all the process of analog. However you need to be careful about sampling and quantization levels. B R Madhukar

## Determine the size of the frontend sampling capacitor in ADC

Hi all, I am wondering for a 12-bit resolution ADC, how big of a sampling capacitor at the front end should be in order to surpress the kT/C noise and opamp thermal noise from the later stages? Peoples used 6pf before, I think it is way too big. Any ideas?

## Why sampling is done first and then quantization??

You have to do sampling first, because remember that sampling has the time reference, that is the sampling period. quantization is just mapping a set ot measured voltages, to a set of predefined discrete voltajes, that are in turn mapped to a set of binary digital values by ADC. So in order to do this, you have to (...)

## Looking for Chang, H. paper on Presampling

Dear all I need the following the paper, but i don't access to it, if you can ,pls send it for me. thanks you for your help. Chang,H., ?Presampling filtering,sampling and quantization effects on the digital matched filter performance? Proceeding of International telemetering conference,pp.889-915,San (...)

## I need mathematical examples - digital image processing

I need mathematical examples about the subjects in image processing: -filtering in the spatial domain. -filtering in the frequency domain. - Histogram equilization. -Image sampling and quantization. -Gray Level Transformations. Anyone can help me in that?

## relationship between "sampling frequency" and &quo

Hi all What is the relationship between "sampling frequency" and "quantization noise" in audio signals?

## how to design a over-sampling filer ???

how to design a over-sampling filter to reduce quantium noise in the process of DA converting for audio playback???can you tell me the general theory about it??and what useful book i can refer to ????

## Aliasing and Sampling

Hi Process gain is defined as improvement in signal to quantization ratio when using oversampling. PG = 10 * log10(fs / (2 * BW)) BW = output BW after decimation. To calculate PG you need to know BW, so specify the output BW or decimation ratio then i can help you. Regards

## Quantization error in a duty-cycle modulated signal.

quantization error in a duty-cycle modulated signal: When a pulse train as depicted below is sampled it will result in another pulse train which represents the error. Assuming the area under the error pulses is An, then the error should be in between ?Ts and +Ts where Ts is the sampling frequency. In the paper ?Analog-to-Digital (...)

## Sound file quantization in Matlab

AoA to ALL! I want to read a sound file in matlab, and set the sampling frequency to 8K. and represent each sample in 8-bits. play the result and also plot the frequency spectrum. i expect the spectrum should be from 0 to 4khz. plz tell me how to do all these in MATLAB. simple & early reply is required.

## Correlated Double Sampling(CDS) in sigma-delta ADC

Hi, all I noticed for some SD ADC designs, ppl use CDS to decrease integrator leakage and flicker noise. For those of designs that circuit noises are the dominant noise sources (i.e. quantization noise is not so obvious), how can I model flicker noise and white noise properly if CDS is employed? thanks. -TiwstedNeurons

## SNR, SINAD, THD and ENOB measurement of an ADC using Spectre

Hi, I am trying to measure the above mentioned dynamic specs of an ADC in Spectre. My ADC is a pipelined, 8-bit and operating at 80MSPS. What i am doing is giving a sinusoidal input of 9MHz and sampling frequency of 60MHz. The input frequency i decided using fin/fs=Mc/M formula. I am using transient simulations with strobestart=1/60MHz (...)

## How can you set sampling rate of an ADC?

Hi all, I have been searching about sampling rate setting of an ADC. What is the main criteria (or criterias) of its operating rate? Clock frequency, equipment's time delays, or what? Please, would you like to explain how does manufacturer set this and how user use it? Thanks, best regards Added after 12 minutes

## Does increasing sampling size help to keep noise down ?

Does increasing sampling size help to keep noise down or is there any method to keep noise down by increasing samplng size if the noise is a fixed but unknown constant or gaussian in nature? Thanks

## Sampling capacitor size of ADC

In 2001, Abidi published a paper of "A 6-b 1.3-Gsample/s A/D Converter in 0.35-um CMOS". Only 6-bit resolution is required, however, Abidi and Michael Choi added 1pF as input sampling capacitor. The thermal noise due to KT/C is only about 2mV, which is much lower than LSB quantization noise. Why they put so much capacitance there (...)

## what is the difference between harmonic and spur?

I want to know the relation of spur and non-linearity in ADC and what is the difference between harmonic and spur? in ADC because of non-linearity, input driving and s\h circuit at output we see that harmonics of input signal appear at ADC spectrum. The ideal ADC has the quantization noise (...)

## what is the difference between harmonic and spur?

I want to know the relation of spur and non-linearity in ADC and what is the difference between harmonic and spur? in ADC because of non-linearity, input driving and s\h circuit at output we see that harmonics of input signal appear at ADC spectrum. The ideal ADC has the quantization noise (...)

## Why do we use the quantization process?

After sampling the discrete signal has to be rounded to its nearer digital value. hence we go for quantization.

## question on resolution of DTFT

Hi! What type of resolution: * in amplitude, in phase, in frequency, etc.? Normally you should know at least: * the signal sampling factor (SSF) N = Fdigitalization /F signal * the number of the accurate bits n * the moment (angle) of the first sample * the total number of bits * the frequency band of the signal... BR

## regardin the SNR of ADC

hi one query for 10bit Nyquist Rate ADC . i am giving 1k signal input and sampling frequency is 4MHz. then what snr i expect therotically. snr = 6.02N+1.76 ==> 61.96dB but i have seen the snr equation is SNR=6.02N+1.76+10log(OSR) here i am applying the input fin=1k and fsamp= 4M so the OSR = fsamp/2*fin = 4M/2K = 2000 hence total (...)

## FFT window, Quantization and Noise Floor

If you do not use "coherent sampling" you need to apply a window function to your signal before the fft, see below.nsignal=4096; fs=44100; f=1001*fs/nsignal; % coherent sampling i.e. integer number of cycles (1001) in nsignal samples %f=1000; %non-coherent sampling. Use hann window below t=/fs; y=1*sin(2*pi*f*t); w=ones(nsignal,

## Delta Modulator Quantization Noise

Hello, I am trying to implement a behavioral model of a delta modulator in Matlab, consisting of an ideal comparator and a summing unit in the feedback path. Unfortunately the spectrum is not flat as expected and I get peaks at odd harmonics of the signal frequency (cf. attachment). Does this behavior occur because the quantization noise (...)

## Phase uncertainties and signal sidelobes

Look into jitter analysis of ADC's, Phase modulation, and DDS systems. Each can be helpful. the uncertainty generates sidelobes for the same reason phase modulation does. The equivalent index is low, so you probably will only see one sidelobe. The effects become more pronounced for high-speed ADC's sampling signals above Fs/2 (bandpass (...)

## Relation between sampling & resolution

Hi amit, Bit Rate Resolution: Ok let separate these words like Bit Rate (BR) Resolution just to understand. Bit Rate is defining the rate of bits, Binary Digits 0, 1, 0, 1 (per unit time i,e; Second). Now if we divide the 1 second into 10 and then we divide it into 20, in first case we will have 10 happenings in one second and in seco

## How to do analysis and comparison of Analog Integrator vs. Digital Integrator

Runge Kutta is for solving differential equations, which is a completely different problem than calculating the integral of a sampled waveform. Provided that the requirements of the sampling theorem are fulfilled (no spectral components of the signal higher than 1/2 of sampling frequency), the time-discrete signal processing operations can be exact

## i need help ( compression ecg data with wavelet and max lloyd quantifc )

i have code matlab of this compression but i have a probleme in the party of lloyd max ? i need for ur help plz i put only the party of max lloyd quantification % Lloyd-max algorithm using signal values % Signal : Signal Vector % tol : Tolerance % Initial : sampling levels % dist : distortion % qua

## A few DAC and ADC questions

Came across these on a website, no answers though.. Guess it would be benificial to everyone if we can answer these! 1. What are the factors you consider for the selection of ADC ? 3. How do you determine the number of bits of ADC is required for you ? 4. Which factor determines the number of iterations in SAR done to approximate the input

## Digital PID Controller

designing digital pid... well,are u familaiar with Digital Signal Processing? if no,u can learn it very fast specially i recommend u to read the well known book writen by Alan V.oppenheim:Discrete-Time Signal Processing designing a digital copy of an analog system like filters and controllers with feed back is described in this book chapter seve

## How to decide threshold for quantizing of signal detection?

In general some should look at the dynamic range of the signal to be quantized. For instance if some assume a sensor with signal of 1 mVrms and noise of 10 nVrms over the sensor signal bandwidth, the dynamic range is 10^5. For an ADC to accuratelly quntize such signal, the ADC quantization noise (Q/SqRt(12)) RTI should be at least three (...)

## How to reduce the "In-band noise"?

Hi, Noise in pass band is mainly due to 1) Amplification of thermal noise in the band of interest. Remember that most of the times thae gains will be around 100dB or more in RF systems. 2) Intermodulation products, Harmonics of clocks, etc contribute more noise. 3) quantization noise during sampling if any (...)

## Noise shaping filter - any suggestions?

Hi, SDM increases the sampling rate and using a Delta modulator kind of structre reduces the quantization noise. However this comes with a price. You need to use more number of bits for representation. It is very expensive for communication receivers. I hope you have considered this. B R Madhukar

## Help me choose DSP filter IC

I need you advice in choosing a precise DSP filter. I need an DSP chip. IC. I like to use it this filter as notch Filter to block certain frequency range but not limited of being flexible as an application may want. Frequency range to block is 0.5Hz to 2Hz, or 0.5-1Hz. The signal passing this filter will be a sinusiod from 0.1Hz to 10H

## How to calculate SNR in sigma delta modulator?

Well, it really depends on what 'order' of SD adc you have. The SNR is related to the resolution of the convertor and the amount of quantization noise. Here's the way of calculating it: I was always told in university that whenever you double the samping frequency, its like adding another bit and a half to the resolution. But thats (...)

## Parameters determining ADC dynamic range

The quantization noise is spread across the frequency range from 0 to the sampling frequency. If you sample twice as much, the qunatization noise density is half. It is to your advantage to sample much higher than the Nyquist frequency. If you do not want to carry the high data rate further in the system, you can low pass filter using more bits

## signal generator question

What is your DAC sample rate? I'm guessing it's slower than 24MHz. As brmadhukar suggests, you need a low pass filter after the DAC to reject sampling images (they look like stair steps on an oscilloscope). Design a filter that passes the frequencies you want, and strongly attenuates the sample rate and higher.

## Need help for capacitor layout

Hi, I am desiging a sigma-delta modulator in 0.35um technology having 5-bit coarse quantization. For the switch capacitor integrator, I have chosen 32 sampling capacitor (Cs) of value 0.3pF each. and the value of integrating capacitor (Ci) is 32*0.3=9.6pf. Please suggest me some good layout technique for capacitor of this much large (...)

## ADC questions on PCM system

Hi Kris, on the fly I can answer question 2. You have a 10 bit resolution that means 2 in the power of 9 ( binary: 2x1+2x2+2x4+....+2x512=1023 ==>1111111111 max value) or 1024 different combinations. That means that 1 bit represents the analog value of 5V /1024= 0.02441 V is your sensitivity. so if you now measure 0.2 the output will be 0.2/0.024

## Question about SNR of DAC

SNR is in the desired bandwidth. If you oversample, the quantization noise is spread over a wider frequency range and the noise in your desired signal bandwidth goes down. You have to LPF the DAC output because it makes signals at large multiples of the sampling frequency plus and minus (...)

## Digital signal processing

i think your question is not so clear... basically, to convert an analog signal to digital: sampling then quatization.

## Noise folding in TDMA system

I has these IEEE papers about NOISE FOLDING and could upload them: 1. An approach to tackle quantization noise folding in double-sampling /spl Sigma//spl Delta/ modulation A/D converters Rombouts, P.; Raman, J.; Weyten, L.; Circuits and Systems II: Analog and Digital Signal Processing, IEEE (...)

## question of sigma delta simulation

what is the resolution in ur design? if the resolution is small then how much is the quantization noise level? if big then how about the thermal noise in the sc? how about the dc gain of ur opamp? if everything ok, then you have to increase the # of points in fft and meantime you have to use coherent sampling,that is u have to make sure (...)

## Why is dithering needed?

In audio signal compression, people would like the quantization to be white and independent of the signal. To this end, the characteristic function of the signal should be "bandlimited". Dither is like antialiasing filter in sampling theory to limit the "band" of the signal's characteristic function when (...)

## SNR @ input of A/D converter [hlp]

Hi I can give some ideas about how to caculate needed SNR at the input to the ADC. Obviously this is heavily dependent on ADC dynamic range, SFDR, sampling rate and more .... I think that the best solution is to study a complete datasheet of an ADC. is a very great source. Also texas instruments provides valuable info.

## How to resolve a large odd harmonics issue in ADC?

I am designing a 10bit pipeline ADC. The schematic simulation shows that the odd harmonics are too large(especially,the third harmonic is 55dB). Can anybody give me some suggestion on how to find the reason? Thanks. sampling swith opamp (settling time) reference (settling time)

## Problem with pipeline ADC harmonics

I think Fin and Fsample shoudl satisfy: fIN / fSAMPLE = NWINDOW / NRECORD, fIN: Periodic input signal fSAMPLE: sampling/clock frequency of the ADC under test NWINDOW: Integer number of cycles1 within the sampling window, prime number NRECORD: Number of data points in the sampling window or FFT

## thesis:A Superconducting Bandpass Delta-Sigma Modulator

Thesis: A Superconducting Bandpass Delta-Sigma Modulator for Direct Analog-to-Digital Conversion of Microwave Radio by John Francis Bulzacchelli Massachusetts Institute of Technology,2003 This thesis examines the potential of superconducting technology for realizing RF analogto-digital converters (ADCs) with improved performance. A bandpass