1000 Threads found on edaboard.com: Sampling And Quantization
i have one doubt.
when A and B system are cascade, then if the system is linear time invariant system even A and B are interchanged, no change in result.
quantizer is a nonlinear system. but even the sampling and quantization is interchanged the entire result is unchanged and same result (...)
Analog Circuit Design :: 08-13-2013 11:04 :: rameshbalan :: Replies: 3 :: Views: 244
When you sample a continous signal (a continous signal is something like sin(w*t), you can find its value for any time t), the signal exists only at the sampling instant (like t=1s, 2s, 3s, ...). Else the signal is not zero, but doesnt exist.
The signal can be quantized, which means that the signal is now restricted to have a few voltage level
Digital communication :: 08-17-2007 01:09 :: bulx :: Replies: 2 :: Views: 3086
There are a few problems with your code...
The best way to define a sinewave is:
N=2^n; % simulation length
fs=1e2; % sampling frequency
t=(0:N-1)/fs; % time (sampling points)
f=3*fs/N; % sinewave frequency
x=A*sin(2*pi*f*t); % cw sinewave
r=10; % number of bits of resolution
R=2^R; % number of quantization levels
Digital Signal Processing :: 02-05-2010 14:27 :: JoannesPaulus :: Replies: 7 :: Views: 1968
i just need any one know a link for a site descripe natural sampling and flat topped sampling in details specially the equations
thanks for your help
Digital Signal Processing :: 01-18-2004 19:35 :: asic1984 :: Replies: 0 :: Views: 1753
you have already implented an aliasing example. now you are sampling every 10th zero crossing of the sinusoid signal. for instance set interval now to 950 and you will see a sinus with a frequency of 50.
Digital Signal Processing :: 10-19-2006 09:17 :: eda4you :: Replies: 1 :: Views: 818
why do you want exactly to do?
are you using a software ?
Added after 7 minutes:
why we need to sample a signal, conv,fft,and filter..
if anybody knows please tell me step wise why we need these parameters in signals,during signal analysis....
if we need to
Digital communication :: 03-29-2007 17:21 :: pouchito :: Replies: 9 :: Views: 1157
What is different sampling and modulation ?
Analog Circuit Design :: 07-31-2009 03:20 :: gmcfilter :: Replies: 1 :: Views: 1248
When I was trying to design a sampling and hold circuit as shown in the following figure, I met a problem about the opamp in the circuit. The question is that, is that ok if there is no input DC voltage bias for the opamp in the hold period? When I was simulating the circuit, the output is ok as expected, but is the simulation really cor
Analog IC Design and Layout :: 02-03-2010 02:26 :: abcyin :: Replies: 5 :: Views: 1063
I think you need some basic understanding of ADC. First sampling and quantization then switch to concrete ADC architecture
Analog IC Design and Layout :: 03-06-2011 06:58 :: wanghs1986 :: Replies: 14 :: Views: 1573
hi friends. i am doing my final year project titled "FPGA Implementation of Pipelined 2D-DCT and quantization Architecture for JPEG Image Compression". I have completed the coding in verilog. I need help from you for preparing my project report. I am not able to find enough materials on internet. can any one who has done a similar project mail me s
PLD, SPLD, GAL, CPLD, FPGA Design :: 05-05-2012 06:22 :: bdeepak2191 :: Replies: 0 :: Views: 589
i have one doubt.
what is difference between normal sampling and area sampling. why we need area sampling?
Microcontrollers :: 08-08-2013 12:41 :: rameshbalan :: Replies: 0 :: Views: 150
I would like to ask for you help to come out with an accurate answer for the following two (2) tasks.
1- System analysis
2- sampling and reconstruction
Thanks in advance!
Digital Signal Processing :: 01-28-2014 17:43 :: noel_t :: Replies: 0 :: Views: 269
I need a simple code for sampling and reconstruction the signal with matlab
Digital communication :: 06-01-2014 04:10 :: m_mohanes :: Replies: 2 :: Views: 303
I hope you are not looking for DIRECT digital down conversion.
I had used digital downconversion for a GPS receiver. It is fairly easy. you follow in digital all the process of analog. However you need to be careful about sampling and quantization levels.
RF, Microwave, Antennas and Optics :: 01-26-2005 02:33 :: brmadhukar :: Replies: 2 :: Views: 736
I need the following the paper, but i don't access to it, if you can ,pls send it for me.
thanks you for your help.
Chang,H., ?Presampling filtering,sampling and quantization effects on the digital matched filter performance? Proceeding of International telemetering conference,pp.889-915,San (...)
Digital communication :: 01-31-2008 04:08 :: scottxin :: Replies: 1 :: Views: 1220
I need mathematical examples about the subjects in image processing:
-filtering in the spatial domain.
-filtering in the frequency domain.
- Histogram equilization.
-Image sampling and quantization.
-Gray Level Transformations.
Anyone can help me in that?
Digital Signal Processing :: 01-05-2009 05:33 :: ahmadaltaan :: Replies: 1 :: Views: 612
To convert an analog signal into digital signal two steps are required
We can perform these operations in any order to get a digital output.But why it is common to do sampling first?
Looking forward for reply.
Thanx in advance.
Electronic Elementary Questions :: 03-10-2006 11:34 :: sheraz.pervaiz :: Replies: 16 :: Views: 4224
What is the relationship between "sampling frequency" and "quantization noise" in audio signals?
Digital Signal Processing :: 03-05-2010 04:31 :: meher81 :: Replies: 0 :: Views: 749
such maximum value must be specified at the same time with the resolution. different resolution have different maximum speed achievble.
In CMOS, 8-10bit pipelined ADC fs,max is around 200 MHz.
Maximum bit per stage depends on the typical applications, but usually maximum 3.5b per stage. more bit per stage leads to slower sampling and large po
Analog IC Design and Layout :: 10-07-2004 14:41 :: terryssw :: Replies: 1 :: Views: 1246
Correlated double sampling (CDS) is a particular case of auto-zeroing.
You can refer to this paper:
Enz, C.C.; Temes, G.C. ?Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization? Proceedings of the IEEE Volume 84, Issue 11, Nov. 1996 Page(s):1584 - 1614
Analog Circuit Design :: 10-13-2005 10:13 :: Alles Gute :: Replies: 1 :: Views: 1225
Can someone please advise me, what does it mean by normalised sampling?
How to perform sampling in the first place?
I've tried to perform FFT in Excel.
In Column A, I have input value time 't'=0, 1, 2, 3, 4, 5...., 62, 63
then in column B, i have rect(t)=1, 1, 1, 1, 1, 1,..., 0, 0
Next, i perform FFT based on rect(t) and (...)
Digital Signal Processing :: 02-23-2006 10:11 :: sulphine :: Replies: 0 :: Views: 511
I am wondering for a 12-bit resolution ADC, how big of a sampling capacitor at the front end should be in order to surpress the kT/C noise and opamp thermal noise from the later stages?
Peoples used 6pf before, I think it is way too big. Any ideas?
Analog IC Design and Layout :: 03-09-2006 06:12 :: Analogworld :: Replies: 3 :: Views: 1362
What are the differences between bit rate and Max IF sampling in A/D?
and how it is settle with the Nyquist criteria?
Because I have seen a TI ADS5545 with 170Msps bit rate and 500MHz IF sampling frequency :?::!:
Thank you all
Analog IC Design and Layout :: 11-28-2007 10:58 :: sagivitzik :: Replies: 8 :: Views: 1913
I need to remember the answer of a question. But I cant handle the equation now.
At BSC side of GSM speech transmits to BTS side at 260 bits over E1 and at BTS it has been coded to 456 bits and transmit over 20ms blocks so gross total we have a 22 kb/s data rate. We assume the sampling frequency (...)
Digital communication :: 01-15-2010 03:24 :: WimaxforVideoPhone :: Replies: 0 :: Views: 739
I was wondering when you use jpeg or mpeg encoding softwares for encoding video, you vary two factors qf and qp.
you write something like this -qf 10 ....
and -qp 23
either you vary quantization parameter(qp) or quality factor(qf)
My ? is is quality factor of 5 equal to quantization parameter of (...)
Digital Signal Processing :: 12-15-2010 17:00 :: er.twi.fb :: Replies: 0 :: Views: 640
I am building an optical OOK (On off Key Ring) system without a carrier frequency. . Essentially, the presence of signal indicates one and lack of it indicates zero. I have a precise clock that is synced with transmitter. The
Digital Signal Processing :: 01-28-2012 09:24 :: frankqt :: Replies: 1 :: Views: 314
Hi dear all:
it is because that periodical sampling would aliasing the high frequency noise into low frequency, so that the thermal noise should be integrated from 0 to unlimited high frequency, isn't it? But now my ADC is used in an image sensor and the sampling operation is not periodical. So:
(1)what is the proper integration frequency (...)
Analog Circuit Design :: 02-01-2012 22:19 :: chaojixin :: Replies: 0 :: Views: 319
CW measurements are long term averages. For constant amplitude signals the peak and average are the same. Pulse measurements give the power during the pulse. This can be peak during the pulse or average during the pulse. If you put a pulse signal to an average reading meter you will get a very low reading of approximately the duty factor multip
RF, Microwave, Antennas and Optics :: 02-24-2004 10:43 :: flatulent :: Replies: 2 :: Views: 1421
Does someone know how to generate reentrant interrupt code in C with code composer 2.2 or 4.12 on EZDSP2407 and how to write the code. i would like to do this because during a 40kHz interrupt i have to make calculus that are longer than the interrupt period and to sample some analog signal at this frequency, the long calculus are made every
Digital Signal Processing :: 08-31-2004 11:13 :: belzebuth :: Replies: 1 :: Views: 911
I'm interfacing a thermocouple (type K)to a CY8C26443 chip. Thermocouple to the INSAMP (Ref = AGND) then to the ADCINC12 (REFMUX = 2BG +/- BG). I've applied the (Correlated double sampling and IIR software filter) to nuteralize the offset voltages and signal noise. The main problem is: i get a correct readings out of the ADC (-800 (...)
Microcontrollers :: 11-10-2004 07:08 :: Bus Master :: Replies: 1 :: Views: 1809
I'd like to design DSM.
While I study the basic principals in DSM design, there are some questions.
which is the relationship bet. "loop filter gain" and "quantization noise"?
RF, Microwave, Antennas and Optics :: 11-22-2004 07:35 :: selene282 :: Replies: 1 :: Views: 954
Hi, there are some techniques that can be used to reduce flicker noise of opamp. For example, autozeroing, correlated double sampling and chopper stablization techniques.
Analog Circuit Design :: 10-14-2005 09:44 :: pseudockb :: Replies: 10 :: Views: 2296
when you are doing 1st option, are you using bottom plate sampling?
Analog IC Design and Layout :: 03-12-2006 09:37 :: neoflash :: Replies: 9 :: Views: 1661
in general: A preamble is used in Digital Communication Systems to train the VCO of the receiver to the incoming signals's clock so as to produce a clocking in the reciver that is synchronized to the received signal, and so a perfect sampling and/or demodulation can be done.
Secondly: The pilot symbols are used in wireless communication (...)
Digital communication :: 04-08-2006 20:56 :: shedeed :: Replies: 2 :: Views: 5559
I have seen some echo and reverb solutions, but all have some complexity.
Mechanical: use of a delay line (coil) and piezo transducers in each tip.
Magnetic: a closed short magnetic tape (ring) with two heads (one for recording and one for reading).
sampling and memory: a special IC converting (...)
Analog Circuit Design :: 04-20-2006 12:49 :: rkodaira :: Replies: 4 :: Views: 2589
This paper maybe useful for you.
1. Circuit techniques for resucing the effects of op-amp imperfections: autozeroing, correlated double sampling, and chopper stabilization, IEEEE, invited paper
Analog IC Design and Layout :: 05-31-2006 06:16 :: philipwang :: Replies: 5 :: Views: 1416
Designing a 10Mhz analogic bandwidth DSO is not a simple thing even with FPGA.
An old and reference design could be found here:
Remember that 10Mhz analogic bandwidth means at least 20MHz Nyquist sampling, and an oversampling up to 40MHz will probably be necessary for aquiring all kind (...)
PLD, SPLD, GAL, CPLD, FPGA Design :: 11-11-2006 03:24 :: melc :: Replies: 9 :: Views: 1182
I am engaged in a project which need to process digital IF signal. The passband sampling theory shows that when we sample a signal based on the theory, we can get the signal in the base band. But when I read some references , they show me that the digtal down converter prevail against the passband (...)
Digital Signal Processing :: 11-10-2006 02:13 :: agump :: Replies: 5 :: Views: 1489
what is sampling?
and question related to it.
as this is the very first step.
Electronic Elementary Questions :: 12-09-2006 08:40 :: nexgen :: Replies: 1 :: Views: 962
The sampling theorem was implied by the work of Harry Nyquist in 1928 ("Certain topics in telegraph transmission theory"), in which he showed that up to 2B independent pulse samples could be sent through a system of bandwidth B; but he did not explicitly consider the problem of sampling and reconstruction of continuous (...)
Digital communication :: 03-30-2007 17:23 :: bee :: Replies: 5 :: Views: 5721
I have a question about frequency spectrum (components) after sampling. Lets assume that the frequency content before sampling is:
-a band of frequencyes between 5kHz~10kHz
sampling frequency is: Fsampling=800kHz and what interests us are frequencies (...)
Electronic Elementary Questions :: 06-16-2007 21:43 :: iggyboy :: Replies: 0 :: Views: 655
hi guys , I want to ask something .
How does the CD work ? I am doing the digital class D amplifier, in this small part digital PWM . My system will receive the PCM signal and then transfer it to the PWM before put it through the LPF to get the analog signal . So that is why i need to know the format of the output from the CDs , Is it the sequ
Digital Signal Processing :: 10-02-2007 12:08 :: clarken :: Replies: 0 :: Views: 513
i was wondering if someone can provide any data/sources/links about non-uniform sampling and how to reduce its effect using signal processing techniques
Digital Signal Processing :: 06-11-2008 03:05 :: safwatonline :: Replies: 0 :: Views: 572
I'm interested in variants of time equivalent sampling and how to choose the parameters, time delays neccessary in a typical application, like an oscilloscope.
Most of what i seen only present briefly the principle, if you know a paper/tutorial preferably with examples, please post.
Analog Circuit Design :: 06-12-2008 13:54 :: Eugen_E :: Replies: 0 :: Views: 475
limit white noise x(t) with PSD of S0 is sampled (no aliasing) to produce x. The PSD of x is calculated to be S0/Ts (Ts is the sample period).
Now I just reconstruct the continuous noise xr(t) by passing x impulses to the ideal reconstruction filter (gain=Ts, -fs
Digital Signal Processing :: 10-12-2008 03:50 :: qslazio :: Replies: 0 :: Views: 470
what is ment by "saturation" and "rounding"
Digital Signal Processing :: 03-06-2009 03:02 :: elec-eng :: Replies: 3 :: Views: 1264
What type of resolution:
* in amplitude, in phase, in frequency, etc.?
Normally you should know at least:
* the signal sampling factor (SSF) N = Fdigitalization /F signal
* the number of the accurate bits n
* the moment (angle) of the first sample
* the total number of bits
* the frequency band of the signal...
Digital Signal Processing :: 09-08-2009 03:04 :: Petre Petrov :: Replies: 4 :: Views: 550
I am working to realize HSP50110 / 50210 architecture, used for demodulation in MATLAB and FPGA. I started with MATLAB's inbuilt example "symbol timing recovery with fixed sampling" and extended the design for HSP50110. I tried to replace Squaring loop method with either Gardner or Early-late Gate algorithm, but no success. (...)
Digital communication :: 12-02-2009 02:24 :: mpatel :: Replies: 0 :: Views: 577
hi one query
for 10bit Nyquist Rate ADC .
i am giving 1k signal input and sampling frequency is 4MHz.
then what snr i expect therotically.
snr = 6.02N+1.76 ==> 61.96dB
but i have seen the snr equation is SNR=6.02N+1.76+10log(OSR)
here i am applying the input fin=1k and fsamp= 4M
so the OSR = fsamp/2*fin = 4M/2K = 2000
hence total (...)
Analog IC Design and Layout :: 08-13-2010 00:35 :: manissri :: Replies: 5 :: Views: 1081
dear members can any one help me in implementing this project plssssssss
i had my 2d-dct block part completed and i need help in designing of quantizer and zigzager blocks in that or i request u to give me codes for that so that i vl try my level best to do that
kindly help me out
i requesting all kind hearts or rather plesing u to atmost
PLD, SPLD, GAL, CPLD, FPGA Design :: 05-23-2011 08:28 :: prakaash3442 :: Replies: 0 :: Views: 762