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1000 Threads found on edaboard.com: Sequence Detector
so easy problem.... search 'sequence detector' in google.
hi iam doing vlsi diploma in scl. iam getting lot of douts on fsm specially sequence detector like 100010110 for this type and also 1100xx10 with overlapping and nonoverlapping can any one explain how to draw state diagram for this type of problems
hello any one have a good material about the ML sequence detector and symbol-by-symbol MAP detector, specially the mathmatics and the probability to be very clear and easy to understand, i.e.: step by step explanation. of cource other than Praokis's book. Regards
Hi all, I need detailed information regarding sequence detector.Can any one send me where can i get this? Thanks in advance Reddy
Hi, if i remember correctly, then Prof. Srinivasan in this lecture, implements twice this sequence detector... The one of the two implementations he talks about is the one you are interested in... I believe that it should be best for you if you carefully watch this presentation and then come up with a solution. We will hel
I am new to verilog, and need to simulate a 4-bit pattern/sequence detector into modelsim and then Xylinx for the spartan 3 board. The pattern that needs to be dected is 1101. Any help would be greatly appreciated!
Can any one tell about the VHDL code for an asynchronous sequence detector(i.e. without any clock input and only data input).Output should change as soon as input changes.(For 2 bit or 3 bit input)
Hi, I am developing VHDL code for 0101 sequence detector. When i simulate, i get 0 output no matter what the sequence is. I have used JK flipflop to implement the design. In my code, im calling JK ff through component port-map. JK ff works fine individually but in the top-level module, its output is always zero. there's some warning when i (...)
As you are designing non-overlapping sequence detector, if circuit is in E state and it gets input 0, it will go to state A with output being 0. You will write it as 0/0. Do you need any other help with state machines? All the best!
Here the code for a 11010 sequence ------------------------------------------------------------------------------------------ module seqdet_11010(clk,reset,in,out); input clk,reset,in; output out; reg out; parameter st0 = 3'b000, st1 = 3'b001, st2 = 3'b010, st3 = 3'b011, st4 = 3'b100
Hi, I need to design a 1001/1111 sequence detector which produces a 1 output if the current input and the previous three inputs correspond to either the sequence 1001 or 1111. The output 1 is to occur at the time of the forth input of the recognized sequence.
For a sequence of 1010 i.e. 4 bit number , you require 4 states . After detecting all 4 bits correctly , output will be 1. You can use mealey or moore techniques. Lecture 7 - Sequentional Circuits Design - YouTube
See the ''11011'' sequence detector as an example. ---------- Post added at 10:57 ---------- Previous post was at 10:53 ---------- Example how to implement 1011 sequence detector circuit in VHDL:
I want to design a circuit that will detect a very long sequence, A2 F3 D2 F1 E4 17 AB 56 76 A2 C4 B2 FF 00 12 34 AA BB B3 A4 6E 1F 4D 1E, where all numbers are hexadecimal and hence every pair forms a 8 bit pattern ( ie 1E = 00011110 ), it also needs to set a flag bit high if one number (e.g A ) is detected, and another flag bit high if the entire
Just try to draw state diagram with tour required sequence and ask for the clarification..simple one
A finite state machine has a limited or finite no. of possible is mainly used as a development tool for solving problems. For example in DIgital electronics a sequence detector problem- which has to detect a particular pattern only and provide output only for the required pattern. A infinite state machine can be conceived but it is not pr
It's maybe for sequence detection. The register previous is to store input streem.
Hi The hint given by you is good. I work it and find the answer. I have another Question 1.How to detect a sequence of "1101" arriving serially from a single line? 2.How to detect if two 8-bit signals are same? Regards... Draw a state diagram for a sequence detector (overlaping or non-overlaping). The
hello we can detect a modulation technique with memory by using either ML sequence detector or symbol-by-symbol MAP detector. this is explained in "Digital Communication" Proakis, but it is very hard to understand. Any one have a good resources for this material and the original papers. Regards
Hi, I need to design a 0110/1001 sequence detector which produces a 1 output if the current input and the previous three inputs correspond to either the sequence 0110 or 1001. The output 1 is to occur at the time of the forth input of the recognized sequence. Anyone can draw the state transition diagram? I'm not sure the (...)
hi friends, plz send me materials or links related to design a vhdl code for mealy and moore finite state machines for overlapping and non-overlapping binary sequence detector and its state diagrams. thanks in advance
this is my assignment that due this sunday. anyone can help me? or give me any direction for this? thank you :) 1. sequence detector to design (150) Lee's student ID number of each of their four remaining divided by the sequence to recognize a pattern to design the sequence detector. (For (...)
May I know what is the sequence to find the three phase bridge rectifier ? Can some one explain in detail?
first mistake is that if it is a sequence detector input must b of one bit only with one bit coming in on in every clock cycle. u have to make a state machine first. i think it will have 12 stages hence 4 flip flops must be used to control state vectors. Make a state machine and do the verilog coding for the same.
Actually, in my code the process1 contains the sequence detector i.e. when the sequence is detected then the pulse is generated which is assigned to 'a' and in process2 when there is rising_edge(clk) and sequence is detected then c <= d. I cannot enable c with b since b is sequence detector (...)
I have generated 0.5 Mhz clock from 50Mhz incoming clock by using synchronous counter clock enable and detecting the 00110001 pattern on the din input data and outputting (sync_detected) pulse once the last bit in the pattern is detected. When I implemented the code that is mentioned below I am able to generate the waveform in the image (I have zoo
I recently read abt registerd FSM outputs i.e Registered Moore outputs and Registered Mealy Outputs , Can anybody explain wat is FSM output registered ? I did verilog coding for 1011 sequence detector for both moore and Mealy machine and I got the output like in the Image there is one clock dealy in the moore is it correct ?? Can anybody explai
need a circuit for a phase sequence/phase failure detector in a three phase ac power supply
You should use the following sequence: wire antenna, broad band RF amplifier, diode detector, indicating method. A simpler method which is not as sensitive is the wire, diode, oscilloscope.
hi i would like to know how can i make a phase sequence using microcontroller and how can define the phases ( r s t ) and ( r t s ) thanks
Hi guys. I have started a short project about color lighting RGB Led is sequence to strike their light onto the object i want to detect, then LDR will get the reflected light from the object and make the voltage drop on the circuit(voltage devider).the voltage drop will get digitized by the ADC0831 to microproccessor(AT89S51) which pro
you can use 2 dffs serialy connected, and use a counter at the same time; of cource the counter bits, u need to watch the i/p sequence firstly; after reset and the stop signal is unenable, the initial 2DFFS are:00,then begin to capture the reading in bit from i/p sequence serialy, u just need to dectect and judge the posedge edge 10 (that 2DFFS
Hi,, I need to design a pulse detector system which senses the input pulses and outputs a BCD digit,1. The input to the system is a pattern of pulse sequence with 60 msec ON followed immediately by 40 msec OFF. (Used in old telephone pulse dialing systems). The system counts such continuous pulses to detect a dialed number. How to generate tha
I am looking for metal detector's shematic based on microcontroller. I'm especially interrest by the tesoro's metal detector shematics. If someone could help me. Thanks
to anyone with an interest here are the coils dimetion and a picture here is the coil calc i used the dimentions are this center coil 44T .51 7 cm sides equal sided triangle second coil out is round 10 cm dia 33 T .71 third is triangle equal sides so 25 T .51 mm fourth is round 22cm d
Hi guys! I'm looking for any schematic, pcb etc about metal detector. Only thing I need is a WORKING CIRCUIT. I anybody know where to find it, please tell to me. I´m looking metal detector schematics, pcb's theory, or any related thing, specially any circuit easy to make it.
Hi! For example, RFMD's RF5117 and Intersil's ISL3984 Does Somebody know how to design the peak detector(or power detector) for WLAN HBT power amplifier? Thanks!
Hi! For example, RFMD's RF5117 and Intersil's ISL3984 Does Somebody know how to design the peak detector(or power detector) for WLAN HBT power amplifier? Thanks!
Can anyone help me to find resources about RF/ID detector design?
Are there anybody can share the Pyro-IR detector LHI958 (by HEIMANN) Datasheet or Appliction Note with me? Thanks!
Hi all, Does anyone know a manufacturer of this kind of systems? (I'm looking for a simple one, just needs to send an impulse when he detects a car, not a complex one, like 3M, with time-stamping etc.....) Thanks in advance P.S: it should be able to detect both stoped and moving vehicles.
Hi , I am looking for the schematics of LPG gas detector using Figaro's LPG gas sensor TGS 2610, I have the sensor application note but the sample schematics doesnot work properly, please any one out there help me out thanks :?
hi, AVR based metal dedector.
I´m nedding schematics of pico ammeter to use in a gas cromatography. FID detector
Hi all, i'm working on a MPC860 boot code software. I'd like to know the correct initialisation sequence. The one I planned is => Set IMMR and MSR => Invalidate MMU and cache => Set SIU clocks et timers => Set memory mapping (load UPM and init Chip Select Bank) => Configure MMU => activate cache and MMU => sonfigure cpm et UART on SM
You need a car detector and a simple up / down counter. The car detector can be made of two sensor. I will describe them below. The sequence of pulses from 2 sesors can tell whether a car is entering or leaving (maybe you have 2 gates for entry and exit in which case it would be even easier) the parking lot. A simple microcontroller can (...)
I want to design a simple heart beat detector which will be 3V power supply. Please give me some tips.Thanks anyway!
I'm looking for a phase detector that works from DC to 500MHz. Already search the forum and did'n find nothing. Also search Google but no conclusive material found. No experience with PLL or DPLL. Can any one help me. Thanks.
sequence ports EDA tools to Linux By Richard Goering, EE Times Jun 17, 2003 (10:55 AM) URL: SANTA CRUZ, Calif. ? sequence Design this week (June 17) is announcing that it is porting all of its EDA tools to Linux. The company also claims to be experiencing significant run-time speed ups with th
EE Times June 17, 2003 (1:55 p.m. EST) SANTA CRUZ, Calif. ? sequence Design this week (June 17) is announcing that it is porting all of its EDA tools to Linux. The company also claims to be experiencing significant run-time speed ups with the open-source operating system. According to sequence, internal tests reveal that the PowerThe