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34 Threads found on Sequence Detector
hi what is difference between overlapping and non overlapping sequence detector finite state machine ?? Check this link for understanding the difference between them.
Just try to draw state diagram with tour required sequence and ask for the clarification..simple one
As you are designing non-overlapping sequence detector, if circuit is in E state and it gets input 0, it will go to state A with output being 0. You will write it as 0/0. Do you need any other help with state machines? All the best!
I recently read abt registerd FSM outputs i.e Registered Moore outputs and Registered Mealy Outputs , Can anybody explain wat is FSM output registered ? I did verilog coding for 1011 sequence detector for both moore and Mealy machine and I got the output like in the Image there is one clock dealy in the moore is it correct ?? Can anybody explai
Hi, I am developing VHDL code for 0101 sequence detector. When i simulate, i get 0 output no matter what the sequence is. I have used JK flipflop to implement the design. In my code, im calling JK ff through component port-map. JK ff works fine individually but in the top-level module, its output is always zero. there's some warning when i (...)
I have generated 0.5 Mhz clock from 50Mhz incoming clock by using synchronous counter clock enable and detecting the 00110001 pattern on the din input data and outputting (sync_detected) pulse once the last bit in the pattern is detected. When I implemented the code that is mentioned below I am able to generate the waveform in the image (I have zoo
I want to design a circuit that will detect a very long sequence, A2 F3 D2 F1 E4 17 AB 56 76 A2 C4 B2 FF 00 12 34 AA BB B3 A4 6E 1F 4D 1E, where all numbers are hexadecimal and hence every pair forms a 8 bit pattern ( ie 1E = 00011110 ), it also needs to set a flag bit high if one number (e.g A ) is detected, and another flag bit high if the entire
How do you detect a sequence of "1010" arriving serially from a signal line? please help me to solve the problem. thank you.
Draw a synchronous sequential circuit with a single input line x and a single output line z ,so as to produce an output z=1 whenever a input sygnal completes a sequence of 4 identical bits,the out is 0 otherwise.Please write the boolean function expression
For a sequence of 1010 i.e. 4 bit number , you require 4 states . After detecting all 4 bits correctly , output will be 1. You can use mealey or moore techniques. Lecture 7 - Sequentional Circuits Design - YouTube
you can use 2 dffs serialy connected, and use a counter at the same time; of cource the counter bits, u need to watch the i/p sequence firstly; after reset and the stop signal is unenable, the initial 2DFFS are:00,then begin to capture the reading in bit from i/p sequence serialy, u just need to dectect and judge the posedge edge 10 (that 2DFFS
May I know what is the sequence to find the three phase bridge rectifier ? Can some one explain in detail?
Use phase control at the required brightness level in normal circumstances and use a PIR motion detector to detect a movement and trigger full phase angle for full brightness for a predetermined time. Write a program with the said sequence an dprogram the PIC. But its quite easy to do this even without any microcontroller. Just use a standared fan
this is my assignment that due this sunday. anyone can help me? or give me any direction for this? thank you :) 1. sequence detector to design (150) Lee's student ID number of each of their four remaining divided by the sequence to recognize a pattern to design the sequence detector. (For (...)
Can any one tell about the VHDL code for an asynchronous sequence detector(i.e. without any clock input and only data input).Output should change as soon as input changes.(For 2 bit or 3 bit input)
I am new to verilog, and need to simulate a 4-bit pattern/sequence detector into modelsim and then Xylinx for the spartan 3 board. The pattern that needs to be dected is 1101. Any help would be greatly appreciated!
Use the state machine approach. When the first bit (MSB here) occurs, move to the next state. If the second bit matches, move to the third state and so on till the required sequence is achieved. If, the sequence breaks in any intermediate state go back to initial state. If the sequence matches, in the last state (match state) assert the (...)
Hi! I want to design a BER Tester for measuting the sensitivity of the RF receiver. I divided the instrument design in a Pulse Pattern Generator and an Error detector. The Pulse Pattern Generator genarates a pseudo-random sequence that is sended to the modulation input of RF signal generator connected to the receiver under test. The receiver demod
The first error is that you are using the same variance for H as the noise. so that your received sequence will be a total noise and it is obvious that the BER is 1/2. you should normalize H matrix to have variance equal to one so that it won't affect the SNR. H=sqrt(1/2)*(randn.....) Also you should change your detector accordingly but I didn't u
Hi, if i remember correctly, then Prof. Srinivasan in this lecture, implements twice this sequence detector... The one of the two implementations he talks about is the one you are interested in... I believe that it should be best for you if you carefully watch this presentation and then come up with a solution. We will hel
need a circuit for a phase sequence/phase failure detector in a three phase ac power supply
I think the following diagram is valid if overlapping sequences is permitted
it involves the detection of a particular sequence and has many ways of implementation and are generally resolved using state diagram.... can you be little more specific in what you are actually looking for,.,,,,
hello any one have a good material about the ML sequence detector and symbol-by-symbol MAP detector, specially the mathmatics and the probability to be very clear and easy to understand, i.e.: step by step explanation. of cource other than Praokis's book. Regards
hi iam doing vlsi diploma in scl. iam getting lot of douts on fsm specially sequence detector like 100010110 for this type and also 1100xx10 with overlapping and nonoverlapping can any one explain how to draw state diagram for this type of problems
Hi guys. I have started a short project about color lighting RGB Led is sequence to strike their light onto the object i want to detect, then LDR will get the reflected light from the object and make the voltage drop on the circuit(voltage devider).the voltage drop will get digitized by the ADC0831 to microproccessor(AT89S51) which pro
hi all i want to know sequence detector using state matchines and i want information abt state matchines
Try the following sequence: 1kΩ 5kΩ 1kΩ Regards, IanP
It's maybe for sequence detection. The register previous is to store input streem.
A finite state machine has a limited or finite no. of possible is mainly used as a development tool for solving problems. For example in DIgital electronics a sequence detector problem- which has to detect a particular pattern only and provide output only for the required pattern. A infinite state machine can be conceived but it is not pr
hi i would like to know how can i make a phase sequence using microcontroller and how can define the phases ( r s t ) and ( r t s ) thanks
You should use the following sequence: wire antenna, broad band RF amplifier, diode detector, indicating method. A simpler method which is not as sensitive is the wire, diode, oscilloscope.
Hello, I need to synchronize an inverter to the power grid. So far I can easily track 3-phase voltages with high immunity to noise and other power failures. I am using a abc->dq conversion (3phase to 2phase, rotating frame) and with this I can easily track the phase, the sequence and peak voltage. I need to track now single phase signals. I h
so easy problem.... search 'sequence detector' in google.