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9 Threads found on edaboard.com: **Shift Right Arithmetic**

mydata=0x8000;
mydata>>=1;
Now, mydata becomes 0xC000;
That's the expectable result if mydata is signed int (**arithmetic** **shift**).
You may want to use an unsigned int data type.

Microcontrollers :: 11-14-2013 07:49 :: FvM :: Replies: **5** :: Views: **2145**

You need to review the available functions of the used libraries. For STD_LOGIC_ARITH SHR() performs an **arithmetic** **right** **shift** of signed signals.
I don't follow your statement about complexity caused by the delta() function. It's not much different from a SHR() or SRA() implementation in other libraries. A fixed **shift** (...)

PLD, SPLD, GAL, CPLD, FPGA Design :: 07-04-2012 18:09 :: FvM :: Replies: **8** :: Views: **1132**

Actually, in first case three times **right** **shift** of -27 is calculated which is -4(9'b000111100) and is stored in register of signed type, so it is stored as -4. Then it is added with x0 (which is 1) and becomes -3.
But in second case, after the calculation of three **right** **shift**s of -27, result is not stored in signed format (...)

ASIC Design Methodologies and Tools (Digital) :: 06-08-2012 12:04 :: er.akhilkumar :: Replies: **2** :: Views: **991**

I hope it can help
Overview
VHDL code

PLD, SPLD, GAL, CPLD, FPGA Design :: 07-01-2011 18:39 :: tj.diego :: Replies: **1** :: Views: **852**

Who can modify the HDL code for the single-cycle MIPS processor to handle SRA(**shift** **right** **arithmetic**)...??
------------------------------------------------------------
-- mips.vhd
-- and 30 May 2006
-- Single Cycle MIPS processor
-----------------------------------------

Embedded Linux and Real-Time Operating Systems (RTOS) :: 05-19-2010 20:21 :: gokhan33 :: Replies: **0** :: Views: **1701**

This is explained better with an example:
Logical **shift**: **shift** **right** number 1010 several times:
1) 0101
2) 0010
3) 0001
4) 0000
MSB is always filled with zero.
**arithmetic** **shift**: **shift** **right** number 1010 several times:
1) 1101
2) 1110
3) 1111
4) 1111 (...)

Microcontrollers :: 05-04-2010 12:32 :: fcfusion :: Replies: **1** :: Views: **1246**

Hi all,
I am going to implement "Floating Point **arithmetic**" for my Prediction Circuit, but i have no idea how to represent this **arithmetic** in term of hardware.
Basically, i know i need some kinda of **shift** register or ALU....For **shift** register. **shift** left means "x2" or "1/2" when rotate (...)

Analog Circuit Design :: 06-13-2008 02:39 :: s0g0 :: Replies: **1** :: Views: **1060**

VHDL93 includes built-in **shift** operators:
sll (**shift** left logical),
srl (**shift** **right** logical),
sla (**shift** left **arithmetic**),
sra (**shift** **right** **arithmetic**)
See
SRL is what u require..
tut..

PLD, SPLD, GAL, CPLD, FPGA Design :: 03-16-2005 14:49 :: tut :: Replies: **5** :: Views: **2947**

Operator: sla
**shift** left **arithmetic** operator.
Example: Addr <= Addr sla 8;
Operator: sll
**shift** left logical operator.
Example: Addr <= Addr sll 8;
Operator: sra
**shift** **right** **arithmetic** operator.
Example: Addr <= Addr sra 8;
Operator: srl
**shift** (...)

PLD, SPLD, GAL, CPLD, FPGA Design :: 01-20-2005 15:27 :: eda_wiz :: Replies: **4** :: Views: **1703**

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