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64 Threads found on edaboard.com: Sigma Delta Modulation
Hello, i am trying to simulate Three phase inverter with first order sigma-delta modulation in matlab/simulink. Here is my simulink file. 135998 When you look at simulation results, phase currents looks pretty fine but phase-to-phase and phase-to-ground voltages looks like there are some voltage spikes where shouldn't be. Can
To achieve 16 bit resolution with 44 kHz sampling rate using regular PWM, you would need about 3 GHz pwm clock. That's obviously not feasible. Some kind of sigma-delta modulation is necessary.
In classical delta-sigma-modulation-Fractional-N PLL synthesizer, NTF is following. NTF=(1-z^-1)^order, all zeros is located at freq=0. And this NTF is realized by MASH structure. What NTF is realized in Modern NTF of DSM-Frac-N PLL Synthesizer ?
hello dear, i generated a target impulse response of fir low pass filter and then interpolated it , now i want to generate ternary tabs or coefficient using second order sigma delta modulation, please tell me how to generate it, if any one have code or idea
Hi Jack, A sigma delta modulator consists of one feedback loop around an integrator and a quantizer. This integrator (since you have 1/S therefore continuous) producing a low pass filtering of the input signal and a high pass filtering of the quantization noise which is injected at the quantizer, hense noise shaping the noise out of band. Since
DIfference b/w sigma delta and PWM modulation.Which one is best suitable for GFSK demodulator.
The output of the D-F/F is the modulated output, right? Yes. The output of a (1-bit) sigma delta modulator is a binary sequence representing the input signal. It's usually processed in a multi stage decimation filter to get the final output signal. The term "frequency range of the integrator" doesn't seem to make sense. You'll no
Hi ALL I working on some application that gonna be implement on FPGA It involve with sample signal by 512 over sampling ratio and then decimate the signal by this OR - 512 (delta sigma modulation) does some one have a good idea for me about the decimation filter block i thought about 3 options- 1 - CIC DECIMATE BY 128 AND THEN (...)
Pankaj, The attached file is nice and short Motorola Aplication Note one. I don't know if it will be useful for you. Let me know. Regards. Daniel Digital Signal Processors Principles of sigma-delta modulation for Analog-to-Digital Converters by Sangil Park, Ph. D. Strategic Applications Digital Signal Processor Operation
hi i work with ADMP421 mems microphone i clocekd this device frommy FPGA and pass the samples throught FTDI chip to pc and then to matlab to demoduate the samples. when i analyzed the samples i didnt get the wanted frequency ( after fft) couldsome one help me? mybe my matlab file failed? does somone have matlab file to analyze sigma delta sam
i want sigma delta modulation circuit . thank you
module modulator(clk, rst, k_in, v_out, v_out_offset); input clk, rst; input k_in; output v_out, v_out_offset; reg v_out,v_out_offset; reg D1, D2, D3; wire sum1, sum2, sum3, sum4, sum5, sum6, sum7, v_fd, v_fd_neg; assign sum1 = k_in + v_fd_neg; assign sum2=sum1 + D1; assign sum3=D1 + D2; assign sum4=D2 + D
HI everybody I need matlab code to analyze (demodulate) delta sigma modulation samples from 4th order. I tried to build one block and implement it on simulink but somehow i cant reach to good gain as i need and i am suspect my matlab code... thanks a lot
But PWM is lot easier and now a days its present in almost all MCU's however is there any soft code avlaible for sigma-delta modulation specially for speech synthesizers..
Hi all... I have problems to determine the SNR and the bit resolution from a delta sigma modulation. I have now a 1st order delta sigma modulation and if I look at the bit-stream at the output of the delta-sigma, I am quite confuse how we can know from (...)
Hi all, Can someone help me with a simulation in Matlab for the two modulations (delta and sigma-delta), i need it for a project. Thanks.
what is the definition for quantization noise? is it different for sigma delta modulation?
Hi to all the group users. I am doing research in area of Incremental delta sigma modulation techniques and A/D conversions. I am looking for text book for detailed study of incremental delta sigma theory and related development. A good thesis report in that area will also help. Please suggest. regards (...)
 could anyone plsease help me in finding the circuit for DC to DC boost converter, using sigma delta modulation technique.
the picture you presented is not a MASH1-1-1 scheme. you should add dither before the delta-sigma modulation.And the dither must be much smaller than K.
Could anyone to introduce some good papers/books/thesis on continous time sigma delta ADC??Thanks a lot! Best regards hi, there is a book "Continuous Time sigma delta modulation for IF AD Conversion Radio Receivers" in the eda-book up&download section, so i think it will be good for you. jeff.yan
Hi,I think you'd better present your model here. As I know,kundert provided model of two domains:1,time domain,to model the transient process of the PLL. 2,phase domain,to simulate the phase noise and its transfer function in the PLL. The sigma-delta modulation's phase noise is described by a noisetable function. So we simulate the (...)
looking for paper "Decimation for sigma-delta modulation" IEEE Transactions on Communications, vol. 34, no. 1, pp. 72-76, January 1986 Thanks.
Hi all, I am having some problems with the verilogA simulation of a second order delta sigma modulator. I would be very greatful for any assistance. I took the 'sigmadelta_1storder' cell from the Cadence 'ahdlLib' and modified it to be 2nd order. The resulting verilogA code is: (...)
Hi to all the group users. I am doing research in area of Incremental delta sigma modulation techniques and A/D conversions. I am looking for text book for detailed study of incremental delta sigma theory and related development. A good thesis report in that area will also help. Please suggest. regards (...)
Hi All, I find this topic very interesting as i am trying to build a model for 1st and 2nd order delta sigma modulation. I just started using Simulink and i wonder if anyone can help me. Thanks
hi guys I need this paper: Advanced full bridge type delta-sigma modulated pulse space modulation PFC converter introducing current limiting scheme Nagai, S.; Hirota, A.; Nakaoka, M. Power Electronics and Drive Systems, 2003. PEDS 2003. The Fifth International Conference on Volume 2, Issue , 17-20 Nov. 2003 Page(s): 1101 - 1105 Vol.2 (...)
Insufficient noise filtering of the sigma-delta noise or Frequency downconversion of folding of high-frequency noise because of nonlinearities.
hi i'm working on some project about sigma delta modulation using DSProcessor TMS320c5416. is there anyone who already use this type of DSP? i really need help to display the output of the modulation in Oscilloscope. Is there anyone know how to do it? Is there some file like.cmd that can be use?thx..
Hi, folks: I've got a question on DCO's sigma-delta modulation. The modulator itself is out of the question. However, since the DAC is accomplished inside DCO through discrete small capacitors' on/off, the high intrinsic non-linearity there will destroy the spectrum. It is impossible to make those capacitor tuning gain linear in (...)
Hi, Folks: I'm reading some papers on DCO. One question I got is on white dithering of DCO. Basically due to limited frequency resolution, there is high quantization noise without sigma-delta modulation. White dithering is often used in this case. 1. I'm not sure that white dithering is using finer resolution, i.e. smaller (...)
I will try to answer some: 1. sigma delta is suitable for small bandwidth and high resolution applications (typical for audio). It can be used for dc. There are techniques used to overcome the idle tone problem + higher order loops suffer less from this problem. 2. Latency is a function of the resolution needed. You can roughly (very roughly)
I need this paper Multistage sigma-delta modulation Chou, W.; Wong, P.W.; Gray, R.M.; Information Theory, IEEE Transactions on Volume 35, Issue 4, July 1989 Page(s):784 - 796 Digital Object Identifier 10.1109/18.32155
Hi, All The fractional-spur is a main disadvantage of fractional-N PLL. Although the delta-sigma modulation is used to dithering the fractional number, the Spur still remain in the PLL output spectrum. It is easy to predict the offset frequency of the Spur, but how to estimate the amplitude (dBc) of the Spur? If it is assumed that (...)
Hi, all I am studying for sigma-delta modulation and trying to build a simple second-order sigma-delta modulation in Simulink as a start. I have gone through a few tutorials and papers, and here is my status. I put a sine wave as an input and simply add integrators using "unit (...)
Be careful, nowadays class D have two modulation scheme. One is PWM and one is delta sigma. Both applies to different applications and you need to know which one you want to understand
Did anyone ever design a class D audio amplifier either with PWM modulation or delta sigma modulation? What kind of design goals have to meet? Any guidelines?
Anyone can talk about delta-sigma modulation, and how to use it to do AGC! Are there any documents about it?
You can refer to "delta sigma modulation in RF Transmitters with emphasis on fractional-N frequency synthesis" Phd Thesis by Thomas Stichelbout , 21 June 2000 which can be found in E-book of this forum
160 MHz to 1.25 MHz is a factor of 128 (7 bits). Why do you have only 4 bits? Audio outputs commonly use delta-sigma DAC techniques (not simple PWM) to get high amplitude resolution from a modest clock rate. Here's an introduction:
hi all, Hoping anyone can help me to get this thesis: H. Tao, ?Frequency translating bandpass sigma?delta modulation for. analog-to-digital conversion,? Ph.D. dissertation, Columbia University. i find it in columbia University library but it requires user name and password to get it.
what is the difference between a sigma-delta dac converter and a pwm modulation passed through a low band pass filter, to obtain the average value or the duty-cycle?
hi~~ 1. have anyone used the matlab to simulate the multi-bits sigma delta dac modulator? 2. the usual methods to simulation the modulator on the FPGA and how to do
The decimative filter downsamples the bitstream from your sigma-dalta modulation ,and output multi-bit such 16 bits ,the the digital part receive 16bits!
Hell everybody, I'm working in VHDL-AMS modeling of Fractional-N sigma-delta PLL, and I'm looking for some VHDL-AMS codes of sigma-delta modulators that can be used to do the modulation of PLL. I'm also interested to talk and share information with people that work in this subject... By the way, every (...)
Visit Xilinx web site
Simple introduction:
I has these IEEE papers about NOISE FOLDING and could upload them: 1. An approach to tackle quantization noise folding in double-sampling /spl sigma//spl delta/ modulation A/D converters Rombouts, P.; Raman, J.; Weyten, L.; Circuits and Systems II: Analog and Digital Signal Processing, IEEE Transactions on [see also Circuits and Syste
Hell all, what's the difference between "delta sigma" & "delta sigma Modulator"? just now i searched TI and Analog Devices websites and found out they have two ADC types named "delta sigma" & "delta sigma Modulator". what's the difference? Thanks!