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206 Threads found on edaboard.com: Simulate Capacitor
Hi Everyone I am trying to calculate the correct values for a capacitor for a PSU I am going to simulate and I am having difficulty finding a reasonable value. Here is the specs I am working from and what I have tried so far:
A 230 V smoothed power supply is required to meet the following specification:
Output voltage
Power Electronics :: 08-02-2016 16:16 :: TunerPhish :: Replies: 6 :: Views: 452
Dear All,
i am trying to simulate following circuit. When i switch on the MOSFET momentarily at zero crossing of the Iin, and measure voltage across the capacitor(C1), am i not supposed to get response resembling a square wave?
I think momentarily switching the inductor at zero crossing of Iin, should flip the voltage across C1 and i should get
Power Electronics :: 07-13-2016 06:08 :: sandeep_sggs :: Replies: 7 :: Views: 202
Hello,
I would like to simulate a synchronous switched extraction circuit using pspice software. In the circuit, the switch is controlled by the voltage across the capacitor.How can I model the switch
Analog Circuit Design :: 05-27-2016 07:08 :: jainjose :: Replies: 0 :: Views: 1
Hi all,
I'm trying to simulate the basic RC circuit with Spetre. Here is my circuit.
128706
I built it with Cadence Virtuoso. But when I try to simulate it in Spectre, it gives me square output just as input, no charging period.
128707
I do select trans, 20ms.
How can I get the right result?
Analog Circuit Design :: 05-02-2016 16:20 :: zongya :: Replies: 2 :: Views: 199
To load the spice file: Open in notepad and save as file_name.asc
Then open in LT spice and simulate.
Power Electronics :: 01-23-2016 19:25 :: E-design :: Replies: 10 :: Views: 545
Hi,
I have a question about simulating the noise of a S/H circuit.
The method I am using right now is to simulate noise in sample and hold phase separately.
First, I put it in sample mode and simulate the noise over the sampling capacitor (CS) and hold capacitor (CH).
I used HSPICE .NOISE and integrated over (...)
Analog Circuit Design :: 09-19-2015 19:50 :: neoflash :: Replies: 1 :: Views: 350
First simulate your design with ideal capacitors and inductors.
Then replace them with their equivalent model or measured data and
tune the circuit again to get the desired response.
RF, Microwave, Antennas and Optics :: 05-21-2015 11:25 :: afz23 :: Replies: 2 :: Views: 303
When I simulate the circuit, apparently, capacitor feedback does not work properly. The opamp model acts like a comparator. As long as negative input has a larger voltage output shows the minimum voltage and Vice versa.
That's how an integrator is expected to work. Sounds like you didn't yet think about a reasonable test setup for y
Analog Circuit Design :: 05-20-2015 01:58 :: FvM :: Replies: 10 :: Views: 713
Dear Sirs, I simulate a simple capacitor with plates of 4x2 mm and 5um of dielectric (dielectric constant=3.8).
The 2-port PI with Shunt RC and Shunt RC model give me a correct value of 54 pf but R is 22987 Ohm.
Why R is so low? I expected a more high value.
What is R in Shunt RC model?
Thanks
Ettore.
Electromagnetic Design and Simulation :: 04-10-2015 05:11 :: Hero_1969 :: Replies: 3 :: Views: 539
Hi,
What is the proper way to simulate a x2y capacitor like this one
in multisim or LTSpice?
I make the following assumption (see on attached pictures) based on what I read here
Analog Circuit Design :: 03-18-2015 12:22 :: ctzof :: Replies: 0 :: Views: 333
i would like to simulate a super capacitor in mat lab power system environment.
the super capacitor is to be connected with a solar panel through a power conditioning unit.
i have used a two branch model . how to design the parameters and check the super capacitor characteristics.
Power Electronics :: 02-08-2015 23:58 :: chitrakannan :: Replies: 0 :: Views: 688
Constant current sweep will give the voltage proportional to impedance.
Most people use a simple model similar to yours with only 1 capacitance and only a series resonant frequency (SRF) which is often just called the "Self-Resonant-Frequency.
But in ceramic multilayer structures there is a series and parallel capacitance (that may be nearly equ
Analog Circuit Design :: 11-21-2014 15:06 :: SunnySkyguy :: Replies: 4 :: Views: 882
If you design your circuit with the correct values, it will simulate. The problem with crystal oscillator circuits is that you need a small-time step and a lengthy oscillation time due to the slow built-up of oscillations caused by the very high Q of the crystal.
The 22 pF capacitor can be a trimmer to make slight frequency corrections.
So be
Analog Circuit Design :: 09-20-2014 12:47 :: E-design :: Replies: 26 :: Views: 2033
Decoupling 20Mhz is easier option. Select capacitor with 20Mhz Resonant frequency. Decoupling 2.4Ghz is difficult.....2.4Ghz decoupling requires capacitance in pF range may be 2-10pf range. check with RF capacitor manufacturers. decoupling 2.4Ghz requires very good layout..so, that mounting inductance is very low.....Try to simulate the (...)
PCB Routing Schematic Layout software and Simulation :: 07-31-2014 11:51 :: malli_1729 :: Replies: 3 :: Views: 539
i wanna simulate a microstrip tunable bpf in ADS and i dont know how to find and use the varactor diode
please help me
Analog Circuit Design :: 07-13-2014 05:41 :: saeed3406 :: Replies: 2 :: Views: 691
I believe, it is useless to excite an interdigital capacitor alone. It is always a part of some kind of waveguide, microstrip or coplanar. Create a microstrip or coplanar line, then excite it with a waveport, or lumped port (2-port pass-through model), as you like.
Then I would simulate input sections of the transmission line, and extract them fro
Electromagnetic Design and Simulation :: 04-22-2014 08:29 :: Andryuha :: Replies: 1 :: Views: 698
Hi.
Before start to design the SAR ADC, i want to simulate the relationship between capacitor mismatches of CDAC and SAR ADC using matlab.
when capacitor mismatch ratio is 'sigma' and Cu is unit capacitance,
plz check the equation and next matlab code
capacitor mismatch ratio ~ N(0,sigma^2)
when i want to make (...)
Analog Circuit Design :: 12-28-2013 09:18 :: je01911 :: Replies: 0 :: Views: 953
Hello everyone.
I have an issue with CoventorWare.
I tried to simulate the distribution of the electric field between the plates of a capacitor filled with air. As a result, I got a field distribution merely on the plates, but not inside.
Is it possible to obtain the distribution of the field between the plates?
Electromagnetic Design and Simulation :: 12-13-2013 14:47 :: LPKIR :: Replies: 0 :: Views: 550
Hi,
I'd like to simulate the IO buffer. The chip needs input and output from FPGA. Chip package will be PGA. Could anyone tell me the capacitor between IO pads and FGPA in general? several pF or tens of pF, or something others?
Thank you!
Analog Circuit Design :: 12-12-2013 08:39 :: zhangljz :: Replies: 1 :: Views: 780
Hi everybody,
I am using HFSS to simulate a CPW structure which forms a tank circuit. The capacitor is realised by the CPS and the inductors are realised by lumped inductors. The CPW is 1.5 mm long and it resonates at about 1GHz. HFSS can calculate Epsilon and I think that that is the relative permittivity. The results show that it it very high
Elementary Electronic Questions :: 10-30-2013 15:33 :: PaulGwo :: Replies: 0 :: Views: 715
Hello all,
I am trying to simulate IDC on HFSS but it just stuck at calculating the matrix step, I am wondering if anyone could help me out on that. I have attached the HFSS file on here97434. Thanks.
Electromagnetic Design and Simulation :: 10-18-2013 11:28 :: Mr.Tingalingling :: Replies: 3 :: Views: 600
I want to know how the capacitor can be used as a inductor
Together with an operational amplifier a capacitor can mimic a lossy inductor - and if you can afford to apply two opamps (GIC configuration) you can simulate a nearly ideal active inductor.
Elementary Electronic Questions :: 10-12-2013 10:53 :: LvW :: Replies: 3 :: Views: 589
can you help me to simulate this circuit with ltspice, i want to drive 77 LED from osram
the LED datasheet
i want to drive the LED at 30 mA,
and i want to use this circuit, i have many error when i tried to simulate the circuit,
i want to si
Elementary Electronic Questions :: 08-27-2013 10:38 :: yassin.kraouch :: Replies: 5 :: Views: 776
Its not impossible to simulate an Planar loop structure in ADS..!! Do u have any references that u r following for ur design rules..?? Making a Printed loop in ADS is quite easy..!!
RF, Microwave, Antennas and Optics :: 09-02-2013 05:35 :: SpaceDust :: Replies: 20 :: Views: 1590
Hi,
I need to simulate structure excited with a capacitor through long coaxial cable.
From past experience modeling coaxial cable takes prohibitively long time.
Can I substitute the cable with network of lumped components?
If so how to derive such network?
How to simulate capacitor discharge?
Electromagnetic Design and Simulation :: 03-28-2013 11:21 :: AndreyG :: Replies: 0 :: Views: 607
gm/Id is mostly for DC operating points and small-signal parameters. Switched-capacitor circuits will require a transient simulation. You may get a good starting point with gm/Id, but you'll have to do simulation-based sizing (tweak-simulate-tweak) anyway, maybe with an optimizer software, and could start with it right away.
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 11-26-2012 07:56 :: micpro :: Replies: 1 :: Views: 888
Yes, you can use PSS and PAC to simulate AC response.
The switch Top will turn on which resets the capacitor, now the amplifier is in unity gain feedback
and the negative input of amp will get biased to Vref. So, I think there is no need for another DC bias.
Analog Circuit Design :: 11-09-2012 14:50 :: learning_curve :: Replies: 1 :: Views: 424
I'm trying to simulate the magnetic field between two LC circuits a distance Z apart and find out the Q and S parameters of the system so I can see the efficiency and whatnot.
I'm new to HFSS so it came with this thing called the "Antenna Design Kit" and I was able to generate a model of a helical antenna coil and it has a ground plane and what
Electromagnetic Design and Simulation :: 10-28-2012 01:52 :: zero_coke :: Replies: 0 :: Views: 661
i am using PROTEUS 7.4 to simulate LPC2138 and using Keil uVision4 to generate hex file..
the simulation is not working, it is running without any error or warning and it is showing proper result on Keil debugger...
when i look at flash memory on proteus it is initalized properly but RAM read blank completely
anyone having any solutions..
Microcontrollers :: 10-26-2012 13:10 :: jitu9954 :: Replies: 2 :: Views: 1496
I designed one 4th order switched capacitor biquad filter in UMC 180 nm technology using cadence software (version 5.10.41).This circuit is operating on a two phase non overlapping clock generator (i/p frequency = 1 kHz). To simulate this circuit I used, PSS and PAC analyses in Spectre RF tool(Analog Design Environment). For single ended topology i
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 10-19-2012 05:48 :: nishanthpv :: Replies: 1 :: Views: 1054
hi all,
I am trying to simulate a push pull stage with negative feedback to op amp. i shall be using it to drive a dc motor with ratings of 10V and 0.5A.
Awhile simulating, sometimes(keep in mind) there are oscillation in output of op amp and hence at the load. I have tried changing Vsource to Vpwl and there also oscillations were there. im
Analog Circuit Design :: 10-06-2012 08:50 :: maanas :: Replies: 1 :: Views: 449
I want to simulate capacitor bank glitch. This is a 8bit binary cap bank. I can use AC or SP simulation find the total cap value vs. code. How can I run some transient simulation and find cap vs. time (code changes with time)? I want to see glitch size when code changes in real time.
Thanks.
Analog Circuit Design :: 09-19-2012 01:59 :: danda821 :: Replies: 3 :: Views: 375
Hi 2 all, there are another questions about class E PA :)
If i want to design load/matching network for the class E PA:
1. Choose inductor and capacitor in drain of the transistor
2. simulate load-pull contours in PSS and choose optimal impedance of load network
3. Create load network with optimal impedance
4. Create matching network for m
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 09-11-2012 10:45 :: sarge :: Replies: 0 :: Views: 516
i have designed a RC OSC, which uses a current source to charge and discharge the capacitor, to generate a trigular wave, and then converted to square wave.
when i simulate the OSC with white noise (max amplitude is 100mV for 3.3V supply)added in power supply, i found that, the jitter of OSC increases a lot (about 2 times)than not including the
Analog Circuit Design :: 08-09-2012 02:10 :: lhlbluesky :: Replies: 2 :: Views: 558
Hi All,
I am looking for the Spice models for a 4.7uF Murata capacitor which would have the following variations modelled,
ESR vs Frequency, ESR vs Temperature, capacitance vs temperature and Capacitance vs Freqeuncy.
I require this information to simulate a LDO circuit that used this external capacitor.
Analog Circuit Design :: 08-08-2012 02:06 :: Rad_31 :: Replies: 1 :: Views: 1186
hi.
i am going to design a 3phase inverter motor driver with IGBT's.
designing of pwm generator- soft start-and dead time generator is already finished.and works good.
but at the power stage i have problem with IR2112!
when i try to simulate the circuit the coverage problem accrues.!!
i think it's due to boot strap diode or capacitor.
i am s
Power Electronics :: 07-16-2012 11:54 :: logically_man_can :: Replies: 1 :: Views: 1913
Hello all,
I am trying to simulate a very basic circuit but i don't know why it does not work. The goal is to generate a ramp.
Below the picture: the basic principle is to charge a small capacitor which will be "poured" step by step into a bigger
Analog Circuit Design :: 05-14-2012 16:43 :: ruby1212 :: Replies: 6 :: Views: 649
who use ADS ?
pls tell me how to use SDD to module a step recovery diode ,the following is my module formulor ,but it's err:
73069
I want to discript the SRD : i(t)=dQ(t)/dt, Q(t)=CV, where C is the equall capacitor ,V is the voltage between the diode.
Software Problems, Hints and Reviews :: 04-23-2012 11:01 :: rickyren :: Replies: 1 :: Views: 997
I'm trying to simulate an antenna and matching unit, which has a capacitor in it. The capacitor is physically much smaller than the wavelength.
It is possible to do this in HFSS? I guess it would be possible to draw two parallel places, with a dielectric, which have the capacitance required, but is there a better way?
If I did draw (...)
Electromagnetic Design and Simulation :: 03-14-2012 06:36 :: DeboraHarry :: Replies: 3 :: Views: 945
Anyone can share the knowledge how to design and simulate a voltage multiplier using ADS at low voltage level ~1V?
RF, Microwave, Antennas and Optics :: 12-15-2011 12:02 :: kezambo :: Replies: 3 :: Views: 892
You should put 10 times 1pF MiM cap parallel..
If your operating frequency is pretty high, then simulate them in Momentum to check the parasitic inductances and stray capacitances..
RF, Microwave, Antennas and Optics :: 12-03-2011 00:14 :: BigBoss :: Replies: 2 :: Views: 1237
I try to simulate serial channel 2.5 Gbps in Ansoft Designer:
64287
without decoupling capacitor all OK!, but with capacitor eye diagram very strange
64286
In what the reason of such behavior
Electromagnetic Design and Simulation :: 11-16-2011 05:27 :: SAV_ :: Replies: 0 :: Views: 835
What is the best way to simulate several pF SMD capacitors on microstrip line circuits?
Are there some precise mesh/material libraries/constructors available anythere to import and place on the structure to be simulated?
Electromagnetic Design and Simulation :: 10-24-2011 09:37 :: Andryuha :: Replies: 1 :: Views: 1344
Good day EDA fellows,
I would like to ask on how to simulate the process variation of the MIMcapacitor.
In MOS, we have the corner simulation but I don't know about the capacitors.
Thank you.
Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 10-04-2011 05:25 :: allennlowaton :: Replies: 5 :: Views: 1042
Should your project be something novel ? or you can simulate some devices which are already designed (ex: RF switch or variable capacitor).
Analog Circuit Design :: 08-27-2011 13:20 :: sv1437 :: Replies: 2 :: Views: 480
Hello, imado_60. Unfortunately, ADS has limited number of coplanar components, only transmission lines i think. If you want to simulate an interdigital capacitor in ADS you can only in Momentum, from the EM field point of view (depends now what kind of result do you want from the simulation!!). As far as I know, i don't think any kind of microwave
Analog Circuit Design :: 05-06-2011 06:30 :: kondor_konami :: Replies: 1 :: Views: 1315
On the first page there bottom right graph Vout batch time that in certain turn ratio of 1:20 and Vin 60mV 100s it has been necessary to load uF capacitor 470 to charge to 3.3 V and Vout and Vin as 60mV. This is true? If this is true, I also simulate this LTspicer what I fail to simulate 100s always get error.
Analog Circuit Design :: 04-05-2011 12:22 :: LTspicer :: Replies: 0 :: Views: 492
I am currently working with LTC3108 and to simulate LTspice. With solar panels to feed for simulation I used 0.8 V as the source. I try the different outputs to measure but have different problems. As to why power capacitor decreases after
Analog Circuit Design :: 03-29-2011 10:05 :: LTspicer :: Replies: 0 :: Views: 1038
I'm trying to simulate a SONOS gate capacitor with n substrate. The idea is to charge it with FN or DT tunneling and then observe the CV. So far the code i've written is this:
go atlas
mesh width=1.0
x.m loc=0.0 spac=0.005
x.m loc=0.5 spac=0.005
y.m loc=-0.1 spac=0.02
y.m loc=-0.03 spac=0.005
y.m loc=-0.02 spac=0.002
y.
Software Problems, Hints and Reviews :: 03-21-2011 06:09 :: edu11 :: Replies: 0 :: Views: 1325
Because this circuit works with clock or periodic signal, you can simulate it with pss+pac.
Analog Circuit Design :: 03-16-2011 13:13 :: Milad-D :: Replies: 1 :: Views: 507
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