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468 Threads found on edaboard.com: Simulate Capacitor
Hi,
I need to simulate structure excited with a capacitor through long coaxial cable.
From past experience modeling coaxial cable takes prohibitively long time.
Can I substitute the cable with network of lumped components?
If so how to derive such network?
How to simulate capacitor discharge?
Electromagnetic Design and Simulation :: 28.03.2013 11:21 :: AndreyG :: Replies: 0 :: Views: 241
I'm now designing a SH circuit of a 8bit pipelined ADC. I know the capacitor mismatch is a very important consideration of a ADC. But I don't know how to simulate the capacitor mismatch. should I use monte carlo? and how ?
Thank you very much.
Analog Circuit Design :: 06.06.2007 03:00 :: didibabawu :: Replies: 10 :: Views: 2703
86063
this error appear to me when i simulate capacitor with its voltage to get standard deviation
i use capacitor equation
C= I/(w*V) = I/(2*Pi*f*V)
Analog Circuit Design :: 22.01.2013 10:34 :: amr hema :: Replies: 2 :: Views: 155
Use ADS and introduce your S-parameters along with the circuit model for the capacitor. simulate over your range of frequencies, and optimize for the two goals:
1) S11_measured - S11_calculated
2) S21_measured - S21_calculated
Of course you have the parameters in your circuit model as variables.
This will match the curves and at that poi
ASIC Design Methodologies and Tools (Digital) :: 29.07.2002 23:55 :: DanTheMan :: Replies: 4 :: Views: 1382
Hi,
in MWO I'm afraid you can't simulate simultaneously lumped and distributed elements. Some months ago me and my friend sucked a lot with this problem too, BUT if somebody knows a method or program that would be fine.
RF, Microwave, Antennas and Optics :: 17.01.2003 18:37 :: :: Replies: 6 :: Views: 1382
Is it possible to use @DS or MWO to simulate the frequency response of the rectangle loop antenna w/ the resonate capacitor ? how ?
I've tried above two tools by inputing several segments of suspend strip line to do the simulation but finally find they only treat them as "one" long strip line and the result is very different from the calculatio
RF, Microwave, Antennas and Optics :: 16.01.2003 16:59 :: night cat :: Replies: 0 :: Views: 1135
You have to be more specific.
Where is the input and where is the output in your schematic?
What is the input signal? Sine or squarewawe or other?
I would recommend you use a spice simulator to simulate the circuit, then you can watch the signals yourself.
Professional Hardware and Electronics Design :: 16.04.2003 04:05 :: ME :: Replies: 10 :: Views: 2495
hello,
Does anybody knows how to simulate this switched capacitor filters in OR$C*AD P*SP&*ICE? Is there any kind of switch that can be controlled by a phased signal and really works?
and how to implement an ideal OPAMP? any ready models?
regards,
2000
PCB Routing Schematic Layout software and Simulation :: 28.05.2003 00:44 :: 2000 :: Replies: 3 :: Views: 1250
How to simulate their noise in switched-capacitor circuits? who know?
ASIC Design Methodologies and Tools (Digital) :: 21.06.2003 11:23 :: vagary :: Replies: 3 :: Views: 2396
Apply at input during one clock period 1V and them comput the FFT of the impulse response, that should be equal to the frequency response. The frequency resolution depends on the number of simulated clock cycles.
bastos
Professional Hardware and Electronics Design :: 10.07.2003 19:10 :: bastos4321 :: Replies: 11 :: Views: 2228
How to simulate Switched-capacitor Circuit in the frequency domain using spice?
ynhe
PCB Routing Schematic Layout software and Simulation :: 24.07.2003 04:49 :: ynhe :: Replies: 3 :: Views: 1863
I just want to simulate a very simple RLC resonator. It is made of copper wire and a capacitor soldered at the both ends of the wire. How can I add the capacitor in HFSS.
I found there is only lumped RLC boundaries in HFSS which can only be added o a surface, and I really don't know how to handle it.
Thanks for your answer in advance.
Electromagnetic Design and Simulation :: 10.03.2004 04:29 :: newyatin :: Replies: 6 :: Views: 4915
How to use hspice to simulate an accumulation
mode mos varactor to plot its Cgs to capacitor
characteristic
RF, Microwave, Antennas and Optics :: 12.06.2004 23:56 :: iemotions :: Replies: 0 :: Views: 1052
you can run PSS and PAC analysis to simulate opamp with SC-CMFB.
Good Luck
Analog Circuit Design :: 14.07.2004 00:55 :: nxing :: Replies: 3 :: Views: 2456
Hi all,
can you explain me behavior of vertically mounted parallel plate capacitor at 10GHz. I want to use this capacitor for DC decoupling between two microstrips. How can I simulate this capacitor (I need S-parameters this two port subcircuit) ? I tried to simulate it at MWO - behavior was strange.
RF, Microwave, Antennas and Optics :: 09.07.2004 09:49 :: sini :: Replies: 7 :: Views: 2499
thanks for answering,
we can use some simulate tools to caculate the is easy to simulate the microstrip,however,if the line is just single layer copper, what is the characteristic of the line?i think is not the same as a microstrip. when the length is far shorter than lamdar,it is a inductance,but i don
RF, Microwave, Antennas and Optics :: 19.09.2004 06:35 :: djalli :: Replies: 8 :: Views: 981
How could i simulate and hence work out the settling time of a switched capacitor integrator using spice?
Thanks
Analog Circuit Design :: 12.10.2004 06:08 :: cjupiter :: Replies: 1 :: Views: 1036
I need to simulate my dc-dc converter with load capacitor of 20uF and its ESR.
How much will be the ESR for 20uF ceramic capacitor. can anybody guide me in selecting the type of capacitor for low ESR and low cost.
Analog Circuit Design :: 08.11.2004 01:22 :: santhoshv78 :: Replies: 4 :: Views: 1353
You cannot use normal hpsice noise analysis since it does not account for noise folding effect and thus cannot be used to simulate noise in SC circuits. Use PSS then Pnoise in Spectre instead.
Analog Circuit Design :: 30.11.2004 00:11 :: terryssw :: Replies: 4 :: Views: 1053
Hello,
Does anyone have any tips on how to simulate switch cap circuits in Cadence or ADS ?
I need PRACTICAL advice, maybe a screen shot with the set up and advice on how to run the transient simulation and so on.
Thanks
Analog IC Design and Layout :: 29.11.2004 13:12 :: Puppet1 :: Replies: 4 :: Views: 1959
i want to simulate a phase shifter.which kind of software i need adopt? thanks
Electronic Elementary Questions :: 25.12.2004 10:18 :: 105s :: Replies: 7 :: Views: 1606
I'm doing a layout of 741 op-amp,
however, what configuration can i test the CMRR and PSRR ?
thanks !
Analog IC Design and Layout :: 28.12.2004 03:05 :: duron999 :: Replies: 13 :: Views: 4770
I heard that there is a tool named SIMSIDES contained in the simulink tools could be used to do behavioral level simulation on sigma-delta modulator,but I hadn't found the tool? had somebody used it?
Analog IC Design and Layout :: 04.01.2005 10:40 :: yyliang :: Replies: 12 :: Views: 4513
Hi, all,
Could someone kindly tell me how to simulate an SC filter using spectre? and what are the importane points to note during the simulation?
Any suggestion will be appreciated.
Electronic Elementary Questions :: 05.01.2005 22:01 :: shyboy :: Replies: 0 :: Views: 1393
Dear all,
How to simulate AC response of fully differential switched capacitor amplifier?
Because of switched capacitor CMFB circuit, the cmref is need to biased the circuit. That means before ac analysis, transient analysis is used( at lease phi1 and phi2, or one cycle is needed before ac analysis).
Would you help me on this? Any (...)
Analog Circuit Design :: 02.02.2005 07:50 :: hk2004 :: Replies: 1 :: Views: 1309
Hi
Below, there is a drawing of feeding part of what I want to simulate and also project itself.
I have not used capacitor before and I assigned a piece of pec as a capacitor.
At the end of the simulation I do not have correct S11 value, indeed I get S11 larger than 1 at some frequencies. According to me, the problematic part of the (...)
Electromagnetic Design and Simulation :: 10.02.2005 05:22 :: haydar :: Replies: 0 :: Views: 540
Hi microwave guys
I'm currently designing microwave oscillators around 4GHz. We tested already one of them and it resonated around 2.2GHz. One reason for the mismatch in frequency can be explained by the fact that we used the wrong Er (3 in stead of 3.5) . But normally i think it doesnt change the freq that much. Or is it?????
The next thing
Electromagnetic Design and Simulation :: 08.03.2005 06:02 :: E-goe :: Replies: 0 :: Views: 436
SPICE type simulators do not simulate Johnson noise in the time domain. This is because the noise created by the simulation errors are so large that it would mask the Johnson noise.
I do not know the exact reason for that, but when we perform an FFT of an ideal wave we obtain the SNR the simulator can get. To increse th
Analog IC Design and Layout :: 10.05.2005 19:28 :: bastos4321 :: Replies: 7 :: Views: 1540
Did anyone know how to simulation switched capacitor filter by Hspice 2004.09 with frequence response?That is if I give AC signal then plot the output gain vs. the frequency.I know that The SpectreRF can do this with command PAC.The HspiceRF has command HBAC seems like the SpectreRF PAC command.
Analog Circuit Design :: 20.05.2005 01:02 :: schwang1970 :: Replies: 1 :: Views: 783
I think the spectre can simulate the transcient nosie of switch-capacitor circuits.
You can use PSS, and PNOISE to get the noise information.
Yibin.
Analog IC Design and Layout :: 25.06.2005 09:08 :: yibinhsieh :: Replies: 5 :: Views: 912
can u plz post a schematic diagram of the circuit u simulated
and tell me what kind of substarete u use
khouly
RF, Microwave, Antennas and Optics :: 23.07.2005 18:50 :: khouly :: Replies: 7 :: Views: 743
It depends. You can use a value for the pair which connects ou1-ou2 with Vctrl (say hundreds of fF) and a value 3-5 time smaller for the switched pair. For very small values you will have problems with the charge injection from switches.
Don't forget to simulate enough time (100 clock cycles) and follow Vctrl.
Analog IC Design and Layout :: 17.08.2005 11:18 :: ocarnu :: Replies: 3 :: Views: 1118
To Chung-Yuan Chen,
How to simulate the CMFB' pahse margin and gain if I use Hspice ?
Analog IC Design and Layout :: 09.09.2005 03:31 :: xwcwc1234 :: Replies: 16 :: Views: 5403
The same current that discharges the first capacitor also charges the second capacitor. They reach equilibrium at V/2.
You can simulate the RC discharge in Spice and see the final V/2 result (or the LC oscillation).
Here's another way of looking at it:
Mathematics and Physics :: 02.10.2005 03:09 :: echo47 :: Replies: 6 :: Views: 1439
1. delay cell is simply composed of 2 inverters and one MOS cap between them, one of the two inverter is weak type, and the other is medium type. u had to simulate it against VCC, tempearture, corner to find a optimum W/L v.s. delay time.
2. in talking about the above , I assume that u had already a POR signal , and all u want to do is delay it u
Analog Circuit Design :: 13.11.2005 02:38 :: Btrend :: Replies: 6 :: Views: 975
.SAVE the state of OTA at a specific time,then simulate with that state
Analog IC Design and Layout :: 14.04.2006 00:35 :: redswat :: Replies: 14 :: Views: 2127
Just intentionally add idea voltage source with finite dc voltage on one of your comparator to simulate the offset of the comparator.
Analog Circuit Design :: 28.12.2005 00:55 :: paulux :: Replies: 1 :: Views: 902
Dear all:
I designed an AMP with switch-capacitor CMFB. but i don't know how to simulate the open loop gain and GBW of this AMP. When i do this simulation,i replaced the sc CMFB with an ideal cmfb in the AMP,then i can get these results,but i don't know whether these results are the same as SC CMFB. Another quesition is how can i get the r
Analog Circuit Design :: 29.12.2005 02:27 :: winsonpku :: Replies: 1 :: Views: 974
An ADC based on binary weighted capacitor array needs to simulate its DNL and INL. I think the most important factor affecting the DNL and INL is the mismatch of the capacitor. Should I employ Mento carlo analysis ? And how to caculate the DNL and INL after every times of running?
Analog Circuit Design :: 31.12.2005 02:41 :: benchen :: Replies: 2 :: Views: 1301
How to simulate the frequency response of switched-capacitor filter using Hspice ?
Analog Circuit Design :: 02.01.2006 09:40 :: xwcwc1234 :: Replies: 2 :: Views: 872
hi, im aware of simulating inductor using opamp. do capacitors can be done same way?
Analog Circuit Design :: 12.01.2006 02:47 :: danesh :: Replies: 2 :: Views: 855
so you mean that we can't do the noise analysis of fully differential amp?
then what is the function of the .noise statement in the hspice?
from what I've heard, noise is difficult to simulate in spice. I don't think many people can help you because doing noise in old school. I suggest you use spectreRF.
Analog Circuit Design :: 07.02.2006 03:29 :: winsonpku :: Replies: 4 :: Views: 691
Hi, all:
I do not know how to design circuits to simulate these parameters of a full differential OPA such as DC character, AC character, TRAN character, CMRR, PSRR, ICMR? At the same time, the OPA is a full differential OPA whose CMFB is switched capacitor circuits.
Help me, Please!!!!
Analog Circuit Design :: 20.01.2006 03:14 :: wjxcom :: Replies: 4 :: Views: 617
HI GUYS,
GOOD EVENING, I'M SURESH, CURRENTLY AN UNDERGRAD DOING FINAL SEM PROJECT. I'M TRYING TO simulate A 5 LEVEL FLY BACK capacitor MULTILEVEL INVERTER(FCMI) FOR 5 LEVEL USING MATLAB/SIMULINK. KINDLY PLEASE HELP BECAUSE I TRIED AND CAN'T GET A PROPER OUTPUT. FOR A 3-LEVEL FCMI I MANAGE TO DO IT. PLEASE ADVICE AND ASSIST ME FOR 5
Analog Circuit Design :: 26.01.2006 02:16 :: suresh1983us :: Replies: 1 :: Views: 1574
Hi
Iam having problems with differential Lna simulation in spectre. I have designed a matching network that would step down the impedance to a low level . After that i have used an ideal balun from the rf lib and tried to simulate it. I also tried with a VCVS.Neither of these seem to work. My S21 is a straight line .
BTW the impedance tran
RF, Microwave, Antennas and Optics :: 03.02.2006 23:06 :: sriniv1422 :: Replies: 0 :: Views: 702
can anyone tell me the details?
Analog IC Design and Layout :: 09.02.2006 01:32 :: samuel :: Replies: 4 :: Views: 665
Hi, I am trying to get the DNL and INL for my 12-bit SAR ADC. The problem is that each sample takes abt 2 hours simulation time. Does that mean I have to spend 8000 simulation hours to get the DNL and INL plotted? It sounds absurd to me. May I know am I doing it the correct way and what is the normal practice to simulate the DNL and INL for ADC? Th
Analog Circuit Design :: 16.02.2006 09:00 :: pseudockb :: Replies: 3 :: Views: 1922
Hi, all.
I would like to know how to simulate ac response of switched capacitor circuits.
Say, I designed a bandpass filter using switched capacitor circuit technique, then how to simulate with Cadence in order to see the filter's frequency response (i.e., bode plot).
How to get ac response for the circuits (...)
Analog Circuit Design :: 23.02.2006 18:40 :: ee484 :: Replies: 2 :: Views: 1538
how to simulate the differential ampifier with switch capacitor comm mode feedback using HSPICE. (AC ,tran analysis)
Analog IC Design and Layout :: 10.03.2006 10:48 :: mydreamhouse :: Replies: 1 :: Views: 921
does LDO's PSRR can simulate the stability of the regulator?
Analog IC Design and Layout :: 21.03.2006 23:36 :: qutang :: Replies: 6 :: Views: 1264
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