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468 Threads found on edaboard.com: Simulate Capacitor
Hi, I need to simulate structure excited with a capacitor through long coaxial cable. From past experience modeling coaxial cable takes prohibitively long time. Can I substitute the cable with network of lumped components? If so how to derive such network? How to simulate capacitor discharge?
I'm now designing a SH circuit of a 8bit pipelined ADC. I know the capacitor mismatch is a very important consideration of a ADC. But I don't know how to simulate the capacitor mismatch. should I use monte carlo? and how ? Thank you very much.
86063 this error appear to me when i simulate capacitor with its voltage to get standard deviation i use capacitor equation C= I/(w*V) = I/(2*Pi*f*V)
Use ADS and introduce your S-parameters along with the circuit model for the capacitor. simulate over your range of frequencies, and optimize for the two goals: 1) S11_measured - S11_calculated 2) S21_measured - S21_calculated Of course you have the parameters in your circuit model as variables. This will match the curves and at that poi
Hi, in MWO I'm afraid you can't simulate simultaneously lumped and distributed elements. Some months ago me and my friend sucked a lot with this problem too, BUT if somebody knows a method or program that would be fine.
Is it possible to use @DS or MWO to simulate the frequency response of the rectangle loop antenna w/ the resonate capacitor ? how ? I've tried above two tools by inputing several segments of suspend strip line to do the simulation but finally find they only treat them as "one" long strip line and the result is very different from the calculatio
You have to be more specific. Where is the input and where is the output in your schematic? What is the input signal? Sine or squarewawe or other? I would recommend you use a spice simulator to simulate the circuit, then you can watch the signals yourself.
hello, Does anybody knows how to simulate this switched capacitor filters in OR$C*AD P*SP&*ICE? Is there any kind of switch that can be controlled by a phased signal and really works? and how to implement an ideal OPAMP? any ready models? regards, 2000
How to simulate their noise in switched-capacitor circuits? who know?
Apply at input during one clock period 1V and them comput the FFT of the impulse response, that should be equal to the frequency response. The frequency resolution depends on the number of simulated clock cycles. bastos
How to simulate Switched-capacitor Circuit in the frequency domain using spice? ynhe
I just want to simulate a very simple RLC resonator. It is made of copper wire and a capacitor soldered at the both ends of the wire. How can I add the capacitor in HFSS. I found there is only lumped RLC boundaries in HFSS which can only be added o a surface, and I really don't know how to handle it. Thanks for your answer in advance.
How to use hspice to simulate an accumulation mode mos varactor to plot its Cgs to capacitor characteristic
you can run PSS and PAC analysis to simulate opamp with SC-CMFB. Good Luck
Get ATC capacitor, the S-parameter is provided. You can simulate and check out the Series and parallel resonant frequency...
thanks for answering, we can use some simulate tools to caculate the is easy to simulate the microstrip,however,if the line is just single layer copper, what is the characteristic of the line?i think is not the same as a microstrip. when the length is far shorter than lamdar,it is a inductance,but i don
How could i simulate and hence work out the settling time of a switched capacitor integrator using spice? Thanks
I need to simulate my dc-dc converter with load capacitor of 20uF and its ESR. How much will be the ESR for 20uF ceramic capacitor. can anybody guide me in selecting the type of capacitor for low ESR and low cost.
You cannot use normal hpsice noise analysis since it does not account for noise folding effect and thus cannot be used to simulate noise in SC circuits. Use PSS then Pnoise in Spectre instead.
Hello, Does anyone have any tips on how to simulate switch cap circuits in Cadence or ADS ? I need PRACTICAL advice, maybe a screen shot with the set up and advice on how to run the transient simulation and so on. Thanks
i want to simulate a phase shifter.which kind of software i need adopt? thanks
I'm doing a layout of 741 op-amp, however, what configuration can i test the CMRR and PSRR ? thanks !
I heard that there is a tool named SIMSIDES contained in the simulink tools could be used to do behavioral level simulation on sigma-delta modulator,but I hadn't found the tool? had somebody used it?
Hi, all, Could someone kindly tell me how to simulate an SC filter using spectre? and what are the importane points to note during the simulation? Any suggestion will be appreciated.
Dear all, How to simulate AC response of fully differential switched capacitor amplifier? Because of switched capacitor CMFB circuit, the cmref is need to biased the circuit. That means before ac analysis, transient analysis is used( at lease phi1 and phi2, or one cycle is needed before ac analysis). Would you help me on this? Any (...)
Hi Below, there is a drawing of feeding part of what I want to simulate and also project itself. I have not used capacitor before and I assigned a piece of pec as a capacitor. At the end of the simulation I do not have correct S11 value, indeed I get S11 larger than 1 at some frequencies. According to me, the problematic part of the (...)
Hi microwave guys I'm currently designing microwave oscillators around 4GHz. We tested already one of them and it resonated around 2.2GHz. One reason for the mismatch in frequency can be explained by the fact that we used the wrong Er (3 in stead of 3.5) . But normally i think it doesnt change the freq that much. Or is it????? The next thing
I mean during the transient analysis in hspice, can it simulate random noise caused by capacitor or MOS. Or is there a random number generator in its engine corresponding the white noise or 1/f noise? Thanks
Did anyone know how to simulation switched capacitor filter by Hspice 2004.09 with frequence response?That is if I give AC signal then plot the output gain vs. the frequency.I know that The SpectreRF can do this with command PAC.The HspiceRF has command HBAC seems like the SpectreRF PAC command.
I think the spectre can simulate the transcient nosie of switch-capacitor circuits. You can use PSS, and PNOISE to get the noise information. Yibin.
can u plz post a schematic diagram of the circuit u simulated and tell me what kind of substarete u use khouly
It depends. You can use a value for the pair which connects ou1-ou2 with Vctrl (say hundreds of fF) and a value 3-5 time smaller for the switched pair. For very small values you will have problems with the charge injection from switches. Don't forget to simulate enough time (100 clock cycles) and follow Vctrl.
To Chung-Yuan Chen, How to simulate the CMFB' pahse margin and gain if I use Hspice ?
The same current that discharges the first capacitor also charges the second capacitor. They reach equilibrium at V/2. You can simulate the RC discharge in Spice and see the final V/2 result (or the LC oscillation). Here's another way of looking at it:
1. delay cell is simply composed of 2 inverters and one MOS cap between them, one of the two inverter is weak type, and the other is medium type. u had to simulate it against VCC, tempearture, corner to find a optimum W/L v.s. delay time. 2. in talking about the above , I assume that u had already a POR signal , and all u want to do is delay it u
Hello, I am designing a switched-capacitor common feedback full differential operational transconductor amplifier, but I couldn't know how to simulate gain and phase margin of switched-capacitor OTA using Cadence tools? Please give me a advice, thks.
Dear all: I designed a switch-capacitor comparator,which is used in the pipeline ADC. The function of this comparator is right,.but i don't know how to simulate the offset of this comparator. This comparator is Preamplifer+latch with autozero function.Thanks
Dear all: I designed an AMP with switch-capacitor CMFB. but i don't know how to simulate the open loop gain and GBW of this AMP. When i do this simulation,i replaced the sc CMFB with an ideal cmfb in the AMP,then i can get these results,but i don't know whether these results are the same as SC CMFB. Another quesition is how can i get the r
An ADC based on binary weighted capacitor array needs to simulate its DNL and INL. I think the most important factor affecting the DNL and INL is the mismatch of the capacitor. Should I employ Mento carlo analysis ? And how to caculate the DNL and INL after every times of running? maybe what you say is a current-steering D
How to simulate the frequency response of switched-capacitor filter using Hspice ?
hi, im aware of simulating inductor using opamp. do capacitors can be done same way?
so you mean that we can't do the noise analysis of fully differential amp? then what is the function of the .noise statement in the hspice? from what I've heard, noise is difficult to simulate in spice. I don't think many people can help you because doing noise in old school. I suggest you use spectreRF.
Hi, all: I do not know how to design circuits to simulate these parameters of a full differential OPA such as DC character, AC character, TRAN character, CMRR, PSRR, ICMR? At the same time, the OPA is a full differential OPA whose CMFB is switched capacitor circuits. Help me, Please!!!!
HI GUYS, GOOD EVENING, I'M SURESH, CURRENTLY AN UNDERGRAD DOING FINAL SEM PROJECT. I'M TRYING TO simulate A 5 LEVEL FLY BACK capacitor MULTILEVEL INVERTER(FCMI) FOR 5 LEVEL USING MATLAB/SIMULINK. KINDLY PLEASE HELP BECAUSE I TRIED AND CAN'T GET A PROPER OUTPUT. FOR A 3-LEVEL FCMI I MANAGE TO DO IT. PLEASE ADVICE AND ASSIST ME FOR 5
Hi Iam having problems with differential Lna simulation in spectre. I have designed a matching network that would step down the impedance to a low level . After that i have used an ideal balun from the rf lib and tried to simulate it. I also tried with a VCVS.Neither of these seem to work. My S21 is a straight line . BTW the impedance tran
can anyone tell me the details?
Hi, I am trying to get the DNL and INL for my 12-bit SAR ADC. The problem is that each sample takes abt 2 hours simulation time. Does that mean I have to spend 8000 simulation hours to get the DNL and INL plotted? It sounds absurd to me. May I know am I doing it the correct way and what is the normal practice to simulate the DNL and INL for ADC? Th
Hi, all. I would like to know how to simulate ac response of switched capacitor circuits. Say, I designed a bandpass filter using switched capacitor circuit technique, then how to simulate with Cadence in order to see the filter's frequency response (i.e., bode plot). How to get ac response for the circuits (...)
how to simulate the differential ampifier with switch capacitor comm mode feedback using HSPICE. (AC ,tran analysis)
does LDO's PSRR can simulate the stability of the regulator?