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stability control system , power system stability , ads stability , stability bandgap

151 Threads found on edaboard.com: **Stability System**

Only PM is necessary but insufficient condition for the **stability** of a **system**.Root Locus and Bode Plots should also be examined.Overshoot is a kind of **stability** fact and generally not desired.

Analog Circuit Design :: 03-17-2017 20:33 :: BigBoss :: Replies: **9** :: Views: **680**

Hello Friends,
I am designing a Charge sensitive amplifier and would like to study about the **stability**.
we know, A/1+AB where AB is the open loop gain. If AB is equal to -1 then the **system** will oscillate. How would I know that AB will be equal -1. Please tell me the process to calculate.
A= G sCdRf/ 1+sRf( Cd+Cf)
B= 1+sRfCf/sRfCd...
P

Analog Circuit Design :: 02-28-2017 13:55 :: tisheebird :: Replies: **0** :: Views: **1**

Considering that the cable is already constituided by metal on its compostition, your detector should be able to determine a differential variation in the EM field, so the threshold adjust aswell **stability** of analog circuitry could be an issue. In continous prodution processes, QC is better achieved by visual **system** sensors, although on this approa

Analog Circuit Design :: 01-13-2017 11:54 :: andre_teprom :: Replies: **1** :: Views: **517**

Define feedforward **system**, define absolute stable...
Commonly, ffwd **system** means an open loop control **system** without any feed back. As far as I'm aware of, "absolute **stability**" is an algebraic rather than control theory term. In so far I'm not sure what's it's expected to mean in this context.
For control (...)

Elementary Electronic Questions :: 12-30-2016 19:04 :: FvM :: Replies: **3** :: Views: **538**

Hi All,
After a some survey in control **system**s, it seems that relative gain array(RGA) criteria is used for tuning MIMO feedback **system**s. Has anyone closed MIMO **system**s using this technique? But this method doesn't look at the classical phase margin(PM), modulus margin(MM) and gain margin(GM) criterias, so I have my doubts on this. (...)

Analog Circuit Design :: 12-10-2016 03:47 :: deba_fire :: Replies: **9** :: Views: **926**

A **system** can have any number of poles and zeros below the unity gain crossover. For **stability**, we need only a good first order roll off around unity gain crossover. Your example of (1+s/wz)/s^2/wu^2 is perfectly stable. This is what happens in a pll or in a multipath opamp/feedforward opamp. Another example (1+s)^2/s^3.
One cannot determine stabil

Analog Circuit Design :: 10-25-2016 18:07 :: deba_fire :: Replies: **18** :: Views: **2593**

How to do **stability** analysis for multi loop **system**? Any suggested Papers for this?
As far as I know - it is really a problem to find suitable answers.
According to my experience we can say the following:
* A multi-loop feedback **system** has more than one single feedback loop (that`s logical).
In most cases, we c

Analog Circuit Design :: 07-18-2016 14:02 :: LvW :: Replies: **1** :: Views: **368**

Hi i have attached an image of a very simple op-amp. I am learning the basics of op-amp.
130712
The 1st image we have the opamp amplifying the difference of the two inputs
and therefore the output voltage, X = 0.99 which is depicted in figure 2. I was taught (just a simple example as such) that now if you take the diffe

Analog Circuit Design :: 07-14-2016 06:03 :: preethi19 :: Replies: **9** :: Views: **543**

You must have > 2 samples per Hz of loop bandwidth for frequency accuracy and much more for phase **stability**.
Try 960 samples per cycle but only compute 60 times per second using algorithm to process incremental delayed samples.
or get a fast Linux OS real time simulator.
Which Uni are you at?
- - - Updated - - -[/SIZ

Software Problems, Hints and Reviews :: 11-20-2015 18:13 :: SunnySkyguy :: Replies: **13** :: Views: **1008**

The **stability** of any feedback **system** for voltage and current is challenging from no load to full load or dynamic non-linear loads, lab supplies with these features tend to be more complex. This is similar to the feedback gain going from 0 to

Service Manuals, Requests, Repair Tips :: 10-24-2015 19:41 :: SunnySkyguy :: Replies: **2** :: Views: **810**

Hi All,
I am a newbie in the field of electronics but have enthusiasm to learn and build.
I have a project I am involve in which needs from us to build a high-resistance sensor measurement **system**.
The sensor, because of the in-**stability** of fabrication, can have a baseline resistance between 10MOhm to 70MOhm.
The quest here is to measure the abo

Analog Circuit Design :: 07-19-2015 11:04 :: sagi4422 :: Replies: **1** :: Views: **445**

Hello everybody
I have a problem, about **stability** region of the continues **system** that's has been discreted.
I would appreciate if you could answer my question.
I have a circuit that including several capacitance, inductance, and
resistance. I get the A (state space matrix) of the **system** and then
discrete this matrix by Backward Euler (...)

Power Electronics :: 07-03-2015 14:15 :: mohammadmother :: Replies: **0** :: Views: **423**

You can model everything as linear blocks to perform an AC (small signal) **stability** analysis (either by calculation or simulation).
For example, the PWM part of the circuit converts the error voltage to a PWM duty-cycle which generates a voltage at the converter output as determined by the input voltage and the duty-cycle. So you calculate what t

Analog Circuit Design :: 03-06-2015 19:08 :: crutschow :: Replies: **9** :: Views: **1109**

Don't care about the phase near switching frequency and above. The **system** can't be described as time-continuous and analyzed with bode plot in this range. The results above 50 kHz are effectively meaningless for **stability** analysis.
The basic problem is that you have no phase margin according to bode plot. Step response is respectively bad. You s

Power Electronics :: 04-02-2015 11:05 :: FvM :: Replies: **3** :: Views: **758**

Which is better ? mikroElectronika's mikroMedia for PIC32 or mikroMedia for STM32 ?
I need speed and **stability**. I am making a security **system** and want to use TFT and Touchscreen. mikroMedia boards have TFT+Touchscreen and they are stackable. I will be also using mikroBus Shield for mikroMedia and I will be plugging GSM2 Click and GPS Click to th

Microcontrollers :: 01-29-2015 23:19 :: milan.rajik :: Replies: **5** :: Views: **1211**

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 01-27-2015 01:36 :: SunnySkyguy :: Replies: **2** :: Views: **563**

Hi,
I am designing a Flyback converter. I want to understand the inference of **stability** analysis related to power supply.
1.What is the meaning of a stable **system**?
Stable means a step load won't cause lots of ringing or oscillation from a non-linear or capacitive load or any desired load
it

Power Electronics :: 12-17-2014 19:36 :: SunnySkyguy :: Replies: **1** :: Views: **904**

Alexandra - it seems that you are simulating the closed-loop **system**, correct? However, because you were speaking about **stability** margins - are you aware that **stability** margin simulations require loop gain analyses?

Analog Circuit Design :: 12-17-2014 11:20 :: LvW :: Replies: **9** :: Views: **1622**

Analog Circuit Design :: 11-26-2014 05:12 :: SunnySkyguy :: Replies: **5** :: Views: **827**

PID control needs specs to define , **system** step error response, overshoot under worst case gain and time lag and rate of change of disturbance response Impulse error response ( like opening door on ice cold day)
For **stability** , frequency / phase margin is used to determine correct feedback signal conditioning and gain to optimize speed, (...)

Microcontrollers :: 08-10-2014 13:15 :: SunnySkyguy :: Replies: **11** :: Views: **832**

Dear Friends...... i am ph.d Scholar in power **system** ....i need to write a code in embedded **system** to improve the power **system** **stability**... is there any link or ebook to write a code in embeedded **system**....(or) any other courses in embedded **system** need to do means also say that details (...)

Embedded Linux and Real-Time Operating Systems (RTOS) :: 05-27-2014 07:22 :: Vigram Sithesparan M :: Replies: **1** :: Views: **503**

It's possible with industry standard analog multipliers like AD633. As you are designing a feedback **system** with variable gain, achieving **stability** for all operation conditions isn't quite easy, but basically possible at the cost of bandwidth.

Analog Circuit Design :: 03-02-2014 09:33 :: FvM :: Replies: **2** :: Views: **559**

The influence of a small amount of positive feedback - as long as the **system** remains stable - can be found using the same formula as for negative feedback, however using a POSIVE sign for the loop gain. (**stability** limit for unity loop gain).
Example: Voltage controlled feedback (as for operational amplifiers): Zout=Zol/(1-A,loop) with Zol=open lo

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 03-02-2014 09:21 :: LvW :: Replies: **3** :: Views: **605**

1. PFM mode loop is open loop or close loop?
2. Is it required to do **stability** Analysis for PFM loop ? If No Why ?

Analog Circuit Design :: 02-03-2014 05:03 :: skamthey :: Replies: **8** :: Views: **1075**

Hi,
I understood what you told me now. Let me explain what I understood. First I have a **system** a(s) and a feedback=1. For this case the phase margin and gain margin are bad or really small, so what I want to do is to compensate the **system**, that means increase the value of phase and gain margin. Am I correct ?
[COLOR="#0000

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 01-10-2014 08:49 :: LvW :: Replies: **12** :: Views: **802**

Can you help me compare these results? They're the simulations of a closed loop **system** . When we change the poles, (in this case, there are 4 poles), the response **system** also changes. The 4 poles involves 2 complex numbers and 2 integers, but I don't see the relationship between the poles and the response. I don't see an exact description. I mean,

Elementary Electronic Questions :: 11-25-2013 01:38 :: MissP.25_5 :: Replies: **5** :: Views: **523**

Analog Integrated Circuit (IC) Design, Layout and Fabrication :: 09-01-2013 17:13 :: FvM :: Replies: **3** :: Views: **591**

Hey , what's should be differenciated , error term or main signal ? The output should be time domain signal in 1D monitor in this case. the **system** should have more than one loop circuit , the output will have more dimension, ND for good **stability** take care when the excident emerge.

Analog Circuit Design :: 06-07-2013 14:18 :: phongphanp :: Replies: **12** :: Views: **1139**

Whats the need of studying control **system** in electronics?
Feedback is one of the basic principles applied in electronics.
Connected with the principle of feedback are the terms "feedback loop", "loop gain", "closed-loop gain", "**stability**", "**stability** margin".
The theory behind all these parameters is provided by s

Elementary Electronic Questions :: 05-17-2013 15:48 :: LvW :: Replies: **3** :: Views: **573**

i know for **stability** we need positive PM GM . that means at -180 degree gain should be negative(in decibels) for stable **system**s . From where this arrives i mean why -180 ?? i read somewhere that after -180 degree NEGATIVE FEEDBACK BECOMES POSITIVE FEEDBACK and if at that time gain >1 than **system** will oscillate and become unstable ?? why (...)

Miscellaneous Engineering :: 05-07-2013 18:52 :: tronicsworld :: Replies: **0** :: Views: **2608**

In practice I have oscillation and I think that the reason for that could be multi-poles **system**.
In practice, small signal analysis doesn't describe the **system** behaviour completely. The most severe point is the class B current boost stage where both MOSFETs are off for the calculated bias point. In addition MOSFET and IGBT capacita

Analog Circuit Design :: 05-03-2013 15:31 :: FvM :: Replies: **8** :: Views: **667**

Yes. That is what happens at the frequency for which |GH|=1 when the **system** is in the limit of **stability**.
(There is an additional condition related with the slope of the phase, but let's leave that in this moment.)
Suppose that at zero-frequency G and H are both real and positive . Then we have negative feedback. If increasing frequency we find tha

Elementary Electronic Questions :: 04-23-2013 12:28 :: zorro :: Replies: **4** :: Views: **639**

Dear Sir(s),
I need contribution on my masters thesis, i need to know the recent challenges in power **system** **stability** that are not solved completely.
Thank you in Advanced

Elementary Electronic Questions :: 04-08-2013 08:54 :: marabdul :: Replies: **1** :: Views: **449**

Can a negative-feedback **system** ever have large positive phase shifts that causes in**stability**?
All the examples in my old textbooks deal with instances where the overall phase shift approaches -180°.
How do we deal with instances of positive phase shifts near and beyond +180°?
I found this reference on the web that mentioned phase an

Analog Circuit Design :: 03-27-2013 15:42 :: E-design :: Replies: **4** :: Views: **540**

A evryone knows, phase is cyclic with 360°. So in your diagram, presuming it's actually showing the overall loop phase, -360° would be the reference for phase margin. For valitidy of the simplified phase margin **stability** criterion, there must not be multiple crossings of the n*360° line.
In simple words, phase margin is the distance to the osci

Analog Circuit Design :: 03-18-2013 20:21 :: FvM :: Replies: **2** :: Views: **557**

This seems to be temperature drifting problem,not impedance changing or something else.
Check your bias circuit and temperature **stability** of your **system**.

RF, Microwave, Antennas and Optics :: 03-18-2013 13:25 :: BigBoss :: Replies: **5** :: Views: **1088**

An example of this may the hierarchical levels of **stability** for Stratum I,II & III clocks used for synchronous networks. The clock is derived from the data source with defined Stratum level and regenerated with best source available from multiple choices of sources. An insular network is isolated and requires no outside reference. A plesiochronous

ASIC Design Methodologies and Tools (Digital) :: 08-18-2012 15:40 :: SunnySkyguy :: Replies: **3** :: Views: **5108**

Hello everyone.
I am designing a VGA for signals up to 3Ghz.
It seems that everytime I put a feedback in my circuit the K factor gets lower than 1, though the phase margin and gain margin calculations would seem to suggest that the **system** is stable.
I was wondering whether I can still trust the K factor for lower frequencies and in **system**s with

RF, Microwave, Antennas and Optics :: 05-03-2012 11:10 :: giangriff :: Replies: **1** :: Views: **840**

If only the following data are known in a negative feedback **system** is it possible to make a conclusion about **stability** or not?

Analog Circuit Design :: 03-19-2012 16:33 :: E-design :: Replies: **15** :: Views: **814**

In general yes, I'd expect it to remain stable. The RHP zero frequency should increase at light load, and as your controller starts operating in DCM, its gain should decrease. Those two things should only increase **stability** (unless the **system** was only conditionally stable). The only thing it could worsen is the damping of your LC, which might ca

Power Electronics :: 02-08-2012 13:57 :: mtwieg :: Replies: **3** :: Views: **1187**

the Z-transform is a complex transform deals with the explanation on impedance. here in your que z<|1\a| means your **system** transfer function will be convergent only untill your impedance value remains between the values of -1\a to 1\a. that means your **system**'s ROC i.e. **stability** is inside the circle with radius 1\a.

Digital Signal Processing :: 10-30-2011 12:14 :: jigisha :: Replies: **5** :: Views: **996**

Hi all,
I have a **system** that works as an analog PLL (PFD, loop filter, CO, N divider) to stabilize the phase variations of a reference. (see attachment)
However, there is a significant delay ? 50 microseconds -, due to long distance transmission, in the feedback loop between the VCO and the N divider.
Which is the best way to analyze the sta

Analog Circuit Design :: 08-25-2011 12:38 :: rafael2323 :: Replies: **1** :: Views: **1177**

Hi everyone,
I am dealing with 2D FDTD simulation in Cylindrical coordinate **system**. I attached my matlab code but there is some problem which i dont undersand. It seems as dispersion but time and space increments obey Caurant **stability** condition.
Can someone post me FDTD code in Cylindrical coordinates or help me about the problem.
Thank

Electromagnetic Design and Simulation :: 08-03-2011 17:04 :: alperuslu :: Replies: **3** :: Views: **2801**

Hi,
Usually a pullup & pulldown circuit is implemented in a circuit when one of the specifications of a design requires low standby current. Will this circuit affect the **system** **stability** in an LDO design? When is the proper way to design pullup/pulldown circuit?
Is this circuit (pullup/pulldown) need to be designed after obtaining all other desig

Power Electronics :: 07-12-2011 03:06 :: ella1923 :: Replies: **1** :: Views: **958**

i tape out one PMU chip and when it coming back , i find in one boost dcdc the output ripple is so big , and seems not stable, please see the waveform of test.
i wonder if it is **system** loop **stability** issue ,and what is the root cause, can you give me some suggestion?
BTY, the simulation results and small signal model caculation shows the (...)

Power Electronics :: 05-20-2011 07:58 :: q0w1e2r3 :: Replies: **3** :: Views: **959**

The main reason is for frequency **stability**, generally using a GPS synchronized signal generator.
The phase noise is not improved.

RF, Microwave, Antennas and Optics :: 04-04-2011 09:34 :: vfone :: Replies: **5** :: Views: **2318**

The AGC is basically a feedback **system** and a delay introduced inside of the feedback loop, also would increase the **stability**.

RF, Microwave, Antennas and Optics :: 03-19-2011 19:31 :: vfone :: Replies: **2** :: Views: **2636**

A bode plot is a simple, but incomplete, way to test for **system** **stability**. There are also Nichols plots, root locus, etc. The bode plot is based on the fact that the transfer function of a feedback **system** is T(s) = G(s)/(1+GH(s)), where G(s) is the forward gain, and H(s) is the feedback gain. By observation, one does not have to know a (...)

Analog Circuit Design :: 03-07-2011 10:25 :: biff44 :: Replies: **11** :: Views: **2299**

Hi,everyone.
Please see the **system** showing in figure1.
**system** background: It?s used in wireless digital repeater including local unit and remote unit. And there are 2 different reference clocks in whole **system**, so it will cause the **system** output frequency offset badly if the 2 clocks (e.g. TCXO ) exist large frequency (...)

Digital communication :: 02-16-2011 00:43 :: LinXiaoling :: Replies: **0** :: Views: **833**

Use digital frequency correction to avoid **stability**. However, frequency lock accuracy will be limited by digital step.

Analog Circuit Design :: 02-01-2011 10:04 :: leo_o2 :: Replies: **1** :: Views: **755**

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