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381 Threads found on Tanner
i need 32 nm finfet library files for tanner ? where can i download them
Hi all, we are need a BJT Model file 250nm, for tanner tool v13. (urgent),.. anybody have the model file, please help us,.
hello, where can i download 45nm model library files on tanner EDA
any one have link to download tanner software. i need it to complete my ME project
i doing my ME project It is your ME project and I think the aim of such projects is to learn! So 1st study the 10 bit segmented DAC, then simulate a Matlab model if necessary, then implement it using the tanner EDA tool. Also this post is in the wrong section! tanner EDA tools are used for Analog and mixed-signal design work.
Hello folks, I have to obtain the consumptions waves traces from a circuit in tanner EDA (T-Spice) by commands lines. It is easily obtained from W-Edit, but it is not an option to me. I usually simulate thousands of spices files using bash terminal (without graphical interface). I searched in the T-Spice user guide for this with
missing diode model definition for "diode" referenced by device (s): DDiode_1 plzzzz help:cry:
i am making a project using a tanner eda tool and i need 70nm technology finfet library file.. help me to get this file
Start with tanner and find out who the foundry contact is, if tanner is not the one who provides the kits (usually it is the foundry's IP, so they are in control of release).
This is done all the time, you just need to have two MOSFET models fitting the two species and link the symbol appropriately to the model for each instance (or, you make a symbol for each FET species that has a link to the proper model). If you were going to do this for reals you'd have a foundry PDK from a flow that offered such options (two
I need a schematic based tool such as tanner S-Edit. (Layout, DRC,LVS are not required) > I should be able to calculate critical path propagation delay > I should be able to calculate power consumption/dissipation > I should able to measure critical path delay and power consumption for different mos technologies >The technology library
the netlist work well on hspice but when simulating the same on tanner 13, i am getting two fatal errors. is there any mean to convert netlist syntax,
When I try to Add Library to new design, error pops up 'S edit Schamatic tool has stopped working' and S Edit closes. When I open old design(previously saved), tanner S edit closes in seconds with same error. What could be possible causes? Please help
Is it possible to use Multi threshold circuit in tanner tool. If it is possible how to add 45nm technology and 180nm or 250nm technology library files to reduce the current leakages in stand by mode by using sleep transistor approaches.
Hi, I want to do a project in tanner tool with FINFET technology. I need FINFET technology library files. and I want to know what should be the lengths and widths of 45nm technology
Can somebody help me out debug the issue of non convergence. 126370 error T-Spice - tanner SPICE T-Spice - tanner SPICE Version 14.11 Network license Product Release ID: T-Spice Win32 14.11.20090811.05:10:58 Copyright ? 1988-2009 tanner EDA Parsing "C:\Users\RAJUCH~1\AppData\Local\Temp\Comparator1.sp" Inc
how to set clock pulse for shift register in s edit plzzz replyy
Hi, I am a student and doing project in analog circuit design in RF frequency. I came to know about ADS tool and tanner tool. Can anybody guide which tool is better for RF circuit design? Thanks
Dear sir,,please provide me the required 2.8 micro technology file.I feel happy if you provide me solution.i am eagerly waiting for your result.
Dear Sir, As per my thesis requirement,I want 280nm and 100nm technology file.I hope you will provide me the best solution as I use tanner 13 version.I hope you will give your best resukt na dnever tried to desperate me.
If you get help from no where read the tanner L-edit documentation *carefully*. At least that's how I would proceed!
Other capacitor design available? This doesn't depend on your design tool (tanner, which I don't have access to, anyway), but on your PDK (physical design kit). You should tell which one you're using (from which foundry), and for which process size. In CMOS there are always MOSCAPs (poly|gate_oxide|bulk) a
How to calculate manually delay in tanner s- edit?
how to add model file for different transistor with different vtho in tanner tspice
Getting an error in tspice..." missing subcircuit or external c model definition"... anyone know about this error...iam using symbol of one design in other design..didnt understand why this is coming for some design
How can I use Mos as a capacitor ?? I have to implement the same in tanner EDA tool ( S-edit ). Kindly help. Need it for my project
Hi, Am a VLSI DESIGN student, doing LOW DROPOUT REGULATOR based project using tanner tool but it is not having a power mosfet library, so kindly please tell me the power mosfet library link, for doing my project. please help me... With Regards, Karthick, 09043849884.
How to represent a non-linear resistor in tanner EDA?
OrCAD is for PCB designers and so has a lot more IC footprints, and vendors provide many more. tanner is for IC design and external components, especially unique ICs, is an afterthought. You probably would use the PSpice models from vendors and create your own layout views. But tanner is not really meant for PCB design, last I looked anyway. It ma
is their is any option to select high threshold voltage transistor and low threshold voltage transistor in tanner tool
I am doing my project on tanner tools. Required you help to proceed further need to know how can i calculate power,delay and is there any option for auto layout in tanner tools using schematics
Hello! I see this tsmc 0.35 tanner file here: However, this file is only for TSMC 0.35 1P4M not 2P4M. I need 2P4M. Could you help me? Thank you!
Hi , can u tel me how to give the clock pulse as input in tanner v13 tool?
I am tryng to design the Analog Amplifier in tanner EDA the probem is that the base paper is on .18um BSIM3v3 as i know because of .18 um technology the MOS Channel length should be .18um but in base paper the author writes a line for the sake of simplicity he takes 1 um MOS channel length and i am unable to chage the channel length from 0.18um to
Hi I synthesized my verilog code with Leonardo Spectrum. then I converted the verilog file to tpr file.but when I try to make layout from this tpr file with CUB library(cub.tdb), Ledit makes a wrong layout that it has very many DRC errors and some connections don't reach to any signals. I attached cub.tdb,please check it. 113343[/ATT
Hi the mhp_n05.tdb is a basic tanner database file to make different layers for layouts in Ledit.I have another library (cub.tdb) that has different layers from mhp_n05.tdb. I don't have extract file for cub.tdb,so I want to change mhp_n05.ext to know cub.tdb layers,but I don't know exactly which layers are equal in these libraries. some layers
Hi I have an old tdb file(cub.tdb) to create Layout from tpr in tanner Ledit. I made Layout with this library but I don't have it's extraction file to extract spice netlist. If you have this file or you know a website to download it,please introduce it. Thanks
Hi friends, I draw some circuits using those circuit schematic. But I know how to calculate propagation delay of the circuit???. If anyone know the answer, please tell me briefly.
Hi Everyone, I am designing an NCO using tanner EDA. After simulating & verifying the design in S-Edit, i have generated the TPR file and completed the SPR also. is it possible to do post layout simulation after SPR. if so, kindly give me the steps regarding the same... with thanx, u&me
Hi I have a tpr file that it is a description of ALU.I want to make layout for it with cub library(cub.tdb file) in tanner L-edit,but when I try to do this with SPR, it makes following error: SPR pad Route setup: pad route i/o signal layer and power layer must be different. please correct spr pad route setup> layers. I don't know what is t
hi, i am using tanner EDA S-edit 13.0 software for my project and i want to calculate power in that ,so please help me for how can i find the power please give reply...
Not a tanner user, but this error looks like some callback is not triggering correctly and probably not found at all. I would look to the installation, especially whether your $PATH includes what it is supposed to include for the tool to find its own collateral "stuff" and whether the software is installed in its default location.
I accidentally pressed "Home View" at W-edit. Now the chart's displaying a different graph. :sad: Please help me get out of home view. thanks! :-o
Hi I created an array multiplier in schematic mode with S-edit,then I extracted spice netlist,but I don't know what is this technology process,because transistors is defined like following line: M2 Out A Gnd Gnd NMOS W='28*l' L='2*l' AS='148*l*l' AD='144*l*l' PS='68*l' PD='68*l' M=1 I want to simulate this netlist with 0.18 micron technolo
Hi friends.. I have used tanner for simulation. Can we generate the layout of a circuit directly from its schematic using tanner like MICROWIND ? If a circuit consists of about 1000 MOSFETs, which tool should I prefer for layout designing and optimization: tanner or OrCAD(Lite Version) or LTspice or LTpowerCAD ? I want to design a (...)
Hello, I am on hunt for tanner PDKS. Hence I am bombarding the forum with these questions. In the tanner installation, there is MOSIS scalable HP 500nm process given. Since it is a scalable process, can I change 500nm to something like 350 nm and expect it to work, ie will it remain scalable process for HP. Also, will RC extraction take place.
Hello, I came across these Magic based PDKs at the following these be somehow used for tanner tools. Any ideas will be deeply appreciated. Thanks, Hobbyiclearner
Can someone help me about the simulation of ac and dc analysis and also transient analysis of current mirror OTA by using tanner v 13? I need step by step tutorial about the simulation. Thanks a lot!
Fatal Error : "Cell0.sp" line 32 Could not resolve model "NMOS25" referenced by "XINV_1.MM1n"
Fatal Error : Missing MOSFET model definition for "NMOS" : Referenced by device(s): : MNMOS_1 how to resolve this error in tanner eda v15