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6 Threads found on edaboard.com: Unresolved Reference
Hi all.. When i run dft_drc scan.spf i get a error like this. scan.spf is my spf file.. unresolved reference (Signal "x"is not a netlist pin). (V5-1) What will be the reason for this? Kindly help me.
I would like to see the inside of a module, without using a port module submodule (a,b,c); . . reg subtest; . . . endmodule module _main (testout); submodule _sm(a,b,c); assign testout=_main._sm.subtest; endmodule synplify report error: unresolved hierarchical reference _main._sm.subtest I do
Hi. When I running simulations rocketio in ModelSim show this error: Error: (vsim-3043) fibre_mgt.v(154): unresolved reference to 'ALIGN_COMMA_MSB' in GT_FIBRE_CHAN_INST.ALIGN_COMMA_MSB. # Region: /top_mgt/mgt Why??? Thanks
Hi I used Flipflop primitive from language templates of Xilinx ISE9.1i in my design. Problem- When i try to simulate the design using modelsim. iam getting error like this.. project open {C:/Documents and Settings/keshago/Desktop/tetbench/flop} # Loading project flop # Compile of tesflop.v was successful. vsim -L {C:/Documents and Se
Hi I am using Modelsim_xe ver6. When I try to compile some design I get this error "Error: (vsim-3043) C:/Xilinx/verilog/src/uni9000/FDCE.v(31): unresolved reference to 'glbl' in glbl.PRLD." How to overcome this error? another note: Xilinx library is not @ that location "C:/Xilinx/...", and even after copying the Xilinx library to that
hi i m using Uvision3 Keil compiler. i wat to create my own library(of functions).how to make that and how to use tha lib in my main files. i tried this with option create lib in the compiler . it it creating lib files but i use this there is error like *** WARNING L23: unresolved EXTERNAL SYMBOLS *** ERROR L128: reference MADE TO UNRE