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usb blaster download cable design, need help!


hi, i want to make a usb blaster download cable for altera fpga. could you please give me some suggestions or schematic? thanks.air2008...
PLD, SPLD, GAL, CPLD, FPGA Design :: 16 Aug 2009 19:19 :: uyouta11 :: Replies: 104 :: Views: 48436

an altera fpga usb blaster on ebay


altera usb blaster compatible fpga cpld jtag programmer only $22http://cgi.ebay.com/ws/ebayisapi.dll?viewitem&item=130319298984&sspagename=strk:mesox:it...
PLD, SPLD, GAL, CPLD, FPGA Design :: 30 Jul 2009 3:22 :: jaychow :: Replies: 0 :: Views: 255

fpga implementation of feature extraction module from images


hii am putting togather a feature extraction module from facial images on fpga.i have half of my algorithm ready and i can find the face in an image,then the eyes and all features from the eye. i have done all of this on matlab and i am interested in...
PLD, SPLD, GAL, CPLD, FPGA Design :: 09 Jul 2009 15:15 :: ravurig :: Replies: 4 :: Views: 580

another thread about usb cables for cpld's/fpga


hi,i havent posted here in a while, so bare with me. i have serached this forum, and many others, as well as google itself for ideas on how to solve the ever growing problem of programming cplds with no parallel port on pc.on my new computer, i no l...
PLD, SPLD, GAL, CPLD, FPGA Design :: 13 May 2009 18:31 :: Buriedcode :: Replies: 8 :: Views: 1515

usb-blaster from taiwan has anybody used it?


i saw this product on ebay . i wonder if is 100 % compatible .has anybody used it?they say it supports 1.2~5v. price is $28 + $10 shipping chargeshttp://www.easy-chip.com/product/magic-blaster/magic-blaster_photo_01.jpghttp://www.easy-chip.com/gif/ma...
PLD, SPLD, GAL, CPLD, FPGA Design :: 12 Feb 2009 9:12 :: bingbinICE :: Replies: 2 :: Views: 354

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testing fpga board


can anybody help me on step by step testing of fpga board for fpga io clocks working and ddr communications..i am new to this and hence need step by step understanding of this. as a normal hardware person i need certain things like checking powersup...
PLD, SPLD, GAL, CPLD, FPGA Design :: 28 Feb 2008 18:32 :: Iouri :: Replies: 5 :: Views: 234

to program fpga


hi,i have a problem about connection jtag & my fpga.i have connected jtag to my fpga correctly.my fpga is epm 7032 slc44 & my jtag is byte blaster mv.also my software for programming is quartus.but after programming process appear bellow message:jtag...
PLD, SPLD, GAL, CPLD, FPGA Design :: 30 Oct 2006 15:52 :: alimassster :: Replies: 9 :: Views: 1779


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