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ideal vccs
62 Threads found on Vccs
Dear all I want to design a vccs to implement this function: I(y)<+ tanh(V(x)); I have done that using a verilogA model and I connect it in the cadence circuit which is as in the attached file, the model itself works fine but I want it to act as a real electronic component when connected to the circuit, by means when I change the output re
Use vccs with VtPRBS.
Hi all, I am trying to build a simple fully differential op-amp just use vccs. Here is the single-ended design I do in the cadence.121740 So I am wondering how can I build a fully differential op-amp model. I don't need transistor level design. I need a model so I can change gain, bandwith. It's for my project. So
Use a vccs (G-element) with a PWL source, something like G_chg_pmp 1 0 PWL(1) 2 0 7V,200uA 6V,250uA ..,..... s. e.g.
Hi all, I just start to learn verilog-a and want to create a voltage-controlled current source(vccs) in cadence virtuoso. I learned that cadence would check my syntax automatically and create the symbol if the code is OK. However, when I open a new cellview in verilog-a, I can't save the code, so I can't convert the code to symbol... When
HI, I used the attached circuit to drive led about 10A. if mosfet operate in saturation region, the dissipation power of mosfet is large. so is it possible that mosfet operate in triode region in vccs. and what is differences between them, for example In triode region will cause the current stability problem or mosfet broken.109282
Hello I would like to replace the vccs by a SDD component in the small signal model of GaN HEMT(Using ADS). Could somebody help me in this? How many ports should the SDD be and what should be the equations? Like this ?? 107453
How to understand how power MOS help maintain output voltage of LDO while it works in saturation region? Thanks. Can you build a CS amplifier that his drain voltage (VD) is equal to 0.5Vdd or 2/3Vdd ?? In which region MOSFET is operating? In saturation ? So how it is possible if MOS work as a vccs? Also notice tha
Can anyone suggest me some good circuits working at 90nm for- 1) Current Controlled Voltage Sources (CCVS) 2) Voltage Controlled Current Sources (vccs) 3) Current Controlled Current Sources (CCCS)
Hi guys, I'm trying to translate the model of a this circuit from spice to cadence * HP Memristor SPICE Model * For Transient Analysis only * created by Zdenek and Dalibor Biolek ************************** * Ron, Roff - Resistance in ON / OFF States * Rinit - Resistance at T=0 * D - Width of the thin film * uv - Migrat
Hi, I'm working one generating a vccs in finesim. The code is as follows : Videal ideal 0 1 rpolyres ideal 0 50k gin_current IN OUT pwl(1) IN OUT 0 0 0.1 0 0.2 'i(videal)' Howere, I always get an error saying 'ERROR! variable in static expression' I checked the .sp file and find that it is the 'i(videal)' that causes this pro
here is the here's the problem: In the sim, dropping the input voltage to 0 results in an instant cutoff at the output P-FET. On the breadboard, the output current from the P-FET sloooooooooowly drops to 0 over 5-10 seconds after setting the input/control volt
In my opinion, it doesn't matter so much how you calculate or measure the input impedance as long as you tell how you did calculate/measure it: real circuits never are like an (ideal) VCVS nor vccs - mostly something in between, and they mostly have defined loads. In a real circuit I'd want to know the input impedance of my circuit with
Hello, I am a newbie of IC. And these days, I really confuse about the "input impedance". According to TWO-PORT, for a VCVS, we should open the output to calculate the input impedance, and for a vccs, we should short the output to calculate the input impedance. But for a OPAMP or OTA, should I open or short the output, or it depends? We know
Hi, I am trying to write a verilog A model for Voltage controlled current source. module vccs(p,n,pc,nc); inout p,n; input pc,nc; electrical p,n,pc,nc; parameter real gain=1; branch (p,n) iSrc; analog begin I(iSrc) <+ gain*V(pc,nc); end endmodule It works fine when there is a load connected to the current sourc
I think you might be able to do this with a parallel controlled current source (multiplier), "sniff" the inductor current and add a variable (perhaps use a ccvs -> vmult -> vccs) parallel current. Macromodel style?
83459 I made circuit for impedance matching. This vccs is small signal model. and I wnat tocalculate K-factor. So I insert Stabfact in this circuit. and then, I click the "simulate" button. But I can't see K-factor. 83460 I can get the S-parameter but can't get the K-factor. yo
Now that I had that great help with figuring out how to use spice I am now hard at it. I am trying to drive at least 2uA of current through a 1Mohm resistor with some capacitance at frequencys of 100hz to 50khz. From what I have read a howland circuit is a possibility though from some testing I have done it appears I need something a little more. O
I am working on trying to make some impedance measurements and have been reading through a bunch of research papers and everyone seems to be using a Voltage Controlled Current Source(vccs) for their measurements. What I can figure out exactly is why they are doing that as compared to a Voltage Controlled Voltage Source(VCVS). To the best I can tell
I suppose it is quite impossible to design this circuit with a supply of 1.2V. Is there an alternative to implement this vccs with such a low supply?How about if i were to implement self-biased cascode? @leo_o2:Hi, even if i were to use a PMOS instead of a NMOS, will there be a significant difference?
Hi,there! I want to simplify my 5 mosfet amp which is consist of diff. pairs with resistor load.I heard that you can use vccs to replace the input diff. pairs, and the ggain is set to the gm of the input transistor. I know the small signal current can be denoted as i=gm*vgs, then the vccs can model the small signal current cor
Hi!Did anyone done LDO vccs compensation? I did a LDO vccs compensation, through the voltage-controlled current source to introduce a zero point to elimanate the second main pole. but I have a question, is this vccs output between access R1,R2 will affect the static working point? as shown in Figure 1 NETF points on a current path, (...)
Hi everyone,currently i am constructing a voltage regulator and a voltage control current source(vccs) is implemented into the circuit. I need help in sizing the transistors for vccs.I let the sizing of all PMOS to be the same since it is a current mirror and also let the sizing of all NMOS be the same.When i run simulation,all transistors are alw
In my PSpice version (9.2) there is only one ABM model for a vccs that is called by GVALUE. Which version are you using? ---------- Post added at 15:53 ---------- Previous post was at 15:44 ---------- The corresponding line in the netlist looks like this: G_G1 $N_0001 0 VALUE { V($N_0002, 0)*50m }
What in your opinion is a "current mode" opamp? OTA (vccs) or Norton amp (CCCS) or something between (CFA, CC)?
in case of using Cadence/Spectre simulator an "Voltage Controlled Voltage Source" instance (i.e. "vccs") can be used simply with the defined minumum and maximum output current limits. in case of behavioral (e.g. VerilogA) module description a construction "if ... else if ..." should help: ... if (Iout > Ilim) begin
Did you try out the filter by an ideal GM block? Make a macro single pole GM block using a vccs and resistor capacitor at the output to model the output pole and see what is the bandwidth and gain required for making the system work. Then compare it with you Gm cell and see what is lacking.
I'm using a three port symbolically defined device in Agilent ADS but am interested in doing my simulations in cadence virtuoso schematic view if possible. Does anyone know what an equivalent to the THREE port SDD is? If i was using only a 2 port SDD i would use VCVS or vccs in analog lib, but I haven't found a way to make these work so that they t
For constant Current Gain Circle, set up port-1 and port-2 like following. port1(Z=50)---vccs(R1=50,R2=inf,gain=1)---DUT---CCVS(R1=0,R2=50,gain=2)---port2(Z=50) You can get current gain as S21 with this setting. For constant Voltage Gain Circle, set up port-1 and port-2 like following. port1(Z=50)---VCVS(
The vcvs and cccs do not have z and y matrixes.but they do have a T matrix. Here I wanted to point out that you can always represent the two port networks with all types of parameter. Also the ccvs has z parameter matrice but does not have y matrice and other way around for vccs. I think that is enough for start up. ----
I am trying to design a Programmable Gain Amplifier, which contains resistive feedback and a fully differential opamp. For the first step, I want to start with ideal switches and an ideal Opamp(voltage controlled current source with RL and CL). But I don't know how to represent a ideal fully differential Opamp with vccs in ADS? Should I consider th
hai, is there anyone can tell me whats the symbol for dependent current source in cadense virtuoso?What do you mean ? Do you mean CCCS or vccs ? cccs - ADS 2009 - Agilent EEsof Documentation Center [url=edocs.soco.agilent
... i don't know how to put the vccs . May be this figure can help you? Just specify M ≙ gm , e.g.: vccs:vccs1 node1 node2 node3 node4
As mentioned by others, negative resistance is essentially a vccs. It commonly comes in the form of cross-coupled circuits. It uses positive feedback and hence often used for hysteresis comparators, latches and oscillators. You may have seen papers where it is used with a diode (ie positive resistor) to achieve a zero small-signal transconducta
my NDR is..... .subckt MolecularDiode pos neg *the vccs model has the problem of staying constant when the voltage is outside the data points Gdiode pos negtest PWL(1) pos + neg 0,0 .08,100e-09 .16,200e-09 .25,300e-09 .32,400e-09 .4,500e-09 .52,600e-09 .55,700e-09 + .65,800e-09 .7,700e-09 .75,200e-09 .78,100e-09 .8
Atticus: Connect a VCVS (set its gain to 1) at the output of the macromodel you are describing (vccs + R||C) so that it acts as a buffer between this stage and the load introduced by the feedback network of the integrator. This may solve your problem, assuming that you are only checking the frequency response of your circuit in AC simulations.
Hi, I am looking for CMOS based architectures of the four Controlled sources : * Voltage controlled current sources (vccs) * Current controlled current sources (CCCS) * Voltage controlled Voltage sources (VCVS) * Current controlled voltage sources (CCVS) OTA and CC based one are also welcome Thank you so much for your help. Firas
Why do you need to represent an ideal fully differential amplifier with Voltage Controlled Current Sources (vccs)? You can use a Voltage Controlled Voltage Source (VCVS), which is fully differential (in and out). Maybe you need to upload a block diagram of your Multiplying DAC, so that we can understand better what you are trying to do.
An OTA when designed using CMOS.... consists of a differential amplifier.... is that wht all an OTA is...??? a differential amplifier with a current mirror?? i realize tht an OTA is a vccs..... does tht mean it works the same way a differential mp works...???
... i want replace the input trasconductor stage in mixer gilbert cell with two ideal elemnts vccs. I want that this vccs has a gm of 16mS. ... the second circuit is with vccs. In the second stage there is some problem but i don't know witch. To define a gm in vccs of 16mS, i set the parameter trasconductance equal to 16m (...)
Hello guys, I'm trying to model the a generic opamp macromodel and now down to the PSRR stage. Please take a look at the attached picture, I was trying to build a 1st order PSRR model using vccs (G) in the PSPICE, the ouput connected to a small resistor to minic the temperature variation stuff. But this didnt give me useful result. I wonder
I might misunderstand you, but cannot you just use a current source from your simulator library? Current sinus source? Spice: * Current source: Iname N1 N2 Type Value * vccs (voltage controlled current source): Gname N1 N2 C1 C2 gainvalue Spectre: * pick from a variety of components in analogLib
hello, i would like to ask one question: We can make ideal opamp in cadence by using VCVS (in analog library)+lpf_1storder(in ahdl library). VCVS set the gain of Opamp, and the lpf_1storder can set the unity gain bandwidth of Opamp. then we can get ideal Opamp to simulate. My question is here: I want to get ideal OTA to simulate OTA-C f
You can use controlled sources (VCVS, vccs, CCCS, CCVS) to add and invert signals.
Hi All, I have netlist like this ********* vdd vdd gnd 3.3 rload s1 gnd 1k m1 1 b1 s1 gnd nch_33 w=4u l=2u gmx1 vdd 1 vccs b11 gnd 20u vin1 b1 gnd 1.5 vin2 b11 gnd 1 .end ********** irrespective of my gate voltage drain current of m1 is 20u. Is this because of ideal current source forcing the current? How this 20u is sinked b
Hi all, Any one got experience with vccs or MDB protocol that use in vending machines. I only can find the spec information about the MDB protocol from internet. I am still looking for information about vccs protocol. I wanted to build a device that convert both vccs and MDB protocol to interface with either RS232 or Infrared o
This slide is from lecture note at UC Berkley. There is error message on Xbalun2 when PSRR's simulating. Isn't the balun bidirectional ? The error message is showed below. "no input to vccs/vcvs at node 0:vo_diff defined in subckt 0" Can somebody help me to solve the problem ? Thanks in advance ! You can see the spice file below. **
I will reply how to do in spectre. First, you need to model PFD+CP. You can use vccs source. The gain of PFD+CP is Icp/2/pi Second the VCO is modeled by Kvco/S. You can use a capacitor to model them. Third, you can model divider. It is only a gain with 1/N Fourth, you can model the loop filter using real R and C. Then, you can conne
hi deeptimongia, In the component palette, left hand side drop down list, select Sources-Controlled. vccs is waht you are looking for. good luck,
Hello all, i am looking for a macro model (using ideal circuit elements such as R's C's vccs..) or a veriloga model. i am looking for one that is fully differential and can model settling and slewing behavior accurately. many thanks